Lines Matching full:bits
41 #define DEVICEID_PN 0xf000 /* bits 15..12: Part Number */
42 #define DEVICEID_MFGID 0x0fff /* bits 11..00: Manufacturer ID */
45 #define SI_CHIPID_REV 0xfc00 /* bits 15..10: Chip Version */
46 #define SI_CHIPID_DEV 0x0200 /* bits 09..09: Device */
47 #define SI_CHIPID_FIRMWARE 0x01ff /* bits 08..00: Firmware Version */
50 #define POWERCFG_DSMUTE 0x8000 /* bits 15..15: Softmute Disable */
51 #define POWERCFG_DMUTE 0x4000 /* bits 14..14: Mute Disable */
52 #define POWERCFG_MONO 0x2000 /* bits 13..13: Mono Select */
53 #define POWERCFG_RDSM 0x0800 /* bits 11..11: RDS Mode (Si4701 only) */
54 #define POWERCFG_SKMODE 0x0400 /* bits 10..10: Seek Mode */
55 #define POWERCFG_SEEKUP 0x0200 /* bits 09..09: Seek Direction */
56 #define POWERCFG_SEEK 0x0100 /* bits 08..08: Seek */
57 #define POWERCFG_DISABLE 0x0040 /* bits 06..06: Powerup Disable */
58 #define POWERCFG_ENABLE 0x0001 /* bits 00..00: Powerup Enable */
61 #define CHANNEL_TUNE 0x8000 /* bits 15..15: Tune */
62 #define CHANNEL_CHAN 0x03ff /* bits 09..00: Channel Select */
65 #define SYSCONFIG1_RDSIEN 0x8000 /* bits 15..15: RDS Interrupt Enable (Si4701 only) */
66 #define SYSCONFIG1_STCIEN 0x4000 /* bits 14..14: Seek/Tune Complete Interrupt Enable */
67 #define SYSCONFIG1_RDS 0x1000 /* bits 12..12: RDS Enable (Si4701 only) */
68 #define SYSCONFIG1_DE 0x0800 /* bits 11..11: De-emphasis (0=75us 1=50us) */
69 #define SYSCONFIG1_AGCD 0x0400 /* bits 10..10: AGC Disable */
70 #define SYSCONFIG1_BLNDADJ 0x00c0 /* bits 07..06: Stereo/Mono Blend Level Adjustment */
71 #define SYSCONFIG1_GPIO3 0x0030 /* bits 05..04: General Purpose I/O 3 */
72 #define SYSCONFIG1_GPIO2 0x000c /* bits 03..02: General Purpose I/O 2 */
75 #define SYSCONFIG1_GPIO1 0x0003 /* bits 01..00: General Purpose I/O 1 */
78 #define SYSCONFIG2_SEEKTH 0xff00 /* bits 15..08: RSSI Seek Threshold */
79 #define SYSCONFIG2_BAND 0x00c0 /* bits 07..06: Band Select */
80 #define SYSCONFIG2_SPACE 0x0030 /* bits 05..04: Channel Spacing */
81 #define SYSCONFIG2_VOLUME 0x000f /* bits 03..00: Volume */
84 #define SYSCONFIG3_SMUTER 0xc000 /* bits 15..14: Softmute Attack/Recover Rate */
85 #define SYSCONFIG3_SMUTEA 0x3000 /* bits 13..12: Softmute Attenuation */
86 #define SYSCONFIG3_SKSNR 0x00f0 /* bits 07..04: Seek SNR Threshold */
87 #define SYSCONFIG3_SKCNT 0x000f /* bits 03..00: Seek FM Impulse Detection Threshold */
90 #define TEST1_AHIZEN 0x4000 /* bits 14..14: Audio High-Z Enable */
93 /* TEST2 only contains reserved bits */
96 /* BOOTCONFIG only contains reserved bits */
99 #define STATUSRSSI_RDSR 0x8000 /* bits 15..15: RDS Ready (Si4701 only) */
100 #define STATUSRSSI_STC 0x4000 /* bits 14..14: Seek/Tune Complete */
101 #define STATUSRSSI_SF 0x2000 /* bits 13..13: Seek Fail/Band Limit */
102 #define STATUSRSSI_AFCRL 0x1000 /* bits 12..12: AFC Rail */
103 #define STATUSRSSI_RDSS 0x0800 /* bits 11..11: RDS Synchronized (Si4701 only) */
104 #define STATUSRSSI_BLERA 0x0600 /* bits 10..09: RDS Block A Errors (Si4701 only) */
105 #define STATUSRSSI_ST 0x0100 /* bits 08..08: Stereo Indicator */
106 #define STATUSRSSI_RSSI 0x00ff /* bits 07..00: RSSI (Received Signal Strength Indicator) */
109 #define READCHAN_BLERB 0xc000 /* bits 15..14: RDS Block D Errors (Si4701 only) */
110 #define READCHAN_BLERC 0x3000 /* bits 13..12: RDS Block C Errors (Si4701 only) */
111 #define READCHAN_BLERD 0x0c00 /* bits 11..10: RDS Block B Errors (Si4701 only) */
112 #define READCHAN_READCHAN 0x03ff /* bits 09..00: Read Channel */
115 #define RDSA_RDSA 0xffff /* bits 15..00: RDS Block A Data (Si4701 only) */
118 #define RDSB_RDSB 0xffff /* bits 15..00: RDS Block B Data (Si4701 only) */
121 #define RDSC_RDSC 0xffff /* bits 15..00: RDS Block C Data (Si4701 only) */
124 #define RDSD_RDSD 0xffff /* bits 15..00: RDS Block D Data (Si4701 only) */