162 	struct ispif_device *ispif = dev;  in ispif_isr_8x96()  local
165 	value0 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(0));  in ispif_isr_8x96()
166 	value1 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(0));  in ispif_isr_8x96()
167 	value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0));  in ispif_isr_8x96()
168 	value3 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(1));  in ispif_isr_8x96()
169 	value4 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(1));  in ispif_isr_8x96()
170 	value5 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(1));  in ispif_isr_8x96()
172 	writel_relaxed(value0, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(0));  in ispif_isr_8x96()
173 	writel_relaxed(value1, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(0));  in ispif_isr_8x96()
174 	writel_relaxed(value2, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(0));  in ispif_isr_8x96()
175 	writel_relaxed(value3, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(1));  in ispif_isr_8x96()
176 	writel_relaxed(value4, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(1));  in ispif_isr_8x96()
177 	writel_relaxed(value5, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(1));  in ispif_isr_8x96()
179 	writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD);  in ispif_isr_8x96()
182 		complete(&ispif->reset_complete);  in ispif_isr_8x96()
185 		dev_err_ratelimited(to_device(ispif), "VFE0 pix0 overflow\n");  in ispif_isr_8x96()
188 		dev_err_ratelimited(to_device(ispif), "VFE0 rdi0 overflow\n");  in ispif_isr_8x96()
191 		dev_err_ratelimited(to_device(ispif), "VFE0 pix1 overflow\n");  in ispif_isr_8x96()
194 		dev_err_ratelimited(to_device(ispif), "VFE0 rdi1 overflow\n");  in ispif_isr_8x96()
197 		dev_err_ratelimited(to_device(ispif), "VFE0 rdi2 overflow\n");  in ispif_isr_8x96()
200 		dev_err_ratelimited(to_device(ispif), "VFE1 pix0 overflow\n");  in ispif_isr_8x96()
203 		dev_err_ratelimited(to_device(ispif), "VFE1 rdi0 overflow\n");  in ispif_isr_8x96()
206 		dev_err_ratelimited(to_device(ispif), "VFE1 pix1 overflow\n");  in ispif_isr_8x96()
209 		dev_err_ratelimited(to_device(ispif), "VFE1 rdi1 overflow\n");  in ispif_isr_8x96()
212 		dev_err_ratelimited(to_device(ispif), "VFE1 rdi2 overflow\n");  in ispif_isr_8x96()
226 	struct ispif_device *ispif = dev;  in ispif_isr_8x16()  local
229 	value0 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_0(0));  in ispif_isr_8x16()
230 	value1 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_1(0));  in ispif_isr_8x16()
231 	value2 = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_STATUS_2(0));  in ispif_isr_8x16()
233 	writel_relaxed(value0, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(0));  in ispif_isr_8x16()
234 	writel_relaxed(value1, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(0));  in ispif_isr_8x16()
235 	writel_relaxed(value2, ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(0));  in ispif_isr_8x16()
237 	writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD);  in ispif_isr_8x16()
240 		complete(&ispif->reset_complete);  in ispif_isr_8x16()
243 		dev_err_ratelimited(to_device(ispif), "VFE0 pix0 overflow\n");  in ispif_isr_8x16()
246 		dev_err_ratelimited(to_device(ispif), "VFE0 rdi0 overflow\n");  in ispif_isr_8x16()
249 		dev_err_ratelimited(to_device(ispif), "VFE0 pix1 overflow\n");  in ispif_isr_8x16()
252 		dev_err_ratelimited(to_device(ispif), "VFE0 rdi1 overflow\n");  in ispif_isr_8x16()
255 		dev_err_ratelimited(to_device(ispif), "VFE0 rdi2 overflow\n");  in ispif_isr_8x16()
266 static int ispif_reset(struct ispif_device *ispif)  in ispif_reset()  argument
272 	ret = camss_pm_domain_on(to_camss(ispif), PM_DOMAIN_VFE0);  in ispif_reset()
276 	ret = camss_pm_domain_on(to_camss(ispif), PM_DOMAIN_VFE1);  in ispif_reset()
280 	ret = camss_enable_clocks(ispif->nclocks_for_reset,  in ispif_reset()
281 				  ispif->clock_for_reset,  in ispif_reset()
282 				  to_device(ispif));  in ispif_reset()
286 	reinit_completion(&ispif->reset_complete);  in ispif_reset()
306 	writel_relaxed(val, ispif->base + ISPIF_RST_CMD_0);  in ispif_reset()
308 	time = wait_for_completion_timeout(&ispif->reset_complete,  in ispif_reset()
311 		dev_err(to_device(ispif), "ISPIF reset timeout\n");  in ispif_reset()
315 	camss_disable_clocks(ispif->nclocks_for_reset, ispif->clock_for_reset);  in ispif_reset()
317 	camss_pm_domain_off(to_camss(ispif), PM_DOMAIN_VFE0);  in ispif_reset()
318 	camss_pm_domain_off(to_camss(ispif), PM_DOMAIN_VFE1);  in ispif_reset()
333 	struct ispif_device *ispif = line->ispif;  in ispif_set_power()  local
334 	struct device *dev = to_device(ispif);  in ispif_set_power()
337 	mutex_lock(&ispif->power_lock);  in ispif_set_power()
340 		if (ispif->power_count) {  in ispif_set_power()
342 			ispif->power_count++;  in ispif_set_power()
350 		ret = camss_enable_clocks(ispif->nclocks, ispif->clock, dev);  in ispif_set_power()
356 		ret = ispif_reset(ispif);  in ispif_set_power()
359 			camss_disable_clocks(ispif->nclocks, ispif->clock);  in ispif_set_power()
363 		ispif->intf_cmd[line->vfe_id].cmd_0 = CMD_ALL_NO_CHANGE;  in ispif_set_power()
364 		ispif->intf_cmd[line->vfe_id].cmd_1 = CMD_ALL_NO_CHANGE;  in ispif_set_power()
366 		ispif->power_count++;  in ispif_set_power()
368 		if (ispif->power_count == 0) {  in ispif_set_power()
371 		} else if (ispif->power_count == 1) {  in ispif_set_power()
372 			camss_disable_clocks(ispif->nclocks, ispif->clock);  in ispif_set_power()
376 		ispif->power_count--;  in ispif_set_power()
380 	mutex_unlock(&ispif->power_lock);  in ispif_set_power()
393 static void ispif_select_clk_mux(struct ispif_device *ispif,  in ispif_select_clk_mux()  argument
401 		val = readl_relaxed(ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);  in ispif_select_clk_mux()
405 		writel_relaxed(val, ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);  in ispif_select_clk_mux()
409 		val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);  in ispif_select_clk_mux()
413 		writel_relaxed(val, ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);  in ispif_select_clk_mux()
417 		val = readl_relaxed(ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);  in ispif_select_clk_mux()
421 		writel_relaxed(val, ispif->base_clk_mux + CSI_PIX_CLK_MUX_SEL);  in ispif_select_clk_mux()
425 		val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);  in ispif_select_clk_mux()
429 		writel_relaxed(val, ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);  in ispif_select_clk_mux()
433 		val = readl_relaxed(ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);  in ispif_select_clk_mux()
437 		writel_relaxed(val, ispif->base_clk_mux + CSI_RDI_CLK_MUX_SEL);  in ispif_select_clk_mux()
452 static int ispif_validate_intf_status(struct ispif_device *ispif,  in ispif_validate_intf_status()  argument
460 		val = readl_relaxed(ispif->base +  in ispif_validate_intf_status()
464 		val = readl_relaxed(ispif->base +  in ispif_validate_intf_status()
468 		val = readl_relaxed(ispif->base +  in ispif_validate_intf_status()
472 		val = readl_relaxed(ispif->base +  in ispif_validate_intf_status()
476 		val = readl_relaxed(ispif->base +  in ispif_validate_intf_status()
482 		dev_err(to_device(ispif), "%s: ispif is busy: 0x%x\n",  in ispif_validate_intf_status()
498 static int ispif_wait_for_stop(struct ispif_device *ispif,  in ispif_wait_for_stop()  argument
523 	ret = readl_poll_timeout(ispif->base + addr,  in ispif_wait_for_stop()
529 		dev_err(to_device(ispif), "%s: ispif stop timeout\n",  in ispif_wait_for_stop()
543 static void ispif_select_csid(struct ispif_device *ispif, enum ispif_intf intf,  in ispif_select_csid()  argument
548 	val = readl_relaxed(ispif->base + ISPIF_VFE_m_INTF_INPUT_SEL(vfe));  in ispif_select_csid()
577 	writel(val, ispif->base + ISPIF_VFE_m_INTF_INPUT_SEL(vfe));  in ispif_select_csid()
588 static void ispif_select_cid(struct ispif_device *ispif, enum ispif_intf intf,  in ispif_select_cid()  argument
613 	val = readl_relaxed(ispif->base + addr);  in ispif_select_cid()
619 	writel(val, ispif->base + addr);  in ispif_select_cid()
629 static void ispif_config_irq(struct ispif_device *ispif, enum ispif_intf intf,  in ispif_config_irq()  argument
636 		val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));  in ispif_config_irq()
640 		writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));  in ispif_config_irq()
642 			       ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(vfe));  in ispif_config_irq()
645 		val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));  in ispif_config_irq()
649 		writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_0(vfe));  in ispif_config_irq()
651 			       ispif->base + ISPIF_VFE_m_IRQ_CLEAR_0(vfe));  in ispif_config_irq()
654 		val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));  in ispif_config_irq()
658 		writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));  in ispif_config_irq()
660 			       ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(vfe));  in ispif_config_irq()
663 		val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));  in ispif_config_irq()
667 		writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_1(vfe));  in ispif_config_irq()
669 			       ispif->base + ISPIF_VFE_m_IRQ_CLEAR_1(vfe));  in ispif_config_irq()
672 		val = readl_relaxed(ispif->base + ISPIF_VFE_m_IRQ_MASK_2(vfe));  in ispif_config_irq()
676 		writel_relaxed(val, ispif->base + ISPIF_VFE_m_IRQ_MASK_2(vfe));  in ispif_config_irq()
678 			       ispif->base + ISPIF_VFE_m_IRQ_CLEAR_2(vfe));  in ispif_config_irq()
682 	writel(0x1, ispif->base + ISPIF_IRQ_GLOBAL_CLEAR_CMD);  in ispif_config_irq()
694 static void ispif_config_pack(struct ispif_device *ispif, u32 code,  in ispif_config_pack()  argument
731 	writel_relaxed(val, ispif->base + addr);  in ispif_config_pack()
742 static void ispif_set_intf_cmd(struct ispif_device *ispif, u8 cmd,  in ispif_set_intf_cmd()  argument
748 		val = &ispif->intf_cmd[vfe].cmd_1;  in ispif_set_intf_cmd()
752 		writel_relaxed(*val, ispif->base + ISPIF_VFE_m_INTF_CMD_1(vfe));  in ispif_set_intf_cmd()
755 		val = &ispif->intf_cmd[vfe].cmd_0;  in ispif_set_intf_cmd()
759 		writel_relaxed(*val, ispif->base + ISPIF_VFE_m_INTF_CMD_0(vfe));  in ispif_set_intf_cmd()
776 	struct ispif_device *ispif = line->ispif;  in ispif_set_stream()  local
790 		mutex_lock(&ispif->config_lock);  in ispif_set_stream()
791 		ispif_select_clk_mux(ispif, intf, csid, vfe, 1);  in ispif_set_stream()
793 		ret = ispif_validate_intf_status(ispif, intf, vfe);  in ispif_set_stream()
795 			mutex_unlock(&ispif->config_lock);  in ispif_set_stream()
799 		ispif_select_csid(ispif, intf, csid, vfe, 1);  in ispif_set_stream()
800 		ispif_select_cid(ispif, intf, cid, vfe, 1);  in ispif_set_stream()
801 		ispif_config_irq(ispif, intf, vfe, 1);  in ispif_set_stream()
802 		if (to_camss(ispif)->version == CAMSS_8x96)  in ispif_set_stream()
803 			ispif_config_pack(ispif,  in ispif_set_stream()
806 		ispif_set_intf_cmd(ispif, CMD_ENABLE_FRAME_BOUNDARY,  in ispif_set_stream()
809 		mutex_lock(&ispif->config_lock);  in ispif_set_stream()
810 		ispif_set_intf_cmd(ispif, CMD_DISABLE_FRAME_BOUNDARY,  in ispif_set_stream()
812 		mutex_unlock(&ispif->config_lock);  in ispif_set_stream()
814 		ret = ispif_wait_for_stop(ispif, intf, vfe);  in ispif_set_stream()
818 		mutex_lock(&ispif->config_lock);  in ispif_set_stream()
819 		if (to_camss(ispif)->version == CAMSS_8x96)  in ispif_set_stream()
820 			ispif_config_pack(ispif,  in ispif_set_stream()
823 		ispif_config_irq(ispif, intf, vfe, 0);  in ispif_set_stream()
824 		ispif_select_cid(ispif, intf, cid, vfe, 0);  in ispif_set_stream()
825 		ispif_select_csid(ispif, intf, csid, vfe, 0);  in ispif_set_stream()
826 		ispif_select_clk_mux(ispif, intf, csid, vfe, 0);  in ispif_set_stream()
829 	mutex_unlock(&ispif->config_lock);  in ispif_set_stream()
1063 int msm_ispif_subdev_init(struct ispif_device *ispif,  in msm_ispif_subdev_init()  argument
1066 	struct device *dev = to_device(ispif);  in msm_ispif_subdev_init()
1073 	if (to_camss(ispif)->version == CAMSS_8x16)  in msm_ispif_subdev_init()
1074 		ispif->line_num = 2;  in msm_ispif_subdev_init()
1075 	else if (to_camss(ispif)->version == CAMSS_8x96)  in msm_ispif_subdev_init()
1076 		ispif->line_num = 4;  in msm_ispif_subdev_init()
1080 	ispif->line = devm_kcalloc(dev, ispif->line_num, sizeof(*ispif->line),  in msm_ispif_subdev_init()
1082 	if (!ispif->line)  in msm_ispif_subdev_init()
1085 	for (i = 0; i < ispif->line_num; i++) {  in msm_ispif_subdev_init()
1086 		ispif->line[i].ispif = ispif;  in msm_ispif_subdev_init()
1087 		ispif->line[i].id = i;  in msm_ispif_subdev_init()
1089 		if (to_camss(ispif)->version == CAMSS_8x16) {  in msm_ispif_subdev_init()
1090 			ispif->line[i].formats = ispif_formats_8x16;  in msm_ispif_subdev_init()
1091 			ispif->line[i].nformats =  in msm_ispif_subdev_init()
1093 		} else if (to_camss(ispif)->version == CAMSS_8x96) {  in msm_ispif_subdev_init()
1094 			ispif->line[i].formats = ispif_formats_8x96;  in msm_ispif_subdev_init()
1095 			ispif->line[i].nformats =  in msm_ispif_subdev_init()
1105 	ispif->base = devm_ioremap_resource(dev, r);  in msm_ispif_subdev_init()
1106 	if (IS_ERR(ispif->base)) {  in msm_ispif_subdev_init()
1108 		return PTR_ERR(ispif->base);  in msm_ispif_subdev_init()
1112 	ispif->base_clk_mux = devm_ioremap_resource(dev, r);  in msm_ispif_subdev_init()
1113 	if (IS_ERR(ispif->base_clk_mux)) {  in msm_ispif_subdev_init()
1115 		return PTR_ERR(ispif->base_clk_mux);  in msm_ispif_subdev_init()
1127 	ispif->irq = r->start;  in msm_ispif_subdev_init()
1128 	snprintf(ispif->irq_name, sizeof(ispif->irq_name), "%s_%s",  in msm_ispif_subdev_init()
1130 	if (to_camss(ispif)->version == CAMSS_8x16)  in msm_ispif_subdev_init()
1131 		ret = devm_request_irq(dev, ispif->irq, ispif_isr_8x16,  in msm_ispif_subdev_init()
1132 			       IRQF_TRIGGER_RISING, ispif->irq_name, ispif);  in msm_ispif_subdev_init()
1133 	else if (to_camss(ispif)->version == CAMSS_8x96)  in msm_ispif_subdev_init()
1134 		ret = devm_request_irq(dev, ispif->irq, ispif_isr_8x96,  in msm_ispif_subdev_init()
1135 			       IRQF_TRIGGER_RISING, ispif->irq_name, ispif);  in msm_ispif_subdev_init()
1145 	ispif->nclocks = 0;  in msm_ispif_subdev_init()
1146 	while (res->clock[ispif->nclocks])  in msm_ispif_subdev_init()
1147 		ispif->nclocks++;  in msm_ispif_subdev_init()
1149 	ispif->clock = devm_kcalloc(dev,  in msm_ispif_subdev_init()
1150 				    ispif->nclocks, sizeof(*ispif->clock),  in msm_ispif_subdev_init()
1152 	if (!ispif->clock)  in msm_ispif_subdev_init()
1155 	for (i = 0; i < ispif->nclocks; i++) {  in msm_ispif_subdev_init()
1156 		struct camss_clock *clock = &ispif->clock[i];  in msm_ispif_subdev_init()
1166 	ispif->nclocks_for_reset = 0;  in msm_ispif_subdev_init()
1167 	while (res->clock_for_reset[ispif->nclocks_for_reset])  in msm_ispif_subdev_init()
1168 		ispif->nclocks_for_reset++;  in msm_ispif_subdev_init()
1170 	ispif->clock_for_reset = devm_kcalloc(dev,  in msm_ispif_subdev_init()
1171 					      ispif->nclocks_for_reset,  in msm_ispif_subdev_init()
1172 					      sizeof(*ispif->clock_for_reset),  in msm_ispif_subdev_init()
1174 	if (!ispif->clock_for_reset)  in msm_ispif_subdev_init()
1177 	for (i = 0; i < ispif->nclocks_for_reset; i++) {  in msm_ispif_subdev_init()
1178 		struct camss_clock *clock = &ispif->clock_for_reset[i];  in msm_ispif_subdev_init()
1188 	mutex_init(&ispif->power_lock);  in msm_ispif_subdev_init()
1189 	ispif->power_count = 0;  in msm_ispif_subdev_init()
1191 	mutex_init(&ispif->config_lock);  in msm_ispif_subdev_init()
1193 	init_completion(&ispif->reset_complete);  in msm_ispif_subdev_init()
1299 int msm_ispif_register_entities(struct ispif_device *ispif,  in msm_ispif_register_entities()  argument
1302 	struct device *dev = to_device(ispif);  in msm_ispif_register_entities()
1306 	for (i = 0; i < ispif->line_num; i++) {  in msm_ispif_register_entities()
1307 		struct v4l2_subdev *sd = &ispif->line[i].subdev;  in msm_ispif_register_entities()
1308 		struct media_pad *pads = ispif->line[i].pads;  in msm_ispif_register_entities()
1315 		v4l2_set_subdevdata(sd, &ispif->line[i]);  in msm_ispif_register_entities()
1347 		struct v4l2_subdev *sd = &ispif->line[i].subdev;  in msm_ispif_register_entities()
1360 void msm_ispif_unregister_entities(struct ispif_device *ispif)  in msm_ispif_unregister_entities()  argument
1364 	mutex_destroy(&ispif->power_lock);  in msm_ispif_unregister_entities()
1365 	mutex_destroy(&ispif->config_lock);  in msm_ispif_unregister_entities()
1367 	for (i = 0; i < ispif->line_num; i++) {  in msm_ispif_unregister_entities()
1368 		struct v4l2_subdev *sd = &ispif->line[i].subdev;  in msm_ispif_unregister_entities()