550 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val)  in cp_write()  function
559 	return cp_write(sd, reg, (cp_read(sd, reg) & mask) | val);  in cp_write_and_or()
953 		cp_write(sd, reg->reg & 0xff, val);  in adv7842_s_register()
1011 	cp_write(sd, 0x26, 0x00);  in configure_predefined_video_timings()
1012 	cp_write(sd, 0x27, 0x00);  in configure_predefined_video_timings()
1013 	cp_write(sd, 0x28, 0x00);  in configure_predefined_video_timings()
1014 	cp_write(sd, 0x29, 0x00);  in configure_predefined_video_timings()
1015 	cp_write(sd, 0x8f, 0x40);  in configure_predefined_video_timings()
1016 	cp_write(sd, 0x90, 0x00);  in configure_predefined_video_timings()
1017 	cp_write(sd, 0xa5, 0x00);  in configure_predefined_video_timings()
1018 	cp_write(sd, 0xa6, 0x00);  in configure_predefined_video_timings()
1019 	cp_write(sd, 0xa7, 0x00);  in configure_predefined_video_timings()
1020 	cp_write(sd, 0xab, 0x00);  in configure_predefined_video_timings()
1021 	cp_write(sd, 0xac, 0x00);  in configure_predefined_video_timings()
1088 		cp_write(sd, 0x26, (cp_start_sav >> 8) & 0xf);  in configure_custom_video_timings()
1089 		cp_write(sd, 0x27, (cp_start_sav & 0xff));  in configure_custom_video_timings()
1090 		cp_write(sd, 0x28, (cp_start_eav >> 8) & 0xf);  in configure_custom_video_timings()
1091 		cp_write(sd, 0x29, (cp_start_eav & 0xff));  in configure_custom_video_timings()
1094 		cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff);  in configure_custom_video_timings()
1095 		cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) |  in configure_custom_video_timings()
1097 		cp_write(sd, 0xa7, cp_end_vbi & 0xff);  in configure_custom_video_timings()
1111 	cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7);  in configure_custom_video_timings()
1112 	cp_write(sd, 0x90, ch1_fr_ll & 0xff);  in configure_custom_video_timings()
1113 	cp_write(sd, 0xab, (height >> 4) & 0xff);  in configure_custom_video_timings()
1114 	cp_write(sd, 0xac, (height & 0x0f) << 4);  in configure_custom_video_timings()
1283 		cp_write(sd, 0x3c, ctrl->val);  in adv7842_s_ctrl()
1288 		cp_write(sd, 0x3a, ctrl->val);  in adv7842_s_ctrl()
1293 		cp_write(sd, 0x3b, ctrl->val);  in adv7842_s_ctrl()
1298 		cp_write(sd, 0x3d, ctrl->val);  in adv7842_s_ctrl()
1332 		cp_write(sd, 0xc1, R);  in adv7842_s_ctrl()
1333 		cp_write(sd, 0xc0, G);  in adv7842_s_ctrl()
1334 		cp_write(sd, 0xc2, B);  in adv7842_s_ctrl()
1685 	cp_write(sd, 0x91, bt->interlaced ? 0x40 : 0x00);  in adv7842_s_dv_timings()
1872 		cp_write(sd, 0x73, 0x10);  in select_input()
1873 		cp_write(sd, 0x74, 0x04);  in select_input()
1874 		cp_write(sd, 0x75, 0x01);  in select_input()
1875 		cp_write(sd, 0x76, 0x00);  in select_input()
1877 		cp_write(sd, 0x3e, 0x04); /* CP core pre-gain control */  in select_input()
1878 		cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */  in select_input()
1879 		cp_write(sd, 0x40, 0x5c); /* CP core pre-gain control. Graphics mode */  in select_input()
1924 		cp_write(sd, 0x73, 0x10);  in select_input()
1925 		cp_write(sd, 0x74, 0x04);  in select_input()
1926 		cp_write(sd, 0x75, 0x01);  in select_input()
1927 		cp_write(sd, 0x76, 0x00);  in select_input()
1934 		cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */  in select_input()
1937 		cp_write(sd, 0xc3, 0x33); /* Component mode */  in select_input()
3024 	cp_write(sd, 0x69, 0x14);   /* Enable CP CSC */  in adv7842_core_init()
3026 	cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */  in adv7842_core_init()