Lines Matching refs:write16
387 static int write16(struct drxk_state *state, u32 reg, u16 data) in write16() function
507 status = write16(state, SIO_CC_PWD_MODE__A, SIO_CC_PWD_MODE_LEVEL_NONE); in power_up_device()
510 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_up_device()
514 status = write16(state, SIO_CC_PLL_LOCK__A, 1); in power_up_device()
772 status = write16(state, SCU_RAM_GPIO__A, in drxx_open()
780 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in drxx_open()
789 status = write16(state, SIO_TOP_COMM_KEY__A, key); in drxx_open()
807 status = write16(state, SCU_RAM_GPIO__A, in get_device_capabilities()
811 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in get_device_capabilities()
817 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in get_device_capabilities()
1004 status = write16(state, SIO_HI_RA_RAM_CMD__A, cmd); in hi_command()
1046 status = write16(state, SIO_HI_RA_RAM_PAR_6__A, in hi_cfg_command()
1050 status = write16(state, SIO_HI_RA_RAM_PAR_5__A, in hi_cfg_command()
1054 status = write16(state, SIO_HI_RA_RAM_PAR_4__A, in hi_cfg_command()
1058 status = write16(state, SIO_HI_RA_RAM_PAR_3__A, in hi_cfg_command()
1062 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in hi_cfg_command()
1066 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in hi_cfg_command()
1106 status = write16(state, SCU_RAM_GPIO__A, in mpegts_configure_pins()
1112 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in mpegts_configure_pins()
1118 status = write16(state, SIO_PDR_MSTRT_CFG__A, 0x0000); in mpegts_configure_pins()
1121 status = write16(state, SIO_PDR_MERR_CFG__A, 0x0000); in mpegts_configure_pins()
1124 status = write16(state, SIO_PDR_MCLK_CFG__A, 0x0000); in mpegts_configure_pins()
1127 status = write16(state, SIO_PDR_MVAL_CFG__A, 0x0000); in mpegts_configure_pins()
1130 status = write16(state, SIO_PDR_MD0_CFG__A, 0x0000); in mpegts_configure_pins()
1133 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1136 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1139 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1142 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1145 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1148 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1151 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1163 status = write16(state, SIO_PDR_MSTRT_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1170 status = write16(state, SIO_PDR_MERR_CFG__A, err_cfg); in mpegts_configure_pins()
1173 status = write16(state, SIO_PDR_MVAL_CFG__A, err_cfg); in mpegts_configure_pins()
1179 status = write16(state, SIO_PDR_MD1_CFG__A, in mpegts_configure_pins()
1183 status = write16(state, SIO_PDR_MD2_CFG__A, in mpegts_configure_pins()
1187 status = write16(state, SIO_PDR_MD3_CFG__A, in mpegts_configure_pins()
1191 status = write16(state, SIO_PDR_MD4_CFG__A, in mpegts_configure_pins()
1195 status = write16(state, SIO_PDR_MD5_CFG__A, in mpegts_configure_pins()
1199 status = write16(state, SIO_PDR_MD6_CFG__A, in mpegts_configure_pins()
1203 status = write16(state, SIO_PDR_MD7_CFG__A, in mpegts_configure_pins()
1212 status = write16(state, SIO_PDR_MD1_CFG__A, 0x0000); in mpegts_configure_pins()
1215 status = write16(state, SIO_PDR_MD2_CFG__A, 0x0000); in mpegts_configure_pins()
1218 status = write16(state, SIO_PDR_MD3_CFG__A, 0x0000); in mpegts_configure_pins()
1221 status = write16(state, SIO_PDR_MD4_CFG__A, 0x0000); in mpegts_configure_pins()
1224 status = write16(state, SIO_PDR_MD5_CFG__A, 0x0000); in mpegts_configure_pins()
1227 status = write16(state, SIO_PDR_MD6_CFG__A, 0x0000); in mpegts_configure_pins()
1230 status = write16(state, SIO_PDR_MD7_CFG__A, 0x0000); in mpegts_configure_pins()
1234 status = write16(state, SIO_PDR_MCLK_CFG__A, sio_pdr_mclk_cfg); in mpegts_configure_pins()
1237 status = write16(state, SIO_PDR_MD0_CFG__A, sio_pdr_mdx_cfg); in mpegts_configure_pins()
1242 status = write16(state, SIO_PDR_MON_CFG__A, 0x0000); in mpegts_configure_pins()
1246 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in mpegts_configure_pins()
1269 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_CHAIN); in bl_chain_cmd()
1272 status = write16(state, SIO_BL_CHAIN_ADDR__A, rom_offset); in bl_chain_cmd()
1275 status = write16(state, SIO_BL_CHAIN_LEN__A, nr_of_elements); in bl_chain_cmd()
1278 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_chain_cmd()
1390 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, desired_ctrl); in dvbt_enable_ofdm_token_ring()
1420 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_stop()
1429 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_ipr_mode); in mpegts_stop()
1564 status = write16(state, IQM_AF_STDBY__A, data); in set_iqm_af()
1654 status = write16(state, SIO_CC_PWD_MODE__A, sio_cc_pwd_mode); in ctrl_power_mode()
1657 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in ctrl_power_mode()
1708 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in power_down_dvbt()
1711 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in power_down_dvbt()
1714 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in power_down_dvbt()
1748 status = write16(state, SCU_RAM_GPIO__A, in setoperation_mode()
1918 status = write16(state, FEC_OC_SNC_MODE__A, fec_oc_snc_mode); in mpegts_start()
1921 status = write16(state, FEC_OC_SNC_UNLOCK__A, 1); in mpegts_start()
1935 status = write16(state, FEC_OC_RCN_CTL_STEP_LO__A, 0x0000); in mpegts_dto_init()
1938 status = write16(state, FEC_OC_RCN_CTL_STEP_HI__A, 0x000C); in mpegts_dto_init()
1941 status = write16(state, FEC_OC_RCN_GAIN__A, 0x000A); in mpegts_dto_init()
1944 status = write16(state, FEC_OC_AVR_PARM_A__A, 0x0008); in mpegts_dto_init()
1947 status = write16(state, FEC_OC_AVR_PARM_B__A, 0x0006); in mpegts_dto_init()
1950 status = write16(state, FEC_OC_TMD_HI_MARGIN__A, 0x0680); in mpegts_dto_init()
1953 status = write16(state, FEC_OC_TMD_LO_MARGIN__A, 0x0080); in mpegts_dto_init()
1956 status = write16(state, FEC_OC_TMD_COUNT__A, 0x03F4); in mpegts_dto_init()
1961 status = write16(state, FEC_OC_OCR_INVERT__A, 0); in mpegts_dto_init()
1964 status = write16(state, FEC_OC_SNC_LWM__A, 2); in mpegts_dto_init()
1967 status = write16(state, FEC_OC_SNC_HWM__A, 12); in mpegts_dto_init()
2078 status = write16(state, FEC_OC_DTO_BURST_LEN__A, fec_oc_dto_burst_len); in mpegts_dto_setup()
2081 status = write16(state, FEC_OC_DTO_PERIOD__A, fec_oc_dto_period); in mpegts_dto_setup()
2084 status = write16(state, FEC_OC_DTO_MODE__A, fec_oc_dto_mode); in mpegts_dto_setup()
2087 status = write16(state, FEC_OC_FCT_MODE__A, fec_oc_fct_mode); in mpegts_dto_setup()
2090 status = write16(state, FEC_OC_MODE__A, fec_oc_reg_mode); in mpegts_dto_setup()
2093 status = write16(state, FEC_OC_IPR_MODE__A, fec_oc_reg_ipr_mode); in mpegts_dto_setup()
2101 status = write16(state, FEC_OC_TMD_INT_UPD_RATE__A, in mpegts_dto_setup()
2105 status = write16(state, FEC_OC_TMD_MODE__A, fec_oc_tmd_mode); in mpegts_dto_setup()
2142 return write16(state, FEC_OC_IPR_INVERT__A, fec_oc_reg_ipr_invert); in mpegts_configure_polarity()
2166 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2181 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2195 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_rf()
2212 status = write16(state, in set_agc_rf()
2220 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, in set_agc_rf()
2226 status = write16(state, SCU_RAM_AGC_RF_MAX__A, in set_agc_rf()
2239 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2252 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2257 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI_CO__A, 0); in set_agc_rf()
2262 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, in set_agc_rf()
2274 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_rf()
2283 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_rf()
2317 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2333 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2346 status = write16(state, SCU_RAM_AGC_KI_RED__A, data); in set_agc_if()
2357 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2370 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2386 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2391 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in set_agc_if()
2404 status = write16(state, IQM_AF_STDBY__A, data); in set_agc_if()
2413 status = write16(state, SCU_RAM_AGC_CONFIG__A, data); in set_agc_if()
2421 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, p_agc_cfg->top); in set_agc_if()
2757 status = write16(state, SIO_HI_RA_RAM_PAR_1__A, in ConfigureI2CBridge()
2762 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2767 status = write16(state, SIO_HI_RA_RAM_PAR_2__A, in ConfigureI2CBridge()
2792 status = write16(state, IQM_AF_PDREF__A, p_pre_saw_cfg->reference); in set_pre_saw()
2811 status = write16(state, SIO_BL_MODE__A, SIO_BL_MODE_DIRECT); in bl_direct_cmd()
2814 status = write16(state, SIO_BL_TGT_HDR__A, blockbank); in bl_direct_cmd()
2817 status = write16(state, SIO_BL_TGT_ADDR__A, offset); in bl_direct_cmd()
2820 status = write16(state, SIO_BL_SRC_ADDR__A, rom_offset); in bl_direct_cmd()
2823 status = write16(state, SIO_BL_SRC_LEN__A, nr_of_elements); in bl_direct_cmd()
2826 status = write16(state, SIO_BL_ENABLE__A, SIO_BL_ENABLE_ON); in bl_direct_cmd()
2858 status = write16(state, IQM_AF_COMM_EXEC__A, IQM_AF_COMM_EXEC_ACTIVE); in adc_sync_measurement()
2861 status = write16(state, IQM_AF_START_LOCK__A, 1); in adc_sync_measurement()
2916 status = write16(state, IQM_AF_CLKNEG__A, clk_neg); in adc_synchronization()
3050 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in init_agc()
3055 status = write16(state, SCU_RAM_AGC_CLP_CTRL_MODE__A, clp_ctrl_mode); in init_agc()
3058 status = write16(state, SCU_RAM_AGC_INGAIN_TGT__A, ingain_tgt); in init_agc()
3061 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MIN__A, ingain_tgt_min); in init_agc()
3064 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, ingain_tgt_max); in init_agc()
3067 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MIN__A, in init_agc()
3071 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT_MAX__A, in init_agc()
3075 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI__A, 0); in init_agc()
3078 status = write16(state, SCU_RAM_AGC_IF_IACCU_LO__A, 0); in init_agc()
3081 status = write16(state, SCU_RAM_AGC_RF_IACCU_HI__A, 0); in init_agc()
3084 status = write16(state, SCU_RAM_AGC_RF_IACCU_LO__A, 0); in init_agc()
3087 status = write16(state, SCU_RAM_AGC_CLP_SUM_MAX__A, clp_sum_max); in init_agc()
3090 status = write16(state, SCU_RAM_AGC_SNS_SUM_MAX__A, sns_sum_max); in init_agc()
3094 status = write16(state, SCU_RAM_AGC_KI_INNERGAIN_MIN__A, in init_agc()
3098 status = write16(state, SCU_RAM_AGC_IF_IACCU_HI_TGT__A, in init_agc()
3102 status = write16(state, SCU_RAM_AGC_CLP_CYCLEN__A, clp_cyclen); in init_agc()
3106 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MAX__A, 1023); in init_agc()
3109 status = write16(state, SCU_RAM_AGC_RF_SNS_DEV_MIN__A, (u16) -1023); in init_agc()
3112 status = write16(state, SCU_RAM_AGC_FAST_SNS_CTRL_DELAY__A, 50); in init_agc()
3116 status = write16(state, SCU_RAM_AGC_KI_MAXMINGAIN_TH__A, 20); in init_agc()
3119 status = write16(state, SCU_RAM_AGC_CLP_SUM_MIN__A, clp_sum_min); in init_agc()
3122 status = write16(state, SCU_RAM_AGC_SNS_SUM_MIN__A, sns_sum_min); in init_agc()
3125 status = write16(state, SCU_RAM_AGC_CLP_DIR_TO__A, clp_dir_to); in init_agc()
3128 status = write16(state, SCU_RAM_AGC_SNS_DIR_TO__A, sns_dir_to); in init_agc()
3131 status = write16(state, SCU_RAM_AGC_KI_MINGAIN__A, 0x7fff); in init_agc()
3134 status = write16(state, SCU_RAM_AGC_KI_MAXGAIN__A, 0x0); in init_agc()
3137 status = write16(state, SCU_RAM_AGC_KI_MIN__A, 0x0117); in init_agc()
3140 status = write16(state, SCU_RAM_AGC_KI_MAX__A, 0x0657); in init_agc()
3143 status = write16(state, SCU_RAM_AGC_CLP_SUM__A, 0); in init_agc()
3146 status = write16(state, SCU_RAM_AGC_CLP_CYCCNT__A, 0); in init_agc()
3149 status = write16(state, SCU_RAM_AGC_CLP_DIR_WD__A, 0); in init_agc()
3152 status = write16(state, SCU_RAM_AGC_CLP_DIR_STP__A, 1); in init_agc()
3155 status = write16(state, SCU_RAM_AGC_SNS_SUM__A, 0); in init_agc()
3158 status = write16(state, SCU_RAM_AGC_SNS_CYCCNT__A, 0); in init_agc()
3161 status = write16(state, SCU_RAM_AGC_SNS_DIR_WD__A, 0); in init_agc()
3164 status = write16(state, SCU_RAM_AGC_SNS_DIR_STP__A, 1); in init_agc()
3167 status = write16(state, SCU_RAM_AGC_SNS_CYCLEN__A, 500); in init_agc()
3170 status = write16(state, SCU_RAM_AGC_KI_CYCLEN__A, 500); in init_agc()
3185 status = write16(state, SCU_RAM_AGC_KI__A, data); in init_agc()
3198 status = write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in dvbtqam_get_acc_pkt_err()
3243 status = write16(state, OFDM_SC_RA_RAM_CMD_ADDR__A, subcmd); in dvbt_sc_command()
3262 status |= write16(state, OFDM_SC_RA_RAM_PARAM1__A, param1); in dvbt_sc_command()
3266 status |= write16(state, OFDM_SC_RA_RAM_PARAM0__A, param0); in dvbt_sc_command()
3271 status |= write16(state, OFDM_SC_RA_RAM_CMD__A, cmd); in dvbt_sc_command()
3346 status = write16(state, IQM_CF_BYPASSDET__A, 0); in dvbt_ctrl_set_inc_enable()
3348 status = write16(state, IQM_CF_BYPASSDET__A, 1); in dvbt_ctrl_set_inc_enable()
3363 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, in dvbt_ctrl_set_fr_enable()
3367 status = write16(state, OFDM_SC_RA_RAM_FR_THRES_8K__A, 0); in dvbt_ctrl_set_fr_enable()
3403 status = write16(state, OFDM_SC_RA_RAM_ECHO_THRES__A, data); in dvbt_ctrl_set_echo_threshold()
3425 status = write16(state, SCU_RAM_FEC_PRE_RS_BER_FILTER_SH__A, in dvbt_ctrl_set_sqi_speed()
3465 status = write16(state, SCU_RAM_AGC_INGAIN_TGT_MAX__A, in dvbt_activate_presets()
3511 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt_standard()
3514 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt_standard()
3517 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_dvbt_standard()
3523 status = write16(state, IQM_AF_UPD_SEL__A, 1); in set_dvbt_standard()
3527 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_dvbt_standard()
3531 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_dvbt_standard()
3535 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_dvbt_standard()
3542 status = write16(state, IQM_AF_AGC_RF__A, 0); in set_dvbt_standard()
3547 status = write16(state, IQM_AF_INC_LCT__A, 0); /* crunch in IQM_CF */ in set_dvbt_standard()
3550 status = write16(state, IQM_CF_DET_LCT__A, 0); /* detect in IQM_CF */ in set_dvbt_standard()
3553 status = write16(state, IQM_CF_WND_LEN__A, 3); /* peak detector window length */ in set_dvbt_standard()
3557 status = write16(state, IQM_RC_STRETCH__A, 16); in set_dvbt_standard()
3560 status = write16(state, IQM_CF_OUT_ENA__A, 0x4); /* enable output 2 */ in set_dvbt_standard()
3563 status = write16(state, IQM_CF_DS_ENA__A, 0x4); /* decimate output 2 */ in set_dvbt_standard()
3566 status = write16(state, IQM_CF_SCALE__A, 1600); in set_dvbt_standard()
3569 status = write16(state, IQM_CF_SCALE_SH__A, 0); in set_dvbt_standard()
3574 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_dvbt_standard()
3577 status = write16(state, IQM_CF_DATATH__A, 495); /* crunching threshold */ in set_dvbt_standard()
3586 status = write16(state, IQM_CF_PKDTH__A, 2); /* peak detector threshold */ in set_dvbt_standard()
3589 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 2); in set_dvbt_standard()
3593 status = write16(state, IQM_CF_COMM_INT_MSK__A, 1); in set_dvbt_standard()
3596 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_dvbt_standard()
3609 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt_standard()
3625 status = write16(state, OFDM_SC_RA_RAM_CONFIG__A, data); in set_dvbt_standard()
3630 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt_standard()
3636 status = write16(state, SCU_RAM_AGC_FAST_CLP_CTRL_DELAY__A, in set_dvbt_standard()
3644 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_DELAY__A, 1); in set_dvbt_standard()
3647 status = write16(state, OFDM_SC_RA_RAM_BE_OPT_INIT_DELAY__A, 2); in set_dvbt_standard()
3653 status = write16(state, FEC_DI_INPUT_CTL__A, 1); /* OFDM input */ in set_dvbt_standard()
3659 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x400); in set_dvbt_standard()
3663 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, 0x1000); in set_dvbt_standard()
3667 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, 0x0001); in set_dvbt_standard()
3711 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in dvbt_start()
3750 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_dvbt()
3755 status = write16(state, OFDM_SC_COMM_EXEC__A, OFDM_SC_COMM_EXEC_STOP); in set_dvbt()
3758 status = write16(state, OFDM_LC_COMM_EXEC__A, OFDM_LC_COMM_EXEC_STOP); in set_dvbt()
3764 status = write16(state, OFDM_CP_COMM_EXEC__A, OFDM_CP_COMM_EXEC_STOP); in set_dvbt()
3863 status = write16(state, OFDM_EC_SB_PRIOR__A, OFDM_EC_SB_PRIOR_HI); in set_dvbt()
3910 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3915 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3919 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3923 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3927 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3934 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3939 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3943 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3947 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3951 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
3958 status = write16(state, OFDM_SC_RA_RAM_SRMM_FIX_FACT_8K__A, in set_dvbt()
3963 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_LEFT__A, in set_dvbt()
3967 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_8K_PER_RIGHT__A, in set_dvbt()
3971 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_LEFT__A, in set_dvbt()
3975 status = write16(state, OFDM_SC_RA_RAM_NI_INIT_2K_PER_RIGHT__A, in set_dvbt()
4031 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_dvbt()
4036 status = write16(state, OFDM_SC_COMM_STATE__A, 0); in set_dvbt()
4039 status = write16(state, OFDM_SC_COMM_EXEC__A, 1); in set_dvbt()
4152 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in power_down_qam()
4245 status = write16(state, FEC_RS_MEASUREMENT_PERIOD__A, fec_rs_period); in set_qam_measurement()
4248 status = write16(state, FEC_RS_MEASUREMENT_PRESCALE__A, in set_qam_measurement()
4252 status = write16(state, FEC_OC_SNC_FAIL_PERIOD__A, fec_rs_period); in set_qam_measurement()
4266 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13517); in set_qam16()
4269 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 13517); in set_qam16()
4272 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 13517); in set_qam16()
4275 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13517); in set_qam16()
4278 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13517); in set_qam16()
4281 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 13517); in set_qam16()
4285 status = write16(state, QAM_DQ_QUAL_FUN0__A, 2); in set_qam16()
4288 status = write16(state, QAM_DQ_QUAL_FUN1__A, 2); in set_qam16()
4291 status = write16(state, QAM_DQ_QUAL_FUN2__A, 2); in set_qam16()
4294 status = write16(state, QAM_DQ_QUAL_FUN3__A, 2); in set_qam16()
4297 status = write16(state, QAM_DQ_QUAL_FUN4__A, 2); in set_qam16()
4300 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam16()
4304 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam16()
4307 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam16()
4310 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam16()
4315 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam16()
4321 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam16()
4324 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam16()
4327 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam16()
4330 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam16()
4333 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam16()
4336 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam16()
4339 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam16()
4342 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam16()
4346 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam16()
4349 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam16()
4352 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam16()
4355 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam16()
4358 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam16()
4361 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam16()
4364 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam16()
4367 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam16()
4370 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 32); in set_qam16()
4373 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam16()
4376 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam16()
4379 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam16()
4386 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 140); in set_qam16()
4389 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam16()
4392 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 95); in set_qam16()
4395 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 120); in set_qam16()
4398 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 230); in set_qam16()
4401 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 105); in set_qam16()
4405 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam16()
4408 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam16()
4411 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 24); in set_qam16()
4418 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 16); in set_qam16()
4421 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 220); in set_qam16()
4424 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 25); in set_qam16()
4427 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 6); in set_qam16()
4430 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -24); in set_qam16()
4433 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -65); in set_qam16()
4436 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -127); in set_qam16()
4461 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6707); in set_qam32()
4464 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6707); in set_qam32()
4467 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6707); in set_qam32()
4470 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6707); in set_qam32()
4473 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6707); in set_qam32()
4476 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 6707); in set_qam32()
4481 status = write16(state, QAM_DQ_QUAL_FUN0__A, 3); in set_qam32()
4484 status = write16(state, QAM_DQ_QUAL_FUN1__A, 3); in set_qam32()
4487 status = write16(state, QAM_DQ_QUAL_FUN2__A, 3); in set_qam32()
4490 status = write16(state, QAM_DQ_QUAL_FUN3__A, 3); in set_qam32()
4493 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam32()
4496 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam32()
4500 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam32()
4503 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam32()
4506 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam32()
4512 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam32()
4520 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam32()
4523 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam32()
4526 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam32()
4529 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam32()
4532 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam32()
4535 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam32()
4538 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam32()
4541 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam32()
4545 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam32()
4548 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20); in set_qam32()
4551 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 80); in set_qam32()
4554 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam32()
4557 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 20); in set_qam32()
4560 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam32()
4563 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam32()
4566 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 16); in set_qam32()
4569 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 16); in set_qam32()
4572 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam32()
4575 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam32()
4578 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam32()
4585 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 90); in set_qam32()
4588 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 50); in set_qam32()
4591 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam32()
4594 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam32()
4597 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 170); in set_qam32()
4600 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam32()
4604 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam32()
4607 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam32()
4610 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 10); in set_qam32()
4617 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam32()
4620 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 140); in set_qam32()
4623 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) -8); in set_qam32()
4626 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) -16); in set_qam32()
4629 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -26); in set_qam32()
4632 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -56); in set_qam32()
4635 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -86); in set_qam32()
4656 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 13336); in set_qam64()
4659 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12618); in set_qam64()
4662 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 11988); in set_qam64()
4665 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 13809); in set_qam64()
4668 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13809); in set_qam64()
4671 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15609); in set_qam64()
4676 status = write16(state, QAM_DQ_QUAL_FUN0__A, 4); in set_qam64()
4679 status = write16(state, QAM_DQ_QUAL_FUN1__A, 4); in set_qam64()
4682 status = write16(state, QAM_DQ_QUAL_FUN2__A, 4); in set_qam64()
4685 status = write16(state, QAM_DQ_QUAL_FUN3__A, 4); in set_qam64()
4688 status = write16(state, QAM_DQ_QUAL_FUN4__A, 3); in set_qam64()
4691 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam64()
4695 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam64()
4698 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam64()
4701 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam64()
4706 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam64()
4714 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam64()
4717 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam64()
4720 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam64()
4723 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam64()
4726 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam64()
4729 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam64()
4732 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam64()
4735 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam64()
4739 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam64()
4742 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 30); in set_qam64()
4745 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 100); in set_qam64()
4748 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam64()
4751 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 30); in set_qam64()
4754 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 50); in set_qam64()
4757 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam64()
4760 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam64()
4763 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam64()
4766 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam64()
4769 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam64()
4772 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam64()
4779 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 100); in set_qam64()
4782 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam64()
4785 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam64()
4788 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 110); in set_qam64()
4791 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 200); in set_qam64()
4794 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 95); in set_qam64()
4798 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam64()
4801 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam64()
4804 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 15); in set_qam64()
4811 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 12); in set_qam64()
4814 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 141); in set_qam64()
4817 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 7); in set_qam64()
4820 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 0); in set_qam64()
4823 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -15); in set_qam64()
4826 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -45); in set_qam64()
4829 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -80); in set_qam64()
4851 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 6564); in set_qam128()
4854 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 6598); in set_qam128()
4857 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 6394); in set_qam128()
4860 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 6409); in set_qam128()
4863 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 6656); in set_qam128()
4866 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 7238); in set_qam128()
4871 status = write16(state, QAM_DQ_QUAL_FUN0__A, 6); in set_qam128()
4874 status = write16(state, QAM_DQ_QUAL_FUN1__A, 6); in set_qam128()
4877 status = write16(state, QAM_DQ_QUAL_FUN2__A, 6); in set_qam128()
4880 status = write16(state, QAM_DQ_QUAL_FUN3__A, 6); in set_qam128()
4883 status = write16(state, QAM_DQ_QUAL_FUN4__A, 5); in set_qam128()
4886 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam128()
4890 status = write16(state, QAM_SY_SYNC_HWM__A, 6); in set_qam128()
4893 status = write16(state, QAM_SY_SYNC_AWM__A, 5); in set_qam128()
4896 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam128()
4903 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam128()
4911 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam128()
4914 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam128()
4917 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam128()
4920 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam128()
4923 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam128()
4926 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam128()
4929 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam128()
4932 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam128()
4936 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam128()
4939 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 40); in set_qam128()
4942 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 120); in set_qam128()
4945 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam128()
4948 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 40); in set_qam128()
4951 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 60); in set_qam128()
4954 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam128()
4957 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam128()
4960 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 64); in set_qam128()
4963 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam128()
4966 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam128()
4969 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 0); in set_qam128()
4976 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam128()
4979 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam128()
4982 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam128()
4985 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam128()
4988 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 140); in set_qam128()
4991 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 100); in set_qam128()
4995 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam128()
4998 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 5); in set_qam128()
5002 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam128()
5008 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam128()
5011 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 65); in set_qam128()
5014 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 5); in set_qam128()
5017 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 3); in set_qam128()
5020 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) -1); in set_qam128()
5023 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) -12); in set_qam128()
5026 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -23); in set_qam128()
5048 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD0__A, 11502); in set_qam256()
5051 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD1__A, 12084); in set_qam256()
5054 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD2__A, 12543); in set_qam256()
5057 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD3__A, 12931); in set_qam256()
5060 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD4__A, 13629); in set_qam256()
5063 status = write16(state, SCU_RAM_QAM_EQ_CMA_RAD5__A, 15385); in set_qam256()
5068 status = write16(state, QAM_DQ_QUAL_FUN0__A, 8); in set_qam256()
5071 status = write16(state, QAM_DQ_QUAL_FUN1__A, 8); in set_qam256()
5074 status = write16(state, QAM_DQ_QUAL_FUN2__A, 8); in set_qam256()
5077 status = write16(state, QAM_DQ_QUAL_FUN3__A, 8); in set_qam256()
5080 status = write16(state, QAM_DQ_QUAL_FUN4__A, 6); in set_qam256()
5083 status = write16(state, QAM_DQ_QUAL_FUN5__A, 0); in set_qam256()
5087 status = write16(state, QAM_SY_SYNC_HWM__A, 5); in set_qam256()
5090 status = write16(state, QAM_SY_SYNC_AWM__A, 4); in set_qam256()
5093 status = write16(state, QAM_SY_SYNC_LWM__A, 3); in set_qam256()
5099 status = write16(state, SCU_RAM_QAM_SL_SIG_POWER__A, in set_qam256()
5107 status = write16(state, SCU_RAM_QAM_LC_CA_FINE__A, 15); in set_qam256()
5110 status = write16(state, SCU_RAM_QAM_LC_CA_COARSE__A, 40); in set_qam256()
5113 status = write16(state, SCU_RAM_QAM_LC_EP_FINE__A, 12); in set_qam256()
5116 status = write16(state, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24); in set_qam256()
5119 status = write16(state, SCU_RAM_QAM_LC_EP_COARSE__A, 24); in set_qam256()
5122 status = write16(state, SCU_RAM_QAM_LC_EI_FINE__A, 12); in set_qam256()
5125 status = write16(state, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16); in set_qam256()
5128 status = write16(state, SCU_RAM_QAM_LC_EI_COARSE__A, 16); in set_qam256()
5132 status = write16(state, SCU_RAM_QAM_LC_CP_FINE__A, 5); in set_qam256()
5135 status = write16(state, SCU_RAM_QAM_LC_CP_MEDIUM__A, 50); in set_qam256()
5138 status = write16(state, SCU_RAM_QAM_LC_CP_COARSE__A, 250); in set_qam256()
5141 status = write16(state, SCU_RAM_QAM_LC_CI_FINE__A, 5); in set_qam256()
5144 status = write16(state, SCU_RAM_QAM_LC_CI_MEDIUM__A, 50); in set_qam256()
5147 status = write16(state, SCU_RAM_QAM_LC_CI_COARSE__A, 125); in set_qam256()
5150 status = write16(state, SCU_RAM_QAM_LC_CF_FINE__A, 16); in set_qam256()
5153 status = write16(state, SCU_RAM_QAM_LC_CF_MEDIUM__A, 25); in set_qam256()
5156 status = write16(state, SCU_RAM_QAM_LC_CF_COARSE__A, 48); in set_qam256()
5159 status = write16(state, SCU_RAM_QAM_LC_CF1_FINE__A, 5); in set_qam256()
5162 status = write16(state, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 10); in set_qam256()
5165 status = write16(state, SCU_RAM_QAM_LC_CF1_COARSE__A, 10); in set_qam256()
5172 status = write16(state, SCU_RAM_QAM_FSM_RTH__A, 50); in set_qam256()
5175 status = write16(state, SCU_RAM_QAM_FSM_FTH__A, 60); in set_qam256()
5178 status = write16(state, SCU_RAM_QAM_FSM_CTH__A, 80); in set_qam256()
5181 status = write16(state, SCU_RAM_QAM_FSM_PTH__A, 100); in set_qam256()
5184 status = write16(state, SCU_RAM_QAM_FSM_QTH__A, 150); in set_qam256()
5187 status = write16(state, SCU_RAM_QAM_FSM_MTH__A, 110); in set_qam256()
5191 status = write16(state, SCU_RAM_QAM_FSM_RATE_LIM__A, 40); in set_qam256()
5194 status = write16(state, SCU_RAM_QAM_FSM_COUNT_LIM__A, 4); in set_qam256()
5197 status = write16(state, SCU_RAM_QAM_FSM_FREQ_LIM__A, 12); in set_qam256()
5204 status = write16(state, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, (u16) 8); in set_qam256()
5207 status = write16(state, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, (u16) 74); in set_qam256()
5210 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) 18); in set_qam256()
5213 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) 13); in set_qam256()
5216 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) 7); in set_qam256()
5219 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) 0); in set_qam256()
5222 status = write16(state, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) -8); in set_qam256()
5244 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_STOP); in qam_reset_qam()
5284 status = write16(state, IQM_FD_RATESEL__A, ratesel); in qam_set_symbolrate()
5318 status = write16(state, QAM_LC_SYMBOL_FREQ__A, (u16) lc_symb_rate); in qam_set_symbolrate()
5448 status = write16(state, FEC_DI_COMM_EXEC__A, FEC_DI_COMM_EXEC_STOP); in set_qam()
5451 status = write16(state, FEC_RS_COMM_EXEC__A, FEC_RS_COMM_EXEC_STOP); in set_qam()
5549 status = write16(state, IQM_CF_SCALE_SH__A, IQM_CF_SCALE_SH__PRE); in set_qam()
5552 status = write16(state, QAM_SY_TIMEOUT__A, QAM_SY_TIMEOUT__PRE); in set_qam()
5557 status = write16(state, QAM_LC_RATE_LIMIT__A, 3); in set_qam()
5560 status = write16(state, QAM_LC_LPF_FACTORP__A, 4); in set_qam()
5563 status = write16(state, QAM_LC_LPF_FACTORI__A, 4); in set_qam()
5566 status = write16(state, QAM_LC_MODE__A, 7); in set_qam()
5570 status = write16(state, QAM_LC_QUAL_TAB0__A, 1); in set_qam()
5573 status = write16(state, QAM_LC_QUAL_TAB1__A, 1); in set_qam()
5576 status = write16(state, QAM_LC_QUAL_TAB2__A, 1); in set_qam()
5579 status = write16(state, QAM_LC_QUAL_TAB3__A, 1); in set_qam()
5582 status = write16(state, QAM_LC_QUAL_TAB4__A, 2); in set_qam()
5585 status = write16(state, QAM_LC_QUAL_TAB5__A, 2); in set_qam()
5588 status = write16(state, QAM_LC_QUAL_TAB6__A, 2); in set_qam()
5591 status = write16(state, QAM_LC_QUAL_TAB8__A, 2); in set_qam()
5594 status = write16(state, QAM_LC_QUAL_TAB9__A, 2); in set_qam()
5597 status = write16(state, QAM_LC_QUAL_TAB10__A, 2); in set_qam()
5600 status = write16(state, QAM_LC_QUAL_TAB12__A, 2); in set_qam()
5603 status = write16(state, QAM_LC_QUAL_TAB15__A, 3); in set_qam()
5606 status = write16(state, QAM_LC_QUAL_TAB16__A, 3); in set_qam()
5609 status = write16(state, QAM_LC_QUAL_TAB20__A, 4); in set_qam()
5612 status = write16(state, QAM_LC_QUAL_TAB25__A, 4); in set_qam()
5617 status = write16(state, QAM_SY_SP_INV__A, in set_qam()
5623 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam()
5653 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam()
5668 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_ACTIVE); in set_qam()
5671 status = write16(state, QAM_COMM_EXEC__A, QAM_COMM_EXEC_ACTIVE); in set_qam()
5674 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_ACTIVE); in set_qam()
5720 status = write16(state, IQM_COMM_EXEC__A, IQM_COMM_EXEC_B_STOP); in set_qam_standard()
5723 status = write16(state, IQM_AF_AMUX__A, IQM_AF_AMUX_SIGNAL2ADC); in set_qam_standard()
5754 status = write16(state, IQM_CF_OUT_ENA__A, 1 << IQM_CF_OUT_ENA_QAM__B); in set_qam_standard()
5757 status = write16(state, IQM_CF_SYMMETRIC__A, 0); in set_qam_standard()
5760 status = write16(state, IQM_CF_MIDTAP__A, in set_qam_standard()
5765 status = write16(state, IQM_RC_STRETCH__A, 21); in set_qam_standard()
5768 status = write16(state, IQM_AF_CLP_LEN__A, 0); in set_qam_standard()
5771 status = write16(state, IQM_AF_CLP_TH__A, 448); in set_qam_standard()
5774 status = write16(state, IQM_AF_SNS_LEN__A, 0); in set_qam_standard()
5777 status = write16(state, IQM_CF_POW_MEAS_LEN__A, 0); in set_qam_standard()
5781 status = write16(state, IQM_FS_ADJ_SEL__A, 1); in set_qam_standard()
5784 status = write16(state, IQM_RC_ADJ_SEL__A, 1); in set_qam_standard()
5787 status = write16(state, IQM_CF_ADJ_SEL__A, 1); in set_qam_standard()
5790 status = write16(state, IQM_AF_UPD_SEL__A, 0); in set_qam_standard()
5795 status = write16(state, IQM_CF_CLP_VAL__A, 500); in set_qam_standard()
5798 status = write16(state, IQM_CF_DATATH__A, 1000); in set_qam_standard()
5801 status = write16(state, IQM_CF_BYPASSDET__A, 1); in set_qam_standard()
5804 status = write16(state, IQM_CF_DET_LCT__A, 0); in set_qam_standard()
5807 status = write16(state, IQM_CF_WND_LEN__A, 1); in set_qam_standard()
5810 status = write16(state, IQM_CF_PKDTH__A, 1); in set_qam_standard()
5813 status = write16(state, IQM_AF_INC_BYPASS__A, 1); in set_qam_standard()
5821 status = write16(state, IQM_AF_START_LOCK__A, 0x01); in set_qam_standard()
5831 status = write16(state, SCU_RAM_QAM_FSM_STEP_PERIOD__A, 2000); in set_qam_standard()
5836 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_HOLD); in set_qam_standard()
5859 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in set_qam_standard()
5873 status = write16(state, SCU_RAM_GPIO__A, in write_gpio()
5879 status = write16(state, SIO_TOP_COMM_KEY__A, SIO_TOP_COMM_KEY_KEY); in write_gpio()
5886 status = write16(state, SIO_PDR_SMA_TX_CFG__A, in write_gpio()
5900 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5906 status = write16(state, SIO_PDR_SMA_RX_CFG__A, in write_gpio()
5920 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5926 status = write16(state, SIO_PDR_GPIO_CFG__A, in write_gpio()
5940 status = write16(state, SIO_PDR_UIO_OUT_LO__A, value); in write_gpio()
5946 status = write16(state, SIO_TOP_COMM_KEY__A, 0x0000); in write_gpio()
6026 status = write16(state, SIO_CC_PWD_MODE__A, in power_down_device()
6030 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in power_down_device()
6058 status = write16(state, SIO_CC_SOFT_RST__A, in init_drxk()
6064 status = write16(state, SIO_CC_UPDATE__A, SIO_CC_UPDATE_KEY); in init_drxk()
6103 status = write16(state, SCU_RAM_GPIO__A, in init_drxk()
6115 status = write16(state, AUD_COMM_EXEC__A, AUD_COMM_EXEC_STOP); in init_drxk()
6118 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_STOP); in init_drxk()
6123 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6129 status = write16(state, SIO_BL_COMM_EXEC__A, in init_drxk()
6145 status = write16(state, SIO_OFDM_SH_OFDM_RING_ENABLE__A, in init_drxk()
6151 status = write16(state, SCU_COMM_EXEC__A, SCU_COMM_EXEC_ACTIVE); in init_drxk()
6176 status = write16(state, SCU_RAM_DRIVER_VER_HI__A, in init_drxk()
6185 status = write16(state, SCU_RAM_DRIVER_VER_LO__A, in init_drxk()
6205 status = write16(state, SCU_RAM_DRIVER_DEBUG__A, 0); in init_drxk()
6211 status = write16(state, FEC_COMM_EXEC__A, FEC_COMM_EXEC_STOP); in init_drxk()
6603 write16(state, SCU_RAM_FEC_ACCUM_PKT_FAILURES__A, 0); in drxk_get_stats()