Lines Matching refs:iowrite8
63 iowrite8(CR_DISABLE_RX | CR_DISABLE_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
65 iowrite8(CR_CMD_RESET_RX, &channel->regs->w.cr); in ipoctal_reset_channel()
66 iowrite8(CR_CMD_RESET_TX, &channel->regs->w.cr); in ipoctal_reset_channel()
67 iowrite8(CR_CMD_RESET_ERR_STATUS, &channel->regs->w.cr); in ipoctal_reset_channel()
68 iowrite8(CR_CMD_RESET_MR, &channel->regs->w.cr); in ipoctal_reset_channel()
81 iowrite8(CR_ENABLE_RX, &channel->regs->w.cr); in ipoctal_port_activate()
159 iowrite8(CR_CMD_RESET_ERR_STATUS, &channel->regs->w.cr); in ipoctal_irq_rx()
202 iowrite8(value, &channel->regs->w.thr); in ipoctal_irq_tx()
220 iowrite8(CR_CMD_RESET_BREAK_CHANGE, &channel->regs->w.cr); in ipoctal_irq_channel()
223 iowrite8(CR_DISABLE_TX, &channel->regs->w.cr); in ipoctal_irq_channel()
227 iowrite8(CR_CMD_NEGATE_RTSN, &channel->regs->w.cr); in ipoctal_irq_channel()
228 iowrite8(CR_ENABLE_RX, &channel->regs->w.cr); in ipoctal_irq_channel()
331 iowrite8(MR1_CHRL_8_BITS | MR1_ERROR_CHAR | MR1_RxINT_RxRDY, in ipoctal_inst_slot()
333 iowrite8(0, &channel->regs->w.mr); /* mr2 */ in ipoctal_inst_slot()
334 iowrite8(TX_CLK_9600 | RX_CLK_9600, &channel->regs->w.csr); in ipoctal_inst_slot()
338 iowrite8(ACR_BRG_SET2, &block_regs[i].w.acr); in ipoctal_inst_slot()
339 iowrite8(OPCR_MPP_OUTPUT | OPCR_MPOa_RTSN | OPCR_MPOb_RTSN, in ipoctal_inst_slot()
341 iowrite8(IMR_TxRDY_A | IMR_RxRDY_FFULL_A | IMR_DELTA_BREAK_A | in ipoctal_inst_slot()
347 iowrite8(1, ipoctal->mem8_space + 1); in ipoctal_inst_slot()
450 iowrite8(CR_DISABLE_RX, &channel->regs->w.cr); in ipoctal_write_tty()
452 iowrite8(CR_CMD_ASSERT_RTSN, &channel->regs->w.cr); in ipoctal_write_tty()
459 iowrite8(CR_ENABLE_TX, &channel->regs->w.cr); in ipoctal_write_tty()
603 iowrite8(mr1, &channel->regs->w.mr); in ipoctal_set_termios()
604 iowrite8(mr2, &channel->regs->w.mr); in ipoctal_set_termios()
605 iowrite8(csr, &channel->regs->w.csr); in ipoctal_set_termios()
609 iowrite8(CR_ENABLE_RX, &channel->regs->w.cr); in ipoctal_set_termios()