605 	struct arm_smmu_evtq		evtq;  member
1696 	struct arm_smmu_queue *q = &smmu->evtq.q;  in arm_smmu_evtq_thread()
2830 	ret = arm_smmu_init_one_queue(smmu, &smmu->evtq.q, ARM_SMMU_EVTQ_PROD,  in arm_smmu_init_queues()
3052 			smmu->evtq.q.irq = desc->irq;  in arm_smmu_setup_msis()
3076 	irq = smmu->evtq.q.irq;  in arm_smmu_setup_unique_irqs()
3233 	writeq_relaxed(smmu->evtq.q.q_base, smmu->base + ARM_SMMU_EVTQ_BASE);  in arm_smmu_device_reset()
3234 	writel_relaxed(smmu->evtq.q.llq.prod,  in arm_smmu_device_reset()
3236 	writel_relaxed(smmu->evtq.q.llq.cons,  in arm_smmu_device_reset()
3421 	smmu->evtq.q.llq.max_n_shift = min_t(u32, EVTQ_MAX_SZ_SHIFT,  in arm_smmu_device_hw_probe()
3441 	smmu->evtq.max_stalls = FIELD_GET(IDR5_STALL_MAX, reg);  in arm_smmu_device_hw_probe()
3620 			smmu->evtq.q.irq = irq;  in arm_smmu_device_probe()