Lines Matching refs:opcode
78 if (!e->opcode) { in find_prev_entry()
158 if (e->opcode != TID_OP(WRITE_REQ) && in make_rc_ack()
180 if (e->opcode == OP(RDMA_READ_REQUEST)) { in make_rc_ack()
214 } else if (e->opcode == TID_OP(WRITE_REQ)) { in make_rc_ack()
229 } else if (e->opcode == TID_OP(READ_REQ)) { in make_rc_ack()
337 trace_hfi1_tid_req_make_rc_ack_write(qp, 0, e->opcode, e->psn, in make_rc_ack()
538 (wqe->wr.opcode != IB_WR_TID_RDMA_READ || in hfi1_make_rc_req()
547 if (wqe->wr.opcode == IB_WR_REG_MR || in hfi1_make_rc_req()
548 wqe->wr.opcode == IB_WR_LOCAL_INV) { in hfi1_make_rc_req()
593 switch (wqe->wr.opcode) { in hfi1_make_rc_req()
605 if (wqe->wr.opcode == IB_WR_SEND) { in hfi1_make_rc_req()
607 } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) { in hfi1_make_rc_req()
647 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { in hfi1_make_rc_req()
713 if (__w->wr.opcode != IB_WR_TID_RDMA_WRITE || in hfi1_make_rc_req()
763 wqe->wr.opcode, in hfi1_make_rc_req()
803 wqe->wr.opcode, in hfi1_make_rc_req()
889 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || in hfi1_make_rc_req()
890 wqe->wr.opcode == IB_WR_OPFN) { in hfi1_make_rc_req()
917 if (wqe->wr.opcode != IB_WR_TID_RDMA_READ) { in hfi1_make_rc_req()
929 if (wqe->wr.opcode == IB_WR_RDMA_READ || in hfi1_make_rc_req()
930 wqe->wr.opcode == IB_WR_TID_RDMA_WRITE) in hfi1_make_rc_req()
932 else if (wqe->wr.opcode == IB_WR_TID_RDMA_READ) in hfi1_make_rc_req()
962 if (wqe->wr.opcode == IB_WR_SEND) { in hfi1_make_rc_req()
964 } else if (wqe->wr.opcode == IB_WR_SEND_WITH_IMM) { in hfi1_make_rc_req()
1007 if (wqe->wr.opcode == IB_WR_RDMA_WRITE) { in hfi1_make_rc_req()
1075 trace_hfi1_tid_req_make_req_write(qp, 0, wqe->wr.opcode, in hfi1_make_rc_req()
1080 if (wqe->wr.opcode != IB_WR_TID_RDMA_READ) in hfi1_make_rc_req()
1130 trace_hfi1_tid_req_make_req_read(qp, 0, wqe->wr.opcode, in hfi1_make_rc_req()
1141 if (wqe->wr.opcode != IB_WR_TID_RDMA_READ || delta == 0 || in hfi1_make_rc_req()
1173 trace_hfi1_tid_req_make_req_read(qp, 0, wqe->wr.opcode, in hfi1_make_rc_req()
1180 wqe->wr.opcode != IB_WR_TID_RDMA_WRITE) in hfi1_make_rc_req()
1463 u32 opcode = wqe->wr.opcode; in update_num_rd_atomic() local
1465 if (opcode == IB_WR_RDMA_READ || in update_num_rd_atomic()
1466 opcode == IB_WR_ATOMIC_CMP_AND_SWP || in update_num_rd_atomic()
1467 opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { in update_num_rd_atomic()
1469 } else if (opcode == IB_WR_TID_RDMA_READ) { in update_num_rd_atomic()
1481 wqe->wr.opcode, in update_num_rd_atomic()
1505 u32 opcode; in reset_psn() local
1551 opcode = wqe->wr.opcode; in reset_psn()
1558 switch (opcode) { in reset_psn()
1625 if (wqe->wr.opcode == IB_WR_OPFN) { in hfi1_restart_rc()
1638 if (wqe->wr.opcode == IB_WR_TID_RDMA_READ) { in hfi1_restart_rc()
1659 if (wqe->wr.opcode == IB_WR_RDMA_READ || in hfi1_restart_rc()
1660 wqe->wr.opcode == IB_WR_TID_RDMA_READ) in hfi1_restart_rc()
1688 if (wqe->wr.opcode == IB_WR_RDMA_READ || in reset_sending_psn()
1689 wqe->wr.opcode == IB_WR_TID_RDMA_READ || in reset_sending_psn()
1690 wqe->wr.opcode == IB_WR_TID_RDMA_WRITE) in reset_sending_psn()
1718 u8 opcode = ib_bth_get_opcode(ohdr); in hfi1_rc_verbs_aborted() local
1722 if ((opcode >= OP(RDMA_READ_RESPONSE_FIRST) && in hfi1_rc_verbs_aborted()
1723 opcode <= OP(ATOMIC_ACKNOWLEDGE)) || in hfi1_rc_verbs_aborted()
1724 opcode == TID_OP(READ_RESP) || in hfi1_rc_verbs_aborted()
1725 opcode == TID_OP(WRITE_RESP)) in hfi1_rc_verbs_aborted()
1741 u32 opcode, head, tail; in hfi1_rc_send_complete() local
1750 opcode = ib_bth_get_opcode(ohdr); in hfi1_rc_send_complete()
1751 if ((opcode >= OP(RDMA_READ_RESPONSE_FIRST) && in hfi1_rc_send_complete()
1752 opcode <= OP(ATOMIC_ACKNOWLEDGE)) || in hfi1_rc_send_complete()
1753 opcode == TID_OP(READ_RESP) || in hfi1_rc_send_complete()
1754 opcode == TID_OP(WRITE_RESP)) { in hfi1_rc_send_complete()
1765 if (opcode != TID_OP(WRITE_DATA) && in hfi1_rc_send_complete()
1766 opcode != TID_OP(WRITE_DATA_LAST) && in hfi1_rc_send_complete()
1767 opcode != TID_OP(ACK) && opcode != TID_OP(RESYNC)) in hfi1_rc_send_complete()
1771 if (opcode >= TID_OP(WRITE_REQ) && in hfi1_rc_send_complete()
1772 opcode <= TID_OP(WRITE_DATA_LAST)) { in hfi1_rc_send_complete()
1801 opcode != TID_OP(WRITE_DATA) && opcode != TID_OP(WRITE_DATA_LAST) && in hfi1_rc_send_complete()
1802 opcode != TID_OP(RESYNC) && in hfi1_rc_send_complete()
1806 if (opcode == TID_OP(READ_REQ)) in hfi1_rc_send_complete()
1813 if ((opcode == TID_OP(WRITE_DATA) || in hfi1_rc_send_complete()
1814 opcode == TID_OP(WRITE_DATA_LAST) || in hfi1_rc_send_complete()
1815 opcode == TID_OP(RESYNC)) && in hfi1_rc_send_complete()
1826 if (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE && in hfi1_rc_send_complete()
1840 ib_hfi1_wc_opcode[wqe->wr.opcode], in hfi1_rc_send_complete()
1886 ib_hfi1_wc_opcode[wqe->wr.opcode], in do_rc_completion()
1917 if (wqe->wr.opcode != IB_WR_TID_RDMA_WRITE) in do_rc_completion()
2007 int do_rc_ack(struct rvt_qp *qp, u32 aeth, u32 psn, int opcode, in do_rc_ack() argument
2043 if (wqe->wr.opcode == IB_WR_RDMA_READ && in do_rc_ack()
2044 opcode == OP(RDMA_READ_RESPONSE_ONLY) && in do_rc_ack()
2058 if ((wqe->wr.opcode == IB_WR_RDMA_READ && in do_rc_ack()
2059 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) || in do_rc_ack()
2060 (wqe->wr.opcode == IB_WR_TID_RDMA_READ && in do_rc_ack()
2061 (opcode != TID_OP(READ_RESP) || diff != 0)) || in do_rc_ack()
2062 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || in do_rc_ack()
2063 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) && in do_rc_ack()
2064 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0)) || in do_rc_ack()
2065 (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE && in do_rc_ack()
2074 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || in do_rc_ack()
2075 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { in do_rc_ack()
2079 if (wqe->wr.opcode == IB_WR_OPFN) in do_rc_ack()
2083 (wqe->wr.opcode == IB_WR_RDMA_READ || in do_rc_ack()
2084 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || in do_rc_ack()
2085 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) { in do_rc_ack()
2104 if (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE) in do_rc_ack()
2117 if (wqe->wr.opcode == IB_WR_TID_RDMA_READ) { in do_rc_ack()
2133 if (__w && __w->wr.opcode == IB_WR_TID_RDMA_WRITE && in do_rc_ack()
2134 opcode == TID_OP(WRITE_RESP)) { in do_rc_ack()
2198 if (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE && in do_rc_ack()
2199 opcode != TID_OP(WRITE_RESP) && in do_rc_ack()
2212 if (!(rdi->post_parms[wqe->wr.opcode].flags & in do_rc_ack()
2228 if (wqe->wr.opcode == IB_WR_TID_RDMA_WRITE) { in do_rc_ack()
2275 if (wqe->wr.opcode == IB_WR_TID_RDMA_READ) in do_rc_ack()
2318 if (wqe->wr.opcode == IB_WR_RDMA_READ || in rdma_seq_err()
2319 wqe->wr.opcode == IB_WR_TID_RDMA_READ || in rdma_seq_err()
2320 wqe->wr.opcode == IB_WR_TID_RDMA_WRITE || in rdma_seq_err()
2321 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP || in rdma_seq_err()
2322 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) in rdma_seq_err()
2362 u8 opcode = packet->opcode; in rc_rcv_resp() local
2377 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) { in rc_rcv_resp()
2400 switch (opcode) { in rc_rcv_resp()
2405 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) in rc_rcv_resp()
2409 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) || in rc_rcv_resp()
2410 opcode != OP(RDMA_READ_RESPONSE_FIRST)) in rc_rcv_resp()
2413 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) in rc_rcv_resp()
2428 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) in rc_rcv_resp()
2446 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE)) in rc_rcv_resp()
2462 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd)) in rc_rcv_resp()
2484 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ)) in rc_rcv_resp()
2553 struct rvt_qp *qp, u32 opcode, u32 psn, in rc_rcv_error() argument
2609 switch (opcode) { in rc_rcv_error()
2619 if (!e || e->opcode != OP(RDMA_READ_REQUEST)) in rc_rcv_error()
2665 if (!e || e->opcode != (u8)opcode || old_req) in rc_rcv_error()
2814 u32 opcode = packet->opcode; in hfi1_rc_rcv() local
2842 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) && in hfi1_rc_rcv()
2843 opcode <= OP(ATOMIC_ACKNOWLEDGE)) { in hfi1_rc_rcv()
2851 if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd)) in hfi1_rc_rcv()
2860 if (opcode == OP(SEND_MIDDLE) || in hfi1_rc_rcv()
2861 opcode == OP(SEND_LAST) || in hfi1_rc_rcv()
2862 opcode == OP(SEND_LAST_WITH_IMMEDIATE) || in hfi1_rc_rcv()
2863 opcode == OP(SEND_LAST_WITH_INVALIDATE)) in hfi1_rc_rcv()
2869 if (opcode == OP(RDMA_WRITE_MIDDLE) || in hfi1_rc_rcv()
2870 opcode == OP(RDMA_WRITE_LAST) || in hfi1_rc_rcv()
2871 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) in hfi1_rc_rcv()
2876 if (opcode == OP(SEND_MIDDLE) || in hfi1_rc_rcv()
2877 opcode == OP(SEND_LAST) || in hfi1_rc_rcv()
2878 opcode == OP(SEND_LAST_WITH_IMMEDIATE) || in hfi1_rc_rcv()
2879 opcode == OP(SEND_LAST_WITH_INVALIDATE) || in hfi1_rc_rcv()
2880 opcode == OP(RDMA_WRITE_MIDDLE) || in hfi1_rc_rcv()
2881 opcode == OP(RDMA_WRITE_LAST) || in hfi1_rc_rcv()
2882 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE)) in hfi1_rc_rcv()
2896 switch (opcode) { in hfi1_rc_rcv()
2940 if (opcode == OP(SEND_ONLY)) in hfi1_rc_rcv()
2942 if (opcode == OP(SEND_ONLY_WITH_INVALIDATE)) in hfi1_rc_rcv()
2982 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) || in hfi1_rc_rcv()
2983 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE)) in hfi1_rc_rcv()
2984 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM; in hfi1_rc_rcv()
2986 wc.opcode = IB_WC_RECV; in hfi1_rc_rcv()
3041 if (opcode == OP(RDMA_WRITE_FIRST)) in hfi1_rc_rcv()
3043 else if (opcode == OP(RDMA_WRITE_ONLY)) in hfi1_rc_rcv()
3099 e->opcode = opcode; in hfi1_rc_rcv()
3110 qp->r_state = opcode; in hfi1_rc_rcv()
3129 bool opfn = opcode == OP(COMPARE_SWAP) && in hfi1_rc_rcv()
3167 e->atomic_data = (opcode == OP(FETCH_ADD)) ? in hfi1_rc_rcv()
3175 e->opcode = opcode; in hfi1_rc_rcv()
3181 qp->r_state = opcode; in hfi1_rc_rcv()
3201 qp->r_state = opcode; in hfi1_rc_rcv()
3258 u32 opcode; in hfi1_rc_hdrerr() local
3265 opcode = ib_bth_get_opcode(packet->ohdr); in hfi1_rc_hdrerr()
3268 if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) { in hfi1_rc_hdrerr()