22  *  @st:		driver state
29 static void inv_mpu6050_update_period(struct inv_mpu6050_state *st,  in inv_mpu6050_update_period()  argument
37 	const s32 divider = INV_MPU6050_FREQ_DIVIDER(st);  in inv_mpu6050_update_period()
41 	if (st->it_timestamp == 0) {  in inv_mpu6050_update_period()
52 		delta = div_s64(timestamp - st->it_timestamp, divider);  in inv_mpu6050_update_period()
55 			st->chip_period = (st->chip_period + delta) / 2;  in inv_mpu6050_update_period()
66 		interval = (nb - 1) * st->chip_period * divider;  in inv_mpu6050_update_period()
67 		st->data_timestamp = timestamp - interval;  in inv_mpu6050_update_period()
71 	st->it_timestamp = timestamp;  in inv_mpu6050_update_period()
77  *  @st:		driver state
82 static s64 inv_mpu6050_get_timestamp(struct inv_mpu6050_state *st)  in inv_mpu6050_get_timestamp()  argument
87 	ts = st->data_timestamp;  in inv_mpu6050_get_timestamp()
88 	st->data_timestamp += st->chip_period * INV_MPU6050_FREQ_DIVIDER(st);  in inv_mpu6050_get_timestamp()
97 	struct inv_mpu6050_state  *st = iio_priv(indio_dev);  in inv_reset_fifo()  local
100 	st->it_timestamp = 0;  in inv_reset_fifo()
103 	result = regmap_write(st->map, st->reg->int_enable, 0);  in inv_reset_fifo()
105 		dev_err(regmap_get_device(st->map), "int_enable failed %d\n",  in inv_reset_fifo()
110 	result = regmap_write(st->map, st->reg->fifo_en, 0);  in inv_reset_fifo()
114 	result = regmap_write(st->map, st->reg->user_ctrl,  in inv_reset_fifo()
115 			      st->chip_config.user_ctrl);  in inv_reset_fifo()
120 	d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_RST;  in inv_reset_fifo()
121 	result = regmap_write(st->map, st->reg->user_ctrl, d);  in inv_reset_fifo()
126 	if (st->chip_config.accl_fifo_enable ||  in inv_reset_fifo()
127 	    st->chip_config.gyro_fifo_enable) {  in inv_reset_fifo()
128 		result = regmap_write(st->map, st->reg->int_enable,  in inv_reset_fifo()
134 	d = st->chip_config.user_ctrl | INV_MPU6050_BIT_FIFO_EN;  in inv_reset_fifo()
135 	result = regmap_write(st->map, st->reg->user_ctrl, d);  in inv_reset_fifo()
140 	if (st->chip_config.gyro_fifo_enable)  in inv_reset_fifo()
142 	if (st->chip_config.accl_fifo_enable)  in inv_reset_fifo()
144 	result = regmap_write(st->map, st->reg->fifo_en, d);  in inv_reset_fifo()
151 	dev_err(regmap_get_device(st->map), "reset fifo failed %d\n", result);  in inv_reset_fifo()
152 	result = regmap_write(st->map, st->reg->int_enable,  in inv_reset_fifo()
165 	struct inv_mpu6050_state *st = iio_priv(indio_dev);  in inv_mpu6050_read_fifo()  local
174 	mutex_lock(&st->lock);  in inv_mpu6050_read_fifo()
177 	result = regmap_read(st->map, st->reg->int_status, &int_status);  in inv_mpu6050_read_fifo()
179 		dev_err(regmap_get_device(st->map),  in inv_mpu6050_read_fifo()
184 		dev_warn(regmap_get_device(st->map),  in inv_mpu6050_read_fifo()
189 	if (!(st->chip_config.accl_fifo_enable |  in inv_mpu6050_read_fifo()
190 		st->chip_config.gyro_fifo_enable))  in inv_mpu6050_read_fifo()
193 	if (st->chip_config.accl_fifo_enable)  in inv_mpu6050_read_fifo()
196 	if (st->chip_config.gyro_fifo_enable)  in inv_mpu6050_read_fifo()
199 	if (st->chip_type == INV_ICM20602)  in inv_mpu6050_read_fifo()
206 	result = regmap_bulk_read(st->map, st->reg->fifo_count_h, data,  in inv_mpu6050_read_fifo()
218 	if (fifo_count >= st->hw->fifo_size - nb) {  in inv_mpu6050_read_fifo()
219 		dev_warn(regmap_get_device(st->map), "fifo overflow reset\n");  in inv_mpu6050_read_fifo()
225 	inv_mpu6050_update_period(st, pf->timestamp, nb);  in inv_mpu6050_read_fifo()
227 		result = regmap_bulk_read(st->map, st->reg->fifo_r_w,  in inv_mpu6050_read_fifo()
232 		if (st->skip_samples) {  in inv_mpu6050_read_fifo()
233 			st->skip_samples--;  in inv_mpu6050_read_fifo()
236 		timestamp = inv_mpu6050_get_timestamp(st);  in inv_mpu6050_read_fifo()
241 	mutex_unlock(&st->lock);  in inv_mpu6050_read_fifo()
249 	mutex_unlock(&st->lock);  in inv_mpu6050_read_fifo()