Lines Matching +full:autosuspend +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0-only
17 #include <linux/delay.h>
37 * Register map: anything suffixed *_H is a big-endian high byte and always
74 /* Bits 8-11 select memory bank */
161 * Fullscale precision is (for finest precision) +/- 250 deg/s, so the full
182 if (mpu3050->lpf == MPU3050_DLPF_CFG_256HZ_NOLPF2) in mpu3050_get_freq()
186 freq /= (mpu3050->divisor + 1); in mpu3050_get_freq()
198 ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, in mpu3050_start_sampling()
203 /* Turn on the Z-axis PLL */ in mpu3050_start_sampling()
204 ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, in mpu3050_start_sampling()
212 raw_val[i] = cpu_to_be16(mpu3050->calibration[i]); in mpu3050_start_sampling()
214 ret = regmap_bulk_write(mpu3050->map, MPU3050_X_OFFS_USR_H, raw_val, in mpu3050_start_sampling()
220 ret = regmap_write(mpu3050->map, MPU3050_DLPF_FS_SYNC, in mpu3050_start_sampling()
222 mpu3050->fullscale << MPU3050_FS_SHIFT | in mpu3050_start_sampling()
223 mpu3050->lpf << MPU3050_DLPF_CFG_SHIFT); in mpu3050_start_sampling()
228 ret = regmap_write(mpu3050->map, MPU3050_SMPLRT_DIV, mpu3050->divisor); in mpu3050_start_sampling()
233 * Max 50 ms start-up time after setting DLPF_FS_SYNC in mpu3050_start_sampling()
248 lpf = mpu3050->lpf; in mpu3050_set_8khz_samplerate()
249 divisor = mpu3050->divisor; in mpu3050_set_8khz_samplerate()
251 mpu3050->lpf = LPF_256_HZ_NOLPF; /* 8 kHz base frequency */ in mpu3050_set_8khz_samplerate()
252 mpu3050->divisor = 0; /* Divide by 1 */ in mpu3050_set_8khz_samplerate()
255 mpu3050->lpf = lpf; in mpu3050_set_8khz_samplerate()
256 mpu3050->divisor = divisor; in mpu3050_set_8khz_samplerate()
272 switch (chan->type) { in mpu3050_read_raw()
278 return -EINVAL; in mpu3050_read_raw()
281 switch (chan->type) { in mpu3050_read_raw()
283 *val = mpu3050->calibration[chan->scan_index-1]; in mpu3050_read_raw()
286 return -EINVAL; in mpu3050_read_raw()
292 switch (chan->type) { in mpu3050_read_raw()
306 *val = mpu3050_fs_precision[mpu3050->fullscale] * 2; in mpu3050_read_raw()
310 return -EINVAL; in mpu3050_read_raw()
314 pm_runtime_get_sync(mpu3050->dev); in mpu3050_read_raw()
315 mutex_lock(&mpu3050->lock); in mpu3050_read_raw()
321 switch (chan->type) { in mpu3050_read_raw()
323 ret = regmap_bulk_read(mpu3050->map, MPU3050_TEMP_H, in mpu3050_read_raw()
326 dev_err(mpu3050->dev, in mpu3050_read_raw()
336 ret = regmap_bulk_read(mpu3050->map, in mpu3050_read_raw()
337 MPU3050_AXIS_REGS(chan->scan_index-1), in mpu3050_read_raw()
341 dev_err(mpu3050->dev, in mpu3050_read_raw()
351 ret = -EINVAL; in mpu3050_read_raw()
358 return -EINVAL; in mpu3050_read_raw()
361 mutex_unlock(&mpu3050->lock); in mpu3050_read_raw()
362 pm_runtime_mark_last_busy(mpu3050->dev); in mpu3050_read_raw()
363 pm_runtime_put_autosuspend(mpu3050->dev); in mpu3050_read_raw()
391 if (chan->type != IIO_ANGL_VEL) in mpu3050_write_raw()
392 return -EINVAL; in mpu3050_write_raw()
393 mpu3050->calibration[chan->scan_index-1] = val; in mpu3050_write_raw()
401 return -EINVAL; in mpu3050_write_raw()
408 mpu3050->lpf = LPF_256_HZ_NOLPF; in mpu3050_write_raw()
409 mpu3050->divisor = DIV_ROUND_CLOSEST(8000, val) - 1; in mpu3050_write_raw()
413 mpu3050->lpf = LPF_188_HZ; in mpu3050_write_raw()
414 mpu3050->divisor = DIV_ROUND_CLOSEST(1000, val) - 1; in mpu3050_write_raw()
417 if (chan->type != IIO_ANGL_VEL) in mpu3050_write_raw()
418 return -EINVAL; in mpu3050_write_raw()
420 * We support +/-250, +/-500, +/-1000 and +/2000 deg/s in mpu3050_write_raw()
422 * which will be roughly +/-4.3, +/-8.7, +/-17.5, +/-35 in mpu3050_write_raw()
429 mpu3050->fullscale = FS_2000_DPS; in mpu3050_write_raw()
440 mpu3050->fullscale = FS_250_DPS; in mpu3050_write_raw()
443 mpu3050->fullscale = FS_500_DPS; in mpu3050_write_raw()
446 mpu3050->fullscale = FS_1000_DPS; in mpu3050_write_raw()
448 /* Catch-all */ in mpu3050_write_raw()
449 mpu3050->fullscale = FS_2000_DPS; in mpu3050_write_raw()
455 return -EINVAL; in mpu3050_write_raw()
461 struct iio_dev *indio_dev = pf->indio_dev; in mpu3050_trigger_handler()
481 timestamp = mpu3050->hw_timestamp; in mpu3050_trigger_handler()
485 mutex_lock(&mpu3050->lock); in mpu3050_trigger_handler()
488 if (mpu3050->hw_irq_trigger) { in mpu3050_trigger_handler()
495 ret = regmap_bulk_read(mpu3050->map, in mpu3050_trigger_handler()
504 dev_info(mpu3050->dev, in mpu3050_trigger_handler()
508 ret = regmap_update_bits(mpu3050->map, in mpu3050_trigger_handler()
515 dev_info(mpu3050->dev, "error resetting FIFO\n"); in mpu3050_trigger_handler()
518 mpu3050->pending_fifo_footer = false; in mpu3050_trigger_handler()
522 dev_dbg(mpu3050->dev, in mpu3050_trigger_handler()
539 if (mpu3050->pending_fifo_footer) { in mpu3050_trigger_handler()
549 ret = regmap_bulk_read(mpu3050->map, in mpu3050_trigger_handler()
554 dev_dbg(mpu3050->dev, in mpu3050_trigger_handler()
567 fifocnt -= toread; in mpu3050_trigger_handler()
569 mpu3050->pending_fifo_footer = true; in mpu3050_trigger_handler()
576 ret = regmap_bulk_read(mpu3050->map, in mpu3050_trigger_handler()
586 dev_dbg(mpu3050->dev, in mpu3050_trigger_handler()
606 * - We are using some other trigger (external, like an HRTimer) in mpu3050_trigger_handler()
611 * - The hardware trigger is active but unused and we actually use in mpu3050_trigger_handler()
617 dev_dbg(mpu3050->dev, in mpu3050_trigger_handler()
623 ret = regmap_bulk_read(mpu3050->map, MPU3050_TEMP_H, &hw_values, in mpu3050_trigger_handler()
626 dev_err(mpu3050->dev, in mpu3050_trigger_handler()
634 mutex_unlock(&mpu3050->lock); in mpu3050_trigger_handler()
635 iio_trigger_notify_done(indio_dev->trig); in mpu3050_trigger_handler()
644 pm_runtime_get_sync(mpu3050->dev); in mpu3050_buffer_preenable()
647 if (!mpu3050->hw_irq_trigger) in mpu3050_buffer_preenable()
657 pm_runtime_mark_last_busy(mpu3050->dev); in mpu3050_buffer_postdisable()
658 pm_runtime_put_autosuspend(mpu3050->dev); in mpu3050_buffer_postdisable()
676 return &mpu3050->orientation; in mpu3050_get_mount_matrix()
753 * mpu3050_read_mem() - read MPU-3050 internal memory
768 ret = regmap_write(mpu3050->map, in mpu3050_read_mem()
774 ret = regmap_write(mpu3050->map, in mpu3050_read_mem()
780 return regmap_bulk_read(mpu3050->map, in mpu3050_read_mem()
792 ret = regmap_update_bits(mpu3050->map, in mpu3050_hw_init()
800 ret = regmap_update_bits(mpu3050->map, in mpu3050_hw_init()
808 ret = regmap_write(mpu3050->map, in mpu3050_hw_init()
814 /* Read out the 8 bytes of OTP (one-time-programmable) memory */ in mpu3050_hw_init()
825 /* This is device-unique data so it goes into the entropy pool */ in mpu3050_hw_init()
828 dev_info(mpu3050->dev, in mpu3050_hw_init()
831 /* Die ID, bits 0-12 */ in mpu3050_hw_init()
833 /* Wafer ID, bits 13-17 */ in mpu3050_hw_init()
835 /* A lot ID, bits 18-33 */ in mpu3050_hw_init()
837 /* W lot ID, bits 34-45 */ in mpu3050_hw_init()
839 /* WP ID, bits 47-49 */ in mpu3050_hw_init()
841 /* rev ID, bits 50-55 */ in mpu3050_hw_init()
851 ret = regulator_bulk_enable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs); in mpu3050_power_up()
853 dev_err(mpu3050->dev, "cannot enable regulators\n"); in mpu3050_power_up()
857 * 20-100 ms start-up time for register read/write according to in mpu3050_power_up()
863 ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, in mpu3050_power_up()
866 dev_err(mpu3050->dev, "error setting power mode\n"); in mpu3050_power_up()
879 * Put MPU-3050 into sleep mode before cutting regulators. in mpu3050_power_down()
885 ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, in mpu3050_power_down()
888 dev_err(mpu3050->dev, "error putting to sleep\n"); in mpu3050_power_down()
890 ret = regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs); in mpu3050_power_down()
892 dev_err(mpu3050->dev, "error disabling regulators\n"); in mpu3050_power_down()
903 if (!mpu3050->hw_irq_trigger) in mpu3050_irq_handler()
907 mpu3050->hw_timestamp = iio_get_time_ns(indio_dev); in mpu3050_irq_handler()
921 ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val); in mpu3050_irq_thread()
923 dev_err(mpu3050->dev, "error reading IRQ status\n"); in mpu3050_irq_thread()
935 * mpu3050_drdy_trigger_set_state() - set data ready interrupt state
950 ret = regmap_write(mpu3050->map, in mpu3050_drdy_trigger_set_state()
954 dev_err(mpu3050->dev, "error disabling IRQ\n"); in mpu3050_drdy_trigger_set_state()
957 ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val); in mpu3050_drdy_trigger_set_state()
959 dev_err(mpu3050->dev, "error clearing IRQ status\n"); in mpu3050_drdy_trigger_set_state()
962 ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN, 0); in mpu3050_drdy_trigger_set_state()
964 dev_err(mpu3050->dev, "error disabling FIFO\n"); in mpu3050_drdy_trigger_set_state()
966 ret = regmap_write(mpu3050->map, MPU3050_USR_CTRL, in mpu3050_drdy_trigger_set_state()
969 dev_err(mpu3050->dev, "error resetting FIFO\n"); in mpu3050_drdy_trigger_set_state()
971 pm_runtime_mark_last_busy(mpu3050->dev); in mpu3050_drdy_trigger_set_state()
972 pm_runtime_put_autosuspend(mpu3050->dev); in mpu3050_drdy_trigger_set_state()
973 mpu3050->hw_irq_trigger = false; in mpu3050_drdy_trigger_set_state()
978 pm_runtime_get_sync(mpu3050->dev); in mpu3050_drdy_trigger_set_state()
979 mpu3050->hw_irq_trigger = true; in mpu3050_drdy_trigger_set_state()
982 ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN, 0); in mpu3050_drdy_trigger_set_state()
987 ret = regmap_update_bits(mpu3050->map, MPU3050_USR_CTRL, in mpu3050_drdy_trigger_set_state()
995 mpu3050->pending_fifo_footer = false; in mpu3050_drdy_trigger_set_state()
998 ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN, in mpu3050_drdy_trigger_set_state()
1013 ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val); in mpu3050_drdy_trigger_set_state()
1015 dev_err(mpu3050->dev, "error clearing IRQ status\n"); in mpu3050_drdy_trigger_set_state()
1020 if (mpu3050->irq_actl) in mpu3050_drdy_trigger_set_state()
1022 if (mpu3050->irq_latch) in mpu3050_drdy_trigger_set_state()
1024 if (mpu3050->irq_opendrain) in mpu3050_drdy_trigger_set_state()
1027 ret = regmap_write(mpu3050->map, MPU3050_INT_CFG, val); in mpu3050_drdy_trigger_set_state()
1045 mpu3050->trig = devm_iio_trigger_alloc(&indio_dev->dev, in mpu3050_trigger_probe()
1046 "%s-dev%d", in mpu3050_trigger_probe()
1047 indio_dev->name, in mpu3050_trigger_probe()
1048 indio_dev->id); in mpu3050_trigger_probe()
1049 if (!mpu3050->trig) in mpu3050_trigger_probe()
1050 return -ENOMEM; in mpu3050_trigger_probe()
1053 if (of_property_read_bool(mpu3050->dev->of_node, "drive-open-drain")) in mpu3050_trigger_probe()
1054 mpu3050->irq_opendrain = true; in mpu3050_trigger_probe()
1064 dev_info(&indio_dev->dev, in mpu3050_trigger_probe()
1068 mpu3050->irq_actl = true; in mpu3050_trigger_probe()
1069 dev_info(&indio_dev->dev, in mpu3050_trigger_probe()
1073 mpu3050->irq_latch = true; in mpu3050_trigger_probe()
1074 dev_info(&indio_dev->dev, in mpu3050_trigger_probe()
1084 mpu3050->irq_latch = true; in mpu3050_trigger_probe()
1085 mpu3050->irq_actl = true; in mpu3050_trigger_probe()
1087 dev_info(&indio_dev->dev, in mpu3050_trigger_probe()
1092 dev_err(&indio_dev->dev, in mpu3050_trigger_probe()
1100 if (mpu3050->irq_opendrain) in mpu3050_trigger_probe()
1107 mpu3050->trig->name, in mpu3050_trigger_probe()
1108 mpu3050->trig); in mpu3050_trigger_probe()
1110 dev_err(mpu3050->dev, in mpu3050_trigger_probe()
1115 mpu3050->irq = irq; in mpu3050_trigger_probe()
1116 mpu3050->trig->dev.parent = mpu3050->dev; in mpu3050_trigger_probe()
1117 mpu3050->trig->ops = &mpu3050_trigger_ops; in mpu3050_trigger_probe()
1118 iio_trigger_set_drvdata(mpu3050->trig, indio_dev); in mpu3050_trigger_probe()
1120 ret = iio_trigger_register(mpu3050->trig); in mpu3050_trigger_probe()
1124 indio_dev->trig = iio_trigger_get(mpu3050->trig); in mpu3050_trigger_probe()
1141 return -ENOMEM; in mpu3050_common_probe()
1144 mpu3050->dev = dev; in mpu3050_common_probe()
1145 mpu3050->map = map; in mpu3050_common_probe()
1146 mutex_init(&mpu3050->lock); in mpu3050_common_probe()
1148 mpu3050->fullscale = FS_2000_DPS; in mpu3050_common_probe()
1150 mpu3050->lpf = MPU3050_DLPF_CFG_188HZ; in mpu3050_common_probe()
1151 mpu3050->divisor = 99; in mpu3050_common_probe()
1154 ret = iio_read_mount_matrix(dev, "mount-matrix", &mpu3050->orientation); in mpu3050_common_probe()
1159 mpu3050->regs[0].supply = mpu3050_reg_vdd; in mpu3050_common_probe()
1160 mpu3050->regs[1].supply = mpu3050_reg_vlogic; in mpu3050_common_probe()
1161 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(mpu3050->regs), in mpu3050_common_probe()
1162 mpu3050->regs); in mpu3050_common_probe()
1175 ret = -ENODEV; in mpu3050_common_probe()
1183 ret = -ENODEV; in mpu3050_common_probe()
1190 ret = -ENODEV; in mpu3050_common_probe()
1194 dev_info(dev, "found MPU-3050 part no: %d, version: %d\n", in mpu3050_common_probe()
1201 indio_dev->dev.parent = dev; in mpu3050_common_probe()
1202 indio_dev->channels = mpu3050_channels; in mpu3050_common_probe()
1203 indio_dev->num_channels = ARRAY_SIZE(mpu3050_channels); in mpu3050_common_probe()
1204 indio_dev->info = &mpu3050_info; in mpu3050_common_probe()
1205 indio_dev->available_scan_masks = mpu3050_scan_masks; in mpu3050_common_probe()
1206 indio_dev->modes = INDIO_DIRECT_MODE; in mpu3050_common_probe()
1207 indio_dev->name = name; in mpu3050_common_probe()
1237 * Set autosuspend to two orders of magnitude larger than the in mpu3050_common_probe()
1238 * start-up time. 100ms start-up time means 10000ms autosuspend, in mpu3050_common_probe()
1265 if (mpu3050->irq) in mpu3050_common_remove()
1266 free_irq(mpu3050->irq, mpu3050); in mpu3050_common_remove()