117 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_read_event_config()  local
119 	return (bool)(xadc->alarm_mask & xadc_get_alarm_mask(chan));  in xadc_read_event_config()
127 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_write_event_config()  local
131 	mutex_lock(&xadc->mutex);  in xadc_write_event_config()
134 		xadc->alarm_mask |= alarm;  in xadc_write_event_config()
136 		xadc->alarm_mask &= ~alarm;  in xadc_write_event_config()
138 	xadc->ops->update_alarm(xadc, xadc->alarm_mask);  in xadc_write_event_config()
140 	ret = _xadc_read_adc_reg(xadc, XADC_REG_CONF1, &cfg);  in xadc_write_event_config()
146 	cfg &= ~((xadc->alarm_mask & 0xf0) << 4); /* bram, pint, paux, ddr */  in xadc_write_event_config()
147 	cfg &= ~((xadc->alarm_mask & 0x08) >> 3); /* ot */  in xadc_write_event_config()
148 	cfg &= ~((xadc->alarm_mask & 0x07) << 1); /* temp, vccint, vccaux */  in xadc_write_event_config()
150 		ret = _xadc_write_adc_reg(xadc, XADC_REG_CONF1, cfg);  in xadc_write_event_config()
153 	mutex_unlock(&xadc->mutex);  in xadc_write_event_config()
167 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_read_event_value()  local
171 		*val = xadc->threshold[offset];  in xadc_read_event_value()
174 		*val = xadc->temp_hysteresis;  in xadc_read_event_value()
191 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_write_event_value()  local
199 	mutex_lock(&xadc->mutex);  in xadc_write_event_value()
203 		xadc->threshold[offset] = val;  in xadc_write_event_value()
206 		xadc->temp_hysteresis = val;  in xadc_write_event_value()
209 		mutex_unlock(&xadc->mutex);  in xadc_write_event_value()
227 		if (xadc->threshold[offset] < xadc->temp_hysteresis)  in xadc_write_event_value()
228 			xadc->threshold[offset + 4] = 0;  in xadc_write_event_value()
230 			xadc->threshold[offset + 4] = xadc->threshold[offset] -  in xadc_write_event_value()
231 					xadc->temp_hysteresis;  in xadc_write_event_value()
232 		ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset + 4),  in xadc_write_event_value()
233 			xadc->threshold[offset + 4]);  in xadc_write_event_value()
239 		ret = _xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(offset), val);  in xadc_write_event_value()
242 	mutex_unlock(&xadc->mutex);  in xadc_write_event_value()