105 static void xadc_write_reg(struct xadc *xadc, unsigned int reg,  in xadc_write_reg()  argument
108 	writel(val, xadc->base + reg);  in xadc_write_reg()
111 static void xadc_read_reg(struct xadc *xadc, unsigned int reg,  in xadc_read_reg()  argument
114 	*val = readl(xadc->base + reg);  in xadc_read_reg()
127 static void xadc_zynq_write_fifo(struct xadc *xadc, uint32_t *cmd,  in xadc_zynq_write_fifo()  argument
133 		xadc_write_reg(xadc, XADC_ZYNQ_REG_CFIFO, cmd[i]);  in xadc_zynq_write_fifo()
136 static void xadc_zynq_drain_fifo(struct xadc *xadc)  in xadc_zynq_drain_fifo()  argument
140 	xadc_read_reg(xadc, XADC_ZYNQ_REG_STATUS, &status);  in xadc_zynq_drain_fifo()
143 		xadc_read_reg(xadc, XADC_ZYNQ_REG_DFIFO, &tmp);  in xadc_zynq_drain_fifo()
144 		xadc_read_reg(xadc, XADC_ZYNQ_REG_STATUS, &status);  in xadc_zynq_drain_fifo()
148 static void xadc_zynq_update_intmsk(struct xadc *xadc, unsigned int mask,  in xadc_zynq_update_intmsk()  argument
151 	xadc->zynq_intmask &= ~mask;  in xadc_zynq_update_intmsk()
152 	xadc->zynq_intmask |= val;  in xadc_zynq_update_intmsk()
154 	xadc_write_reg(xadc, XADC_ZYNQ_REG_INTMSK,  in xadc_zynq_update_intmsk()
155 		xadc->zynq_intmask | xadc->zynq_masked_alarm);  in xadc_zynq_update_intmsk()
158 static int xadc_zynq_write_adc_reg(struct xadc *xadc, unsigned int reg,  in xadc_zynq_write_adc_reg()  argument
165 	spin_lock_irq(&xadc->lock);  in xadc_zynq_write_adc_reg()
166 	xadc_zynq_update_intmsk(xadc, XADC_ZYNQ_INT_DFIFO_GTH,  in xadc_zynq_write_adc_reg()
169 	reinit_completion(&xadc->completion);  in xadc_zynq_write_adc_reg()
172 	xadc_zynq_write_fifo(xadc, cmd, ARRAY_SIZE(cmd));  in xadc_zynq_write_adc_reg()
173 	xadc_read_reg(xadc, XADC_ZYNQ_REG_CFG, &tmp);  in xadc_zynq_write_adc_reg()
176 	xadc_write_reg(xadc, XADC_ZYNQ_REG_CFG, tmp);  in xadc_zynq_write_adc_reg()
178 	xadc_zynq_update_intmsk(xadc, XADC_ZYNQ_INT_DFIFO_GTH, 0);  in xadc_zynq_write_adc_reg()
179 	spin_unlock_irq(&xadc->lock);  in xadc_zynq_write_adc_reg()
181 	ret = wait_for_completion_interruptible_timeout(&xadc->completion, HZ);  in xadc_zynq_write_adc_reg()
187 	xadc_read_reg(xadc, XADC_ZYNQ_REG_DFIFO, &tmp);  in xadc_zynq_write_adc_reg()
192 static int xadc_zynq_read_adc_reg(struct xadc *xadc, unsigned int reg,  in xadc_zynq_read_adc_reg()  argument
202 	spin_lock_irq(&xadc->lock);  in xadc_zynq_read_adc_reg()
203 	xadc_zynq_update_intmsk(xadc, XADC_ZYNQ_INT_DFIFO_GTH,  in xadc_zynq_read_adc_reg()
205 	xadc_zynq_drain_fifo(xadc);  in xadc_zynq_read_adc_reg()
206 	reinit_completion(&xadc->completion);  in xadc_zynq_read_adc_reg()
208 	xadc_zynq_write_fifo(xadc, cmd, ARRAY_SIZE(cmd));  in xadc_zynq_read_adc_reg()
209 	xadc_read_reg(xadc, XADC_ZYNQ_REG_CFG, &tmp);  in xadc_zynq_read_adc_reg()
212 	xadc_write_reg(xadc, XADC_ZYNQ_REG_CFG, tmp);  in xadc_zynq_read_adc_reg()
214 	xadc_zynq_update_intmsk(xadc, XADC_ZYNQ_INT_DFIFO_GTH, 0);  in xadc_zynq_read_adc_reg()
215 	spin_unlock_irq(&xadc->lock);  in xadc_zynq_read_adc_reg()
216 	ret = wait_for_completion_interruptible_timeout(&xadc->completion, HZ);  in xadc_zynq_read_adc_reg()
222 	xadc_read_reg(xadc, XADC_ZYNQ_REG_DFIFO, &resp);  in xadc_zynq_read_adc_reg()
223 	xadc_read_reg(xadc, XADC_ZYNQ_REG_DFIFO, &resp);  in xadc_zynq_read_adc_reg()
247 	struct xadc *xadc = container_of(work, struct xadc, zynq_unmask_work.work);  in xadc_zynq_unmask_worker()  local
250 	xadc_read_reg(xadc, XADC_ZYNQ_REG_STATUS, &misc_sts);  in xadc_zynq_unmask_worker()
254 	spin_lock_irq(&xadc->lock);  in xadc_zynq_unmask_worker()
257 	unmask = (xadc->zynq_masked_alarm ^ misc_sts) & xadc->zynq_masked_alarm;  in xadc_zynq_unmask_worker()
258 	xadc->zynq_masked_alarm &= misc_sts;  in xadc_zynq_unmask_worker()
261 	xadc->zynq_masked_alarm &= ~xadc->zynq_intmask;  in xadc_zynq_unmask_worker()
264 	xadc_write_reg(xadc, XADC_ZYNQ_REG_INTSTS, unmask);  in xadc_zynq_unmask_worker()
266 	xadc_zynq_update_intmsk(xadc, 0, 0);  in xadc_zynq_unmask_worker()
268 	spin_unlock_irq(&xadc->lock);  in xadc_zynq_unmask_worker()
271 	if (xadc->zynq_masked_alarm) {  in xadc_zynq_unmask_worker()
272 		schedule_delayed_work(&xadc->zynq_unmask_work,  in xadc_zynq_unmask_worker()
281 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_zynq_interrupt_handler()  local
284 	xadc_read_reg(xadc, XADC_ZYNQ_REG_INTSTS, &status);  in xadc_zynq_interrupt_handler()
286 	status &= ~(xadc->zynq_intmask | xadc->zynq_masked_alarm);  in xadc_zynq_interrupt_handler()
291 	spin_lock(&xadc->lock);  in xadc_zynq_interrupt_handler()
293 	xadc_write_reg(xadc, XADC_ZYNQ_REG_INTSTS, status);  in xadc_zynq_interrupt_handler()
296 		xadc_zynq_update_intmsk(xadc, XADC_ZYNQ_INT_DFIFO_GTH,  in xadc_zynq_interrupt_handler()
298 		complete(&xadc->completion);  in xadc_zynq_interrupt_handler()
303 		xadc->zynq_masked_alarm |= status;  in xadc_zynq_interrupt_handler()
308 		xadc_zynq_update_intmsk(xadc, 0, 0);  in xadc_zynq_interrupt_handler()
314 		schedule_delayed_work(&xadc->zynq_unmask_work,  in xadc_zynq_interrupt_handler()
317 	spin_unlock(&xadc->lock);  in xadc_zynq_interrupt_handler()
329 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_zynq_setup()  local
341 	xadc->zynq_intmask = ~0;  in xadc_zynq_setup()
343 	pcap_rate = clk_get_rate(xadc->clk);  in xadc_zynq_setup()
348 		ret = clk_set_rate(xadc->clk,  in xadc_zynq_setup()
371 	xadc_write_reg(xadc, XADC_ZYNQ_REG_CTL, XADC_ZYNQ_CTL_RESET);  in xadc_zynq_setup()
372 	xadc_write_reg(xadc, XADC_ZYNQ_REG_CTL, 0);  in xadc_zynq_setup()
373 	xadc_write_reg(xadc, XADC_ZYNQ_REG_INTSTS, ~0);  in xadc_zynq_setup()
374 	xadc_write_reg(xadc, XADC_ZYNQ_REG_INTMSK, xadc->zynq_intmask);  in xadc_zynq_setup()
375 	xadc_write_reg(xadc, XADC_ZYNQ_REG_CFG, XADC_ZYNQ_CFG_ENABLE |  in xadc_zynq_setup()
380 		ret = clk_set_rate(xadc->clk, pcap_rate);  in xadc_zynq_setup()
388 static unsigned long xadc_zynq_get_dclk_rate(struct xadc *xadc)  in xadc_zynq_get_dclk_rate()  argument
393 	xadc_read_reg(xadc, XADC_ZYNQ_REG_CFG, &val);  in xadc_zynq_get_dclk_rate()
410 	return clk_get_rate(xadc->clk) / div;  in xadc_zynq_get_dclk_rate()
413 static void xadc_zynq_update_alarm(struct xadc *xadc, unsigned int alarm)  in xadc_zynq_update_alarm()  argument
421 	spin_lock_irqsave(&xadc->lock, flags);  in xadc_zynq_update_alarm()
424 	xadc_read_reg(xadc, XADC_ZYNQ_REG_INTSTS, &status);  in xadc_zynq_update_alarm()
425 	xadc_write_reg(xadc, XADC_ZYNQ_REG_INTSTS, status & alarm);  in xadc_zynq_update_alarm()
427 	xadc_zynq_update_intmsk(xadc, XADC_ZYNQ_INT_ALARM_MASK,  in xadc_zynq_update_alarm()
430 	spin_unlock_irqrestore(&xadc->lock, flags);  in xadc_zynq_update_alarm()
442 static int xadc_axi_read_adc_reg(struct xadc *xadc, unsigned int reg,  in xadc_axi_read_adc_reg()  argument
447 	xadc_read_reg(xadc, XADC_AXI_ADC_REG_OFFSET + reg * 4, &val32);  in xadc_axi_read_adc_reg()
453 static int xadc_axi_write_adc_reg(struct xadc *xadc, unsigned int reg,  in xadc_axi_write_adc_reg()  argument
456 	xadc_write_reg(xadc, XADC_AXI_ADC_REG_OFFSET + reg * 4, val);  in xadc_axi_write_adc_reg()
464 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_axi_setup()  local
466 	xadc_write_reg(xadc, XADC_AXI_REG_RESET, XADC_AXI_RESET_MAGIC);  in xadc_axi_setup()
467 	xadc_write_reg(xadc, XADC_AXI_REG_GIER, XADC_AXI_GIER_ENABLE);  in xadc_axi_setup()
475 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_axi_interrupt_handler()  local
479 	xadc_read_reg(xadc, XADC_AXI_REG_IPISR, &status);  in xadc_axi_interrupt_handler()
480 	xadc_read_reg(xadc, XADC_AXI_REG_IPIER, &mask);  in xadc_axi_interrupt_handler()
486 	if ((status & XADC_AXI_INT_EOS) && xadc->trigger)  in xadc_axi_interrupt_handler()
487 		iio_trigger_poll(xadc->trigger);  in xadc_axi_interrupt_handler()
502 	xadc_write_reg(xadc, XADC_AXI_REG_IPISR, status);  in xadc_axi_interrupt_handler()
507 static void xadc_axi_update_alarm(struct xadc *xadc, unsigned int alarm)  in xadc_axi_update_alarm()  argument
521 	spin_lock_irqsave(&xadc->lock, flags);  in xadc_axi_update_alarm()
522 	xadc_read_reg(xadc, XADC_AXI_REG_IPIER, &val);  in xadc_axi_update_alarm()
525 	xadc_write_reg(xadc, XADC_AXI_REG_IPIER, val);  in xadc_axi_update_alarm()
526 	spin_unlock_irqrestore(&xadc->lock, flags);  in xadc_axi_update_alarm()
529 static unsigned long xadc_axi_get_dclk(struct xadc *xadc)  in xadc_axi_get_dclk()  argument
531 	return clk_get_rate(xadc->clk);  in xadc_axi_get_dclk()
544 static int _xadc_update_adc_reg(struct xadc *xadc, unsigned int reg,  in _xadc_update_adc_reg()  argument
550 	ret = _xadc_read_adc_reg(xadc, reg, &tmp);  in _xadc_update_adc_reg()
554 	return _xadc_write_adc_reg(xadc, reg, (tmp & ~mask) | val);  in _xadc_update_adc_reg()
557 static int xadc_update_adc_reg(struct xadc *xadc, unsigned int reg,  in xadc_update_adc_reg()  argument
562 	mutex_lock(&xadc->mutex);  in xadc_update_adc_reg()
563 	ret = _xadc_update_adc_reg(xadc, reg, mask, val);  in xadc_update_adc_reg()
564 	mutex_unlock(&xadc->mutex);  in xadc_update_adc_reg()
569 static unsigned long xadc_get_dclk_rate(struct xadc *xadc)  in xadc_get_dclk_rate()  argument
571 	return xadc->ops->get_dclk_rate(xadc);  in xadc_get_dclk_rate()
577 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_update_scan_mode()  local
582 	kfree(xadc->data);  in xadc_update_scan_mode()
583 	xadc->data = kcalloc(n, sizeof(*xadc->data), GFP_KERNEL);  in xadc_update_scan_mode()
584 	if (!xadc->data)  in xadc_update_scan_mode()
622 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_trigger_handler()  local
626 	if (!xadc->data)  in xadc_trigger_handler()
633 		xadc_read_adc_reg(xadc, chan, &xadc->data[j]);  in xadc_trigger_handler()
637 	iio_push_to_buffers(indio_dev, xadc->data);  in xadc_trigger_handler()
647 	struct xadc *xadc = iio_trigger_get_drvdata(trigger);  in xadc_trigger_set_state()  local
653 	mutex_lock(&xadc->mutex);  in xadc_trigger_set_state()
657 		if (xadc->trigger != NULL) {  in xadc_trigger_set_state()
661 			xadc->trigger = trigger;  in xadc_trigger_set_state()
662 			if (trigger == xadc->convst_trigger)  in xadc_trigger_set_state()
667 		ret = _xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF0_EC,  in xadc_trigger_set_state()
672 		xadc->trigger = NULL;  in xadc_trigger_set_state()
675 	spin_lock_irqsave(&xadc->lock, flags);  in xadc_trigger_set_state()
676 	xadc_read_reg(xadc, XADC_AXI_REG_IPIER, &val);  in xadc_trigger_set_state()
677 	xadc_write_reg(xadc, XADC_AXI_REG_IPISR, val & XADC_AXI_INT_EOS);  in xadc_trigger_set_state()
682 	xadc_write_reg(xadc, XADC_AXI_REG_IPIER, val);  in xadc_trigger_set_state()
683 	spin_unlock_irqrestore(&xadc->lock, flags);  in xadc_trigger_set_state()
686 	mutex_unlock(&xadc->mutex);  in xadc_trigger_set_state()
721 static int xadc_power_adc_b(struct xadc *xadc, unsigned int seq_mode)  in xadc_power_adc_b()  argument
735 	return xadc_update_adc_reg(xadc, XADC_REG_CONF2, XADC_CONF2_PD_MASK,  in xadc_power_adc_b()
739 static int xadc_get_seq_mode(struct xadc *xadc, unsigned long scan_mode)  in xadc_get_seq_mode()  argument
743 	if (xadc->external_mux_mode == XADC_EXTERNAL_MUX_DUAL)  in xadc_get_seq_mode()
755 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_postdisable()  local
765 	ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(0), scan_mask & 0xffff);  in xadc_postdisable()
769 	ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(1), scan_mask >> 16);  in xadc_postdisable()
773 	ret = xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_SEQ_MASK,  in xadc_postdisable()
778 	return xadc_power_adc_b(xadc, XADC_CONF1_SEQ_CONTINUOUS);  in xadc_postdisable()
783 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_preenable()  local
788 	ret = xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_SEQ_MASK,  in xadc_preenable()
794 	seq_mode = xadc_get_seq_mode(xadc, scan_mask);  in xadc_preenable()
796 	ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(0), scan_mask & 0xffff);  in xadc_preenable()
800 	ret = xadc_write_adc_reg(xadc, XADC_REG_SEQ(1), scan_mask >> 16);  in xadc_preenable()
804 	ret = xadc_power_adc_b(xadc, seq_mode);  in xadc_preenable()
808 	ret = xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_SEQ_MASK,  in xadc_preenable()
829 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_read_raw()  local
838 		ret = xadc_read_adc_reg(xadc, chan->address, &val16);  in xadc_read_raw()
883 		ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16);  in xadc_read_raw()
891 		*val = xadc_get_dclk_rate(xadc) / div / 26;  in xadc_read_raw()
902 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_write_raw()  local
903 	unsigned long clk_rate = xadc_get_dclk_rate(xadc);  in xadc_write_raw()
937 	return xadc_update_adc_reg(xadc, XADC_REG_CONF2, XADC_CONF2_DIV_MASK,  in xadc_write_raw()
1059 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_parse_dt()  local
1072 		xadc->external_mux_mode = XADC_EXTERNAL_MUX_NONE;  in xadc_parse_dt()
1074 		xadc->external_mux_mode = XADC_EXTERNAL_MUX_SINGLE;  in xadc_parse_dt()
1076 		xadc->external_mux_mode = XADC_EXTERNAL_MUX_DUAL;  in xadc_parse_dt()
1080 	if (xadc->external_mux_mode != XADC_EXTERNAL_MUX_NONE) {  in xadc_parse_dt()
1086 		if (xadc->external_mux_mode == XADC_EXTERNAL_MUX_SINGLE) {  in xadc_parse_dt()
1155 	struct xadc *xadc;  in xadc_probe()  local
1171 	indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*xadc));  in xadc_probe()
1175 	xadc = iio_priv(indio_dev);  in xadc_probe()
1176 	xadc->ops = id->data;  in xadc_probe()
1177 	xadc->irq = irq;  in xadc_probe()
1178 	init_completion(&xadc->completion);  in xadc_probe()
1179 	mutex_init(&xadc->mutex);  in xadc_probe()
1180 	spin_lock_init(&xadc->lock);  in xadc_probe()
1181 	INIT_DELAYED_WORK(&xadc->zynq_unmask_work, xadc_zynq_unmask_worker);  in xadc_probe()
1184 	xadc->base = devm_ioremap_resource(&pdev->dev, mem);  in xadc_probe()
1185 	if (IS_ERR(xadc->base))  in xadc_probe()
1186 		return PTR_ERR(xadc->base);  in xadc_probe()
1198 	if (xadc->ops->flags & XADC_FLAGS_BUFFERED) {  in xadc_probe()
1205 		xadc->convst_trigger = xadc_alloc_trigger(indio_dev, "convst");  in xadc_probe()
1206 		if (IS_ERR(xadc->convst_trigger)) {  in xadc_probe()
1207 			ret = PTR_ERR(xadc->convst_trigger);  in xadc_probe()
1210 		xadc->samplerate_trigger = xadc_alloc_trigger(indio_dev,  in xadc_probe()
1212 		if (IS_ERR(xadc->samplerate_trigger)) {  in xadc_probe()
1213 			ret = PTR_ERR(xadc->samplerate_trigger);  in xadc_probe()
1218 	xadc->clk = devm_clk_get(&pdev->dev, NULL);  in xadc_probe()
1219 	if (IS_ERR(xadc->clk)) {  in xadc_probe()
1220 		ret = PTR_ERR(xadc->clk);  in xadc_probe()
1224 	ret = clk_prepare_enable(xadc->clk);  in xadc_probe()
1228 	ret = request_irq(xadc->irq, xadc->ops->interrupt_handler, 0,  in xadc_probe()
1233 	ret = xadc->ops->setup(pdev, indio_dev, xadc->irq);  in xadc_probe()
1238 		xadc_read_adc_reg(xadc, XADC_REG_THRESHOLD(i),  in xadc_probe()
1239 			&xadc->threshold[i]);  in xadc_probe()
1241 	ret = xadc_write_adc_reg(xadc, XADC_REG_CONF0, conf0);  in xadc_probe()
1251 	ret = xadc_write_adc_reg(xadc, XADC_REG_INPUT_MODE(0), bipolar_mask);  in xadc_probe()
1254 	ret = xadc_write_adc_reg(xadc, XADC_REG_INPUT_MODE(1),  in xadc_probe()
1260 	ret = xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_ALARM_MASK,  in xadc_probe()
1272 			xadc->threshold[i] = 0xffff;  in xadc_probe()
1274 			xadc->threshold[i] = 0;  in xadc_probe()
1275 		ret = xadc_write_adc_reg(xadc, XADC_REG_THRESHOLD(i),  in xadc_probe()
1276 			xadc->threshold[i]);  in xadc_probe()
1293 	free_irq(xadc->irq, indio_dev);  in xadc_probe()
1294 	cancel_delayed_work_sync(&xadc->zynq_unmask_work);  in xadc_probe()
1296 	clk_disable_unprepare(xadc->clk);  in xadc_probe()
1298 	if (xadc->ops->flags & XADC_FLAGS_BUFFERED)  in xadc_probe()
1299 		iio_trigger_free(xadc->samplerate_trigger);  in xadc_probe()
1301 	if (xadc->ops->flags & XADC_FLAGS_BUFFERED)  in xadc_probe()
1302 		iio_trigger_free(xadc->convst_trigger);  in xadc_probe()
1304 	if (xadc->ops->flags & XADC_FLAGS_BUFFERED)  in xadc_probe()
1315 	struct xadc *xadc = iio_priv(indio_dev);  in xadc_remove()  local
1318 	if (xadc->ops->flags & XADC_FLAGS_BUFFERED) {  in xadc_remove()
1319 		iio_trigger_free(xadc->samplerate_trigger);  in xadc_remove()
1320 		iio_trigger_free(xadc->convst_trigger);  in xadc_remove()
1323 	free_irq(xadc->irq, indio_dev);  in xadc_remove()
1324 	cancel_delayed_work_sync(&xadc->zynq_unmask_work);  in xadc_remove()
1325 	clk_disable_unprepare(xadc->clk);  in xadc_remove()
1326 	kfree(xadc->data);  in xadc_remove()