59 	u32				timings[4];  member
416 		writel(pmif->timings[1], PMAC_IDE_REG(IDE_TIMING_CONFIG));  in pmac_ide_apply_timings()
418 		writel(pmif->timings[0], PMAC_IDE_REG(IDE_TIMING_CONFIG));  in pmac_ide_apply_timings()
433 		writel(pmif->timings[1], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));  in pmac_ide_kauai_apply_timings()
434 		writel(pmif->timings[3], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));  in pmac_ide_kauai_apply_timings()
436 		writel(pmif->timings[0], PMAC_IDE_REG(IDE_KAUAI_PIO_CONFIG));  in pmac_ide_kauai_apply_timings()
437 		writel(pmif->timings[2], PMAC_IDE_REG(IDE_KAUAI_ULTRA_CONFIG));  in pmac_ide_kauai_apply_timings()
497 	u32 *timings, t;  in pmac_ide_set_pio_mode()  local
503 	timings = &pmif->timings[drive->dn & 1];  in pmac_ide_set_pio_mode()
504 	t = *timings;  in pmac_ide_set_pio_mode()
564 		drive->name, pio,  *timings);  in pmac_ide_set_pio_mode()
567 	*timings = t;  in pmac_ide_set_pio_mode()
575 set_timings_udma_ata4(u32 *timings, u8 speed)  in set_timings_udma_ata4()  argument
586 	*timings = ((*timings) & ~(TR_66_UDMA_MASK | TR_66_MDMA_MASK)) |  in set_timings_udma_ata4()
593 		speed & 0xf,  *timings);  in set_timings_udma_ata4()
639 set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,  in set_timings_mdma()  argument
702 		*timings = ((*timings) & ~TR_133_PIOREG_MDMA_MASK) | tr;  in set_timings_mdma()
710 		*timings = ((*timings) & ~TR_100_PIOREG_MDMA_MASK) | tr;  in set_timings_mdma()
723 		*timings = ((*timings) & ~(TR_66_MDMA_MASK | TR_66_UDMA_MASK)) |  in set_timings_mdma()
736 		*timings = ((*timings) & ~TR_33_MDMA_MASK) |  in set_timings_mdma()
760 		*timings = ((*timings) & ~TR_33_MDMA_MASK) |  in set_timings_mdma()
764 			*timings |= TR_33_MDMA_HALFTICK;  in set_timings_mdma()
769 		drive->name, speed & 0xf,  *timings);  in set_timings_mdma()
777 	u32 *timings, *timings2, tl[2];  in pmac_ide_set_dma_mode()  local
781 	timings = &pmif->timings[unit];  in pmac_ide_set_dma_mode()
782 	timings2 = &pmif->timings[unit+2];  in pmac_ide_set_dma_mode()
785 	tl[0] = *timings;  in pmac_ide_set_dma_mode()
805 	*timings = tl[0];  in pmac_ide_set_dma_mode()
842 	pmif->timings[0] = pmif->timings[1] = value;  in sanitize_timings()
843 	pmif->timings[2] = pmif->timings[3] = value2;  in sanitize_timings()
857 	pmif->timings[0] = 0;  in pmac_ide_do_suspend()
858 	pmif->timings[1] = 0;  in pmac_ide_do_suspend()
1541 	if (ata4 && (pmif->timings[unit] & TR_66_UDMA_EN)) {  in pmac_ide_dma_setup()
1542 		writel(pmif->timings[unit] + (write ? 0 : 0x00800000UL),  in pmac_ide_dma_setup()