Lines Matching refs:SYNQUACER_I2C_REG_BCR
27 #define SYNQUACER_I2C_REG_BCR (0x01 << 2) // Bus Control macro
184 writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_stop()
245 writeb(0, i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_hw_init()
269 bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_master_start()
281 i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_master_start()
291 i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_master_start()
298 bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_master_start()
365 bcr = readb(i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_isr()
419 i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_isr()
454 i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_isr()
462 i2c->base + SYNQUACER_I2C_REG_BCR); in synquacer_i2c_isr()