Lines Matching refs:STM32F7_I2C_CR2
40 #define STM32F7_I2C_CR2 0x04 macro
697 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
707 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_reload()
727 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
730 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_reload()
787 cr2 = readl_relaxed(base + STM32F7_I2C_CR2); in stm32f7_i2c_xfer_msg()
855 writel_relaxed(cr2, base + STM32F7_I2C_CR2); in stm32f7_i2c_xfer_msg()
871 cr2 = readl_relaxed(base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_xfer_msg()
1021 writel_relaxed(cr2, base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_xfer_msg()
1033 cr2 = readl_relaxed(base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_rep_start()
1105 writel_relaxed(cr2, base + STM32F7_I2C_CR2); in stm32f7_i2c_smbus_rep_start()
1185 stm32f7_i2c_clr_bits(base + STM32F7_I2C_CR2, mask); in stm32f7_i2c_slave_start()
1203 stm32f7_i2c_set_bits(base + STM32F7_I2C_CR2, mask); in stm32f7_i2c_slave_start()
1339 cr2 = readl_relaxed(i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1341 writel_relaxed(cr2, i2c_dev->base + STM32F7_I2C_CR2); in stm32f7_i2c_slave_isr_event()
1344 stm32f7_i2c_set_bits(base + STM32F7_I2C_CR2, mask); in stm32f7_i2c_slave_isr_event()
1439 stm32f7_i2c_set_bits(base + STM32F7_I2C_CR2, mask); in stm32f7_i2c_isr_event()
1732 stm32f7_i2c_clr_bits(base + STM32F7_I2C_CR2, STM32F7_I2C_CR2_NACK); in stm32f7_i2c_reg_slave()