86 #define I2C_REG_STS(a)	((a)->ioaddr + 0x04)	/* Status reg (RO) */  macro
102 			(ioread32(I2C_REG_STS(data)) & mstatus_active)) {  in wait_timeout()
166 			ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_start()
168 	} else if (ioread32(I2C_REG_STS(alg_data)) & mstatus_afi) {  in i2c_pnx_start()
180 	iowrite32(ioread32(I2C_REG_STS(alg_data)) | mstatus_tdi | mstatus_afi,  in i2c_pnx_start()
181 		  I2C_REG_STS(alg_data));  in i2c_pnx_start()
207 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_stop()
214 	       (ioread32(I2C_REG_STS(alg_data)) & mstatus_active)) {  in i2c_pnx_stop()
221 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_stop()
235 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_master_xmit()
289 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_master_xmit()
306 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_master_rcv()
311 	if (ioread32(I2C_REG_STS(alg_data)) & mstatus_rfe) {  in i2c_pnx_master_rcv()
374 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_master_rcv()
387 		ioread32(I2C_REG_STS(alg_data)),  in i2c_pnx_interrupt()
390 	stat = ioread32(I2C_REG_STS(alg_data));  in i2c_pnx_interrupt()
445 	stat = ioread32(I2C_REG_STS(alg_data));  in i2c_pnx_interrupt()
446 	iowrite32(stat | mstatus_tdi | mstatus_afi, I2C_REG_STS(alg_data));  in i2c_pnx_interrupt()
450 		 __func__, ioread32(I2C_REG_STS(alg_data)),  in i2c_pnx_interrupt()
463 		ioread32(I2C_REG_STS(alg_data)),  in i2c_pnx_timeout()
482 	if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_active) {  in bus_reset_if_active()
521 		__func__, num, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_xfer()
576 		if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_tdi) {  in i2c_pnx_xfer()
580 			iowrite32(stat, I2C_REG_STS(alg_data));  in i2c_pnx_xfer()
582 		if ((stat = ioread32(I2C_REG_STS(alg_data))) & mstatus_afi) {  in i2c_pnx_xfer()
586 			iowrite32(stat, I2C_REG_STS(alg_data));  in i2c_pnx_xfer()
598 		__func__, ioread32(I2C_REG_STS(alg_data)));  in i2c_pnx_xfer()