Lines Matching full:i2c
14 #include <linux/i2c.h>
76 #define I2C_DRV_NAME "i2c-mt65xx"
198 struct i2c_adapter adap; /* i2c host adapter */
202 /* set in i2c probe */
203 void __iomem *base; /* i2c base addr */
205 struct clk *clk_main; /* main clock for i2c bus */
206 struct clk *clk_dma; /* DMA clock for i2c via DMA */
207 struct clk *clk_pmic; /* PMIC clock for i2c from PMIC */
208 struct clk *clk_arb; /* Arbitrator clock for i2c */
209 bool have_pmic; /* can use i2c pins from PMIC */
318 { .compatible = "mediatek,mt2712-i2c", .data = &mt2712_compat },
319 { .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat },
320 { .compatible = "mediatek,mt6589-i2c", .data = &mt6589_compat },
321 { .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat },
322 { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
323 { .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
328 static u16 mtk_i2c_readw(struct mtk_i2c *i2c, enum I2C_REGS_OFFSET reg) in mtk_i2c_readw() argument
330 return readw(i2c->base + i2c->dev_comp->regs[reg]); in mtk_i2c_readw()
333 static void mtk_i2c_writew(struct mtk_i2c *i2c, u16 val, in mtk_i2c_writew() argument
336 writew(val, i2c->base + i2c->dev_comp->regs[reg]); in mtk_i2c_writew()
339 static int mtk_i2c_clock_enable(struct mtk_i2c *i2c) in mtk_i2c_clock_enable() argument
343 ret = clk_prepare_enable(i2c->clk_dma); in mtk_i2c_clock_enable()
347 ret = clk_prepare_enable(i2c->clk_main); in mtk_i2c_clock_enable()
351 if (i2c->have_pmic) { in mtk_i2c_clock_enable()
352 ret = clk_prepare_enable(i2c->clk_pmic); in mtk_i2c_clock_enable()
357 if (i2c->clk_arb) { in mtk_i2c_clock_enable()
358 ret = clk_prepare_enable(i2c->clk_arb); in mtk_i2c_clock_enable()
366 if (i2c->have_pmic) in mtk_i2c_clock_enable()
367 clk_disable_unprepare(i2c->clk_pmic); in mtk_i2c_clock_enable()
369 clk_disable_unprepare(i2c->clk_main); in mtk_i2c_clock_enable()
371 clk_disable_unprepare(i2c->clk_dma); in mtk_i2c_clock_enable()
376 static void mtk_i2c_clock_disable(struct mtk_i2c *i2c) in mtk_i2c_clock_disable() argument
378 if (i2c->clk_arb) in mtk_i2c_clock_disable()
379 clk_disable_unprepare(i2c->clk_arb); in mtk_i2c_clock_disable()
381 if (i2c->have_pmic) in mtk_i2c_clock_disable()
382 clk_disable_unprepare(i2c->clk_pmic); in mtk_i2c_clock_disable()
384 clk_disable_unprepare(i2c->clk_main); in mtk_i2c_clock_disable()
385 clk_disable_unprepare(i2c->clk_dma); in mtk_i2c_clock_disable()
388 static void mtk_i2c_init_hw(struct mtk_i2c *i2c) in mtk_i2c_init_hw() argument
392 mtk_i2c_writew(i2c, I2C_SOFT_RST, OFFSET_SOFTRESET); in mtk_i2c_init_hw()
395 if (i2c->use_push_pull) in mtk_i2c_init_hw()
396 mtk_i2c_writew(i2c, I2C_IO_CONFIG_PUSH_PULL, OFFSET_IO_CONFIG); in mtk_i2c_init_hw()
398 mtk_i2c_writew(i2c, I2C_IO_CONFIG_OPEN_DRAIN, OFFSET_IO_CONFIG); in mtk_i2c_init_hw()
400 if (i2c->dev_comp->dcm) in mtk_i2c_init_hw()
401 mtk_i2c_writew(i2c, I2C_DCM_DISABLE, OFFSET_DCM_EN); in mtk_i2c_init_hw()
403 if (i2c->dev_comp->timing_adjust) in mtk_i2c_init_hw()
404 mtk_i2c_writew(i2c, I2C_DEFAULT_CLK_DIV - 1, OFFSET_CLOCK_DIV); in mtk_i2c_init_hw()
406 mtk_i2c_writew(i2c, i2c->timing_reg, OFFSET_TIMING); in mtk_i2c_init_hw()
407 mtk_i2c_writew(i2c, i2c->high_speed_reg, OFFSET_HS); in mtk_i2c_init_hw()
408 if (i2c->dev_comp->ltiming_adjust) in mtk_i2c_init_hw()
409 mtk_i2c_writew(i2c, i2c->ltiming_reg, OFFSET_LTIMING); in mtk_i2c_init_hw()
411 /* If use i2c pin from PMIC mt6397 side, need set PATH_DIR first */ in mtk_i2c_init_hw()
412 if (i2c->have_pmic) in mtk_i2c_init_hw()
413 mtk_i2c_writew(i2c, I2C_CONTROL_WRAPPER, OFFSET_PATH_DIR); in mtk_i2c_init_hw()
417 if (i2c->dev_comp->dma_sync) in mtk_i2c_init_hw()
420 mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL); in mtk_i2c_init_hw()
421 mtk_i2c_writew(i2c, I2C_DELAY_LEN, OFFSET_DELAY_LEN); in mtk_i2c_init_hw()
423 writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST); in mtk_i2c_init_hw()
425 writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); in mtk_i2c_init_hw()
429 * Calculate i2c port speed
436 * less than or equal to i2c->speed_hz. The calculation try to get
439 static int mtk_i2c_calculate_speed(struct mtk_i2c *i2c, unsigned int clk_src, in mtk_i2c_calculate_speed() argument
494 dev_dbg(i2c->dev, "Unsupported speed (%uhz)\n", target_speed); in mtk_i2c_calculate_speed()
504 static int mtk_i2c_set_speed(struct mtk_i2c *i2c, unsigned int parent_clk) in mtk_i2c_set_speed() argument
514 clk_src = parent_clk / i2c->clk_src_div; in mtk_i2c_set_speed()
515 target_speed = i2c->speed_hz; in mtk_i2c_set_speed()
519 ret = mtk_i2c_calculate_speed(i2c, clk_src, MAX_FS_MODE_SPEED, in mtk_i2c_set_speed()
524 i2c->timing_reg = (l_sample_cnt << 8) | l_step_cnt; in mtk_i2c_set_speed()
527 ret = mtk_i2c_calculate_speed(i2c, clk_src, target_speed, in mtk_i2c_set_speed()
532 i2c->high_speed_reg = I2C_TIME_DEFAULT_VALUE | in mtk_i2c_set_speed()
535 if (i2c->dev_comp->ltiming_adjust) in mtk_i2c_set_speed()
536 i2c->ltiming_reg = (l_sample_cnt << 6) | l_step_cnt | in mtk_i2c_set_speed()
539 ret = mtk_i2c_calculate_speed(i2c, clk_src, target_speed, in mtk_i2c_set_speed()
544 i2c->timing_reg = (sample_cnt << 8) | step_cnt; in mtk_i2c_set_speed()
547 i2c->high_speed_reg = I2C_TIME_CLR_VALUE; in mtk_i2c_set_speed()
549 if (i2c->dev_comp->ltiming_adjust) in mtk_i2c_set_speed()
550 i2c->ltiming_reg = (sample_cnt << 6) | step_cnt; in mtk_i2c_set_speed()
561 static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs, in mtk_i2c_do_transfer() argument
575 i2c->irq_stat = 0; in mtk_i2c_do_transfer()
577 if (i2c->auto_restart) in mtk_i2c_do_transfer()
580 reinit_completion(&i2c->msg_complete); in mtk_i2c_do_transfer()
582 control_reg = mtk_i2c_readw(i2c, OFFSET_CONTROL) & in mtk_i2c_do_transfer()
584 if ((i2c->speed_hz > MAX_FS_MODE_SPEED) || (left_num >= 1)) in mtk_i2c_do_transfer()
587 if (i2c->op == I2C_MASTER_WRRD) in mtk_i2c_do_transfer()
590 mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL); in mtk_i2c_do_transfer()
593 if (i2c->speed_hz <= I2C_DEFAULT_SPEED) in mtk_i2c_do_transfer()
594 mtk_i2c_writew(i2c, I2C_ST_START_CON, OFFSET_EXT_CONF); in mtk_i2c_do_transfer()
596 mtk_i2c_writew(i2c, I2C_FS_START_CON, OFFSET_EXT_CONF); in mtk_i2c_do_transfer()
599 mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR); in mtk_i2c_do_transfer()
602 mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR | in mtk_i2c_do_transfer()
605 mtk_i2c_writew(i2c, I2C_FIFO_ADDR_CLR, OFFSET_FIFO_ADDR_CLR); in mtk_i2c_do_transfer()
608 mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR | in mtk_i2c_do_transfer()
612 if (i2c->op == I2C_MASTER_WRRD) { in mtk_i2c_do_transfer()
613 if (i2c->dev_comp->aux_len_reg) { in mtk_i2c_do_transfer()
614 mtk_i2c_writew(i2c, msgs->len, OFFSET_TRANSFER_LEN); in mtk_i2c_do_transfer()
615 mtk_i2c_writew(i2c, (msgs + 1)->len, in mtk_i2c_do_transfer()
618 mtk_i2c_writew(i2c, msgs->len | ((msgs + 1)->len) << 8, in mtk_i2c_do_transfer()
621 mtk_i2c_writew(i2c, I2C_WRRD_TRANAC_VALUE, OFFSET_TRANSAC_LEN); in mtk_i2c_do_transfer()
623 mtk_i2c_writew(i2c, msgs->len, OFFSET_TRANSFER_LEN); in mtk_i2c_do_transfer()
624 mtk_i2c_writew(i2c, num, OFFSET_TRANSAC_LEN); in mtk_i2c_do_transfer()
628 if (i2c->op == I2C_MASTER_RD) { in mtk_i2c_do_transfer()
629 writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG); in mtk_i2c_do_transfer()
630 writel(I2C_DMA_CON_RX, i2c->pdmabase + OFFSET_CON); in mtk_i2c_do_transfer()
636 rpaddr = dma_map_single(i2c->dev, dma_rd_buf, in mtk_i2c_do_transfer()
638 if (dma_mapping_error(i2c->dev, rpaddr)) { in mtk_i2c_do_transfer()
644 if (i2c->dev_comp->support_33bits) { in mtk_i2c_do_transfer()
646 writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE); in mtk_i2c_do_transfer()
649 writel((u32)rpaddr, i2c->pdmabase + OFFSET_RX_MEM_ADDR); in mtk_i2c_do_transfer()
650 writel(msgs->len, i2c->pdmabase + OFFSET_RX_LEN); in mtk_i2c_do_transfer()
651 } else if (i2c->op == I2C_MASTER_WR) { in mtk_i2c_do_transfer()
652 writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG); in mtk_i2c_do_transfer()
653 writel(I2C_DMA_CON_TX, i2c->pdmabase + OFFSET_CON); in mtk_i2c_do_transfer()
659 wpaddr = dma_map_single(i2c->dev, dma_wr_buf, in mtk_i2c_do_transfer()
661 if (dma_mapping_error(i2c->dev, wpaddr)) { in mtk_i2c_do_transfer()
667 if (i2c->dev_comp->support_33bits) { in mtk_i2c_do_transfer()
669 writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE); in mtk_i2c_do_transfer()
672 writel((u32)wpaddr, i2c->pdmabase + OFFSET_TX_MEM_ADDR); in mtk_i2c_do_transfer()
673 writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN); in mtk_i2c_do_transfer()
675 writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_INT_FLAG); in mtk_i2c_do_transfer()
676 writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_CON); in mtk_i2c_do_transfer()
682 wpaddr = dma_map_single(i2c->dev, dma_wr_buf, in mtk_i2c_do_transfer()
684 if (dma_mapping_error(i2c->dev, wpaddr)) { in mtk_i2c_do_transfer()
692 dma_unmap_single(i2c->dev, wpaddr, in mtk_i2c_do_transfer()
700 rpaddr = dma_map_single(i2c->dev, dma_rd_buf, in mtk_i2c_do_transfer()
703 if (dma_mapping_error(i2c->dev, rpaddr)) { in mtk_i2c_do_transfer()
704 dma_unmap_single(i2c->dev, wpaddr, in mtk_i2c_do_transfer()
713 if (i2c->dev_comp->support_33bits) { in mtk_i2c_do_transfer()
715 writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE); in mtk_i2c_do_transfer()
718 writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE); in mtk_i2c_do_transfer()
721 writel((u32)wpaddr, i2c->pdmabase + OFFSET_TX_MEM_ADDR); in mtk_i2c_do_transfer()
722 writel((u32)rpaddr, i2c->pdmabase + OFFSET_RX_MEM_ADDR); in mtk_i2c_do_transfer()
723 writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN); in mtk_i2c_do_transfer()
724 writel((msgs + 1)->len, i2c->pdmabase + OFFSET_RX_LEN); in mtk_i2c_do_transfer()
727 writel(I2C_DMA_START_EN, i2c->pdmabase + OFFSET_EN); in mtk_i2c_do_transfer()
729 if (!i2c->auto_restart) { in mtk_i2c_do_transfer()
736 mtk_i2c_writew(i2c, start_reg, OFFSET_START); in mtk_i2c_do_transfer()
738 ret = wait_for_completion_timeout(&i2c->msg_complete, in mtk_i2c_do_transfer()
739 i2c->adap.timeout); in mtk_i2c_do_transfer()
742 mtk_i2c_writew(i2c, ~(restart_flag | I2C_HS_NACKERR | I2C_ACKERR | in mtk_i2c_do_transfer()
745 if (i2c->op == I2C_MASTER_WR) { in mtk_i2c_do_transfer()
746 dma_unmap_single(i2c->dev, wpaddr, in mtk_i2c_do_transfer()
750 } else if (i2c->op == I2C_MASTER_RD) { in mtk_i2c_do_transfer()
751 dma_unmap_single(i2c->dev, rpaddr, in mtk_i2c_do_transfer()
756 dma_unmap_single(i2c->dev, wpaddr, msgs->len, in mtk_i2c_do_transfer()
758 dma_unmap_single(i2c->dev, rpaddr, (msgs + 1)->len, in mtk_i2c_do_transfer()
766 dev_dbg(i2c->dev, "addr: %x, transfer timeout\n", msgs->addr); in mtk_i2c_do_transfer()
767 mtk_i2c_init_hw(i2c); in mtk_i2c_do_transfer()
771 if (i2c->irq_stat & (I2C_HS_NACKERR | I2C_ACKERR)) { in mtk_i2c_do_transfer()
772 dev_dbg(i2c->dev, "addr: %x, transfer ACK error\n", msgs->addr); in mtk_i2c_do_transfer()
773 mtk_i2c_init_hw(i2c); in mtk_i2c_do_transfer()
785 struct mtk_i2c *i2c = i2c_get_adapdata(adap); in mtk_i2c_transfer() local
787 ret = mtk_i2c_clock_enable(i2c); in mtk_i2c_transfer()
791 i2c->auto_restart = i2c->dev_comp->auto_restart; in mtk_i2c_transfer()
794 if (i2c->auto_restart && num == 2) { in mtk_i2c_transfer()
797 i2c->auto_restart = 0; in mtk_i2c_transfer()
801 if (i2c->auto_restart && num >= 2 && i2c->speed_hz > MAX_FS_MODE_SPEED) in mtk_i2c_transfer()
805 i2c->ignore_restart_irq = true; in mtk_i2c_transfer()
807 i2c->ignore_restart_irq = false; in mtk_i2c_transfer()
811 dev_dbg(i2c->dev, "data buffer is NULL.\n"); in mtk_i2c_transfer()
817 i2c->op = I2C_MASTER_RD; in mtk_i2c_transfer()
819 i2c->op = I2C_MASTER_WR; in mtk_i2c_transfer()
821 if (!i2c->auto_restart) { in mtk_i2c_transfer()
824 i2c->op = I2C_MASTER_WRRD; in mtk_i2c_transfer()
830 ret = mtk_i2c_do_transfer(i2c, msgs, num, left_num); in mtk_i2c_transfer()
840 mtk_i2c_clock_disable(i2c); in mtk_i2c_transfer()
846 struct mtk_i2c *i2c = dev_id; in mtk_i2c_irq() local
850 if (i2c->auto_restart) in mtk_i2c_irq()
853 intr_stat = mtk_i2c_readw(i2c, OFFSET_INTR_STAT); in mtk_i2c_irq()
854 mtk_i2c_writew(i2c, intr_stat, OFFSET_INTR_STAT); in mtk_i2c_irq()
857 * when occurs ack error, i2c controller generate two interrupts in mtk_i2c_irq()
859 * i2c->irq_stat need keep the two interrupt value. in mtk_i2c_irq()
861 i2c->irq_stat |= intr_stat; in mtk_i2c_irq()
863 if (i2c->ignore_restart_irq && (i2c->irq_stat & restart_flag)) { in mtk_i2c_irq()
864 i2c->ignore_restart_irq = false; in mtk_i2c_irq()
865 i2c->irq_stat = 0; in mtk_i2c_irq()
866 mtk_i2c_writew(i2c, I2C_RS_MUL_CNFG | I2C_RS_MUL_TRIG | in mtk_i2c_irq()
869 if (i2c->irq_stat & (I2C_TRANSAC_COMP | restart_flag)) in mtk_i2c_irq()
870 complete(&i2c->msg_complete); in mtk_i2c_irq()
890 static int mtk_i2c_parse_dt(struct device_node *np, struct mtk_i2c *i2c) in mtk_i2c_parse_dt() argument
894 ret = of_property_read_u32(np, "clock-frequency", &i2c->speed_hz); in mtk_i2c_parse_dt()
896 i2c->speed_hz = I2C_DEFAULT_SPEED; in mtk_i2c_parse_dt()
898 ret = of_property_read_u32(np, "clock-div", &i2c->clk_src_div); in mtk_i2c_parse_dt()
902 if (i2c->clk_src_div == 0) in mtk_i2c_parse_dt()
905 i2c->have_pmic = of_property_read_bool(np, "mediatek,have-pmic"); in mtk_i2c_parse_dt()
906 i2c->use_push_pull = in mtk_i2c_parse_dt()
915 struct mtk_i2c *i2c; in mtk_i2c_probe() local
920 i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); in mtk_i2c_probe()
921 if (!i2c) in mtk_i2c_probe()
925 i2c->base = devm_ioremap_resource(&pdev->dev, res); in mtk_i2c_probe()
926 if (IS_ERR(i2c->base)) in mtk_i2c_probe()
927 return PTR_ERR(i2c->base); in mtk_i2c_probe()
930 i2c->pdmabase = devm_ioremap_resource(&pdev->dev, res); in mtk_i2c_probe()
931 if (IS_ERR(i2c->pdmabase)) in mtk_i2c_probe()
932 return PTR_ERR(i2c->pdmabase); in mtk_i2c_probe()
938 init_completion(&i2c->msg_complete); in mtk_i2c_probe()
940 i2c->dev_comp = of_device_get_match_data(&pdev->dev); in mtk_i2c_probe()
941 i2c->adap.dev.of_node = pdev->dev.of_node; in mtk_i2c_probe()
942 i2c->dev = &pdev->dev; in mtk_i2c_probe()
943 i2c->adap.dev.parent = &pdev->dev; in mtk_i2c_probe()
944 i2c->adap.owner = THIS_MODULE; in mtk_i2c_probe()
945 i2c->adap.algo = &mtk_i2c_algorithm; in mtk_i2c_probe()
946 i2c->adap.quirks = i2c->dev_comp->quirks; in mtk_i2c_probe()
947 i2c->adap.timeout = 2 * HZ; in mtk_i2c_probe()
948 i2c->adap.retries = 1; in mtk_i2c_probe()
950 ret = mtk_i2c_parse_dt(pdev->dev.of_node, i2c); in mtk_i2c_probe()
954 if (i2c->dev_comp->timing_adjust) in mtk_i2c_probe()
955 i2c->clk_src_div *= I2C_DEFAULT_CLK_DIV; in mtk_i2c_probe()
957 if (i2c->have_pmic && !i2c->dev_comp->pmic_i2c) in mtk_i2c_probe()
960 i2c->clk_main = devm_clk_get(&pdev->dev, "main"); in mtk_i2c_probe()
961 if (IS_ERR(i2c->clk_main)) { in mtk_i2c_probe()
963 return PTR_ERR(i2c->clk_main); in mtk_i2c_probe()
966 i2c->clk_dma = devm_clk_get(&pdev->dev, "dma"); in mtk_i2c_probe()
967 if (IS_ERR(i2c->clk_dma)) { in mtk_i2c_probe()
969 return PTR_ERR(i2c->clk_dma); in mtk_i2c_probe()
972 i2c->clk_arb = devm_clk_get(&pdev->dev, "arb"); in mtk_i2c_probe()
973 if (IS_ERR(i2c->clk_arb)) in mtk_i2c_probe()
974 i2c->clk_arb = NULL; in mtk_i2c_probe()
976 clk = i2c->clk_main; in mtk_i2c_probe()
977 if (i2c->have_pmic) { in mtk_i2c_probe()
978 i2c->clk_pmic = devm_clk_get(&pdev->dev, "pmic"); in mtk_i2c_probe()
979 if (IS_ERR(i2c->clk_pmic)) { in mtk_i2c_probe()
981 return PTR_ERR(i2c->clk_pmic); in mtk_i2c_probe()
983 clk = i2c->clk_pmic; in mtk_i2c_probe()
986 strlcpy(i2c->adap.name, I2C_DRV_NAME, sizeof(i2c->adap.name)); in mtk_i2c_probe()
988 ret = mtk_i2c_set_speed(i2c, clk_get_rate(clk)); in mtk_i2c_probe()
994 if (i2c->dev_comp->support_33bits) { in mtk_i2c_probe()
1002 ret = mtk_i2c_clock_enable(i2c); in mtk_i2c_probe()
1007 mtk_i2c_init_hw(i2c); in mtk_i2c_probe()
1008 mtk_i2c_clock_disable(i2c); in mtk_i2c_probe()
1011 IRQF_TRIGGER_NONE, I2C_DRV_NAME, i2c); in mtk_i2c_probe()
1014 "Request I2C IRQ %d fail\n", irq); in mtk_i2c_probe()
1018 i2c_set_adapdata(&i2c->adap, i2c); in mtk_i2c_probe()
1019 ret = i2c_add_adapter(&i2c->adap); in mtk_i2c_probe()
1023 platform_set_drvdata(pdev, i2c); in mtk_i2c_probe()
1030 struct mtk_i2c *i2c = platform_get_drvdata(pdev); in mtk_i2c_remove() local
1032 i2c_del_adapter(&i2c->adap); in mtk_i2c_remove()
1041 struct mtk_i2c *i2c = dev_get_drvdata(dev); in mtk_i2c_resume() local
1043 ret = mtk_i2c_clock_enable(i2c); in mtk_i2c_resume()
1049 mtk_i2c_init_hw(i2c); in mtk_i2c_resume()
1051 mtk_i2c_clock_disable(i2c); in mtk_i2c_resume()
1074 MODULE_DESCRIPTION("MediaTek I2C Bus Driver");