204 	dev_dbg(dev, "Descriptor struct:  %p\n", desc);  in __ismt_desc_dump()
205 	dev_dbg(dev, "\ttgtaddr_rw=0x%02X\n", desc->tgtaddr_rw);  in __ismt_desc_dump()
206 	dev_dbg(dev, "\twr_len_cmd=0x%02X\n", desc->wr_len_cmd);  in __ismt_desc_dump()
207 	dev_dbg(dev, "\trd_len=    0x%02X\n", desc->rd_len);  in __ismt_desc_dump()
208 	dev_dbg(dev, "\tcontrol=   0x%02X\n", desc->control);  in __ismt_desc_dump()
209 	dev_dbg(dev, "\tstatus=    0x%02X\n", desc->status);  in __ismt_desc_dump()
210 	dev_dbg(dev, "\tretry=     0x%02X\n", desc->retry);  in __ismt_desc_dump()
211 	dev_dbg(dev, "\trxbytes=   0x%02X\n", desc->rxbytes);  in __ismt_desc_dump()
212 	dev_dbg(dev, "\ttxbytes=   0x%02X\n", desc->txbytes);  in __ismt_desc_dump()
213 	dev_dbg(dev, "\tdptr_low=  0x%08X\n", desc->dptr_low);  in __ismt_desc_dump()
214 	dev_dbg(dev, "\tdptr_high= 0x%08X\n", desc->dptr_high);  in __ismt_desc_dump()
225 	dev_dbg(dev, "Dump of the descriptor struct:  0x%X\n", priv->head);  in ismt_desc_dump()
237 	dev_dbg(dev, "Dump of the iSMT General Registers\n");  in ismt_gen_reg_dump()
238 	dev_dbg(dev, "  GCTRL.... : (0x%p)=0x%X\n",  in ismt_gen_reg_dump()
241 	dev_dbg(dev, "  SMTICL... : (0x%p)=0x%016llX\n",  in ismt_gen_reg_dump()
244 	dev_dbg(dev, "  ERRINTMSK : (0x%p)=0x%X\n",  in ismt_gen_reg_dump()
247 	dev_dbg(dev, "  ERRAERMSK : (0x%p)=0x%X\n",  in ismt_gen_reg_dump()
250 	dev_dbg(dev, "  ERRSTS... : (0x%p)=0x%X\n",  in ismt_gen_reg_dump()
253 	dev_dbg(dev, "  ERRINFO.. : (0x%p)=0x%X\n",  in ismt_gen_reg_dump()
266 	dev_dbg(dev, "Dump of the iSMT Master Registers\n");  in ismt_mstr_reg_dump()
267 	dev_dbg(dev, "  MDBA..... : (0x%p)=0x%016llX\n",  in ismt_mstr_reg_dump()
270 	dev_dbg(dev, "  MCTRL.... : (0x%p)=0x%X\n",  in ismt_mstr_reg_dump()
273 	dev_dbg(dev, "  MSTS..... : (0x%p)=0x%X\n",  in ismt_mstr_reg_dump()
276 	dev_dbg(dev, "  MDS...... : (0x%p)=0x%X\n",  in ismt_mstr_reg_dump()
279 	dev_dbg(dev, "  RPOLICY.. : (0x%p)=0x%X\n",  in ismt_mstr_reg_dump()
282 	dev_dbg(dev, "  SPGT..... : (0x%p)=0x%X\n",  in ismt_mstr_reg_dump()
327 	dev_dbg(&priv->pci_dev->dev, "Processing completed descriptor\n");  in ismt_process_desc()
423 		dev_dbg(dev, "I2C_SMBUS_QUICK\n");  in ismt_access()
432 			dev_dbg(dev, "I2C_SMBUS_BYTE:  WRITE\n");  in ismt_access()
437 			dev_dbg(dev, "I2C_SMBUS_BYTE:  READ\n");  in ismt_access()
450 			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  WRITE\n");  in ismt_access()
458 			dev_dbg(dev, "I2C_SMBUS_BYTE_DATA:  READ\n");  in ismt_access()
470 			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  WRITE\n");  in ismt_access()
479 			dev_dbg(dev, "I2C_SMBUS_WORD_DATA:  READ\n");  in ismt_access()
489 		dev_dbg(dev, "I2C_SMBUS_PROC_CALL\n");  in ismt_access()
502 			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  WRITE\n");  in ismt_access()
511 			dev_dbg(dev, "I2C_SMBUS_BLOCK_DATA:  READ\n");  in ismt_access()
530 			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  WRITE\n");  in ismt_access()
539 			dev_dbg(dev, "I2C_SMBUS_I2C_BLOCK_DATA:  READ\n");  in ismt_access()
563 		dev_dbg(dev, " dev=%p\n", dev);  in ismt_access()
564 		dev_dbg(dev, " data=%p\n", data);  in ismt_access()
565 		dev_dbg(dev, " dma_buffer=%p\n", dma_buffer);  in ismt_access()
566 		dev_dbg(dev, " dma_size=%d\n", dma_size);  in ismt_access()
567 		dev_dbg(dev, " dma_direction=%d\n", dma_direction);  in ismt_access()
580 		dev_dbg(dev, " dma_addr = %pad\n", &dma_addr);  in ismt_access()
722 		dev_dbg(dev, "Setting SMBus clock to 80 kHz\n");  in ismt_hw_init()
728 		dev_dbg(dev, "Setting SMBus clock to 100 kHz\n");  in ismt_hw_init()
734 		dev_dbg(dev, "Setting SMBus clock to 400 kHz\n");  in ismt_hw_init()
740 		dev_dbg(dev, "Setting SMBus clock to 1000 kHz\n");  in ismt_hw_init()
766 	dev_dbg(dev, "SMBus clock is running at %d kHz\n", bus_speed);  in ismt_hw_init()
887 	dev_dbg(&priv->pci_dev->dev, " start=0x%lX\n", start);  in ismt_probe()
888 	dev_dbg(&priv->pci_dev->dev, " len=0x%lX\n", len);  in ismt_probe()