241 static inline void iproc_i2c_wr_reg(struct bcm_iproc_i2c_dev *iproc_i2c,  in iproc_i2c_wr_reg()  function
264 		iproc_i2c_wr_reg(iproc_i2c, CFG_OFFSET, val);  in bcm_iproc_i2c_slave_init()
271 		iproc_i2c_wr_reg(iproc_i2c, CFG_OFFSET, val);  in bcm_iproc_i2c_slave_init()
276 	iproc_i2c_wr_reg(iproc_i2c, S_FIFO_CTRL_OFFSET, val);  in bcm_iproc_i2c_slave_init()
282 	iproc_i2c_wr_reg(iproc_i2c, TIM_CFG_OFFSET, val);  in bcm_iproc_i2c_slave_init()
289 	iproc_i2c_wr_reg(iproc_i2c, S_CFG_SMBUS_ADDR_OFFSET, val);  in bcm_iproc_i2c_slave_init()
292 	iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, ISR_MASK_SLAVE);  in bcm_iproc_i2c_slave_init()
298 	iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_slave_init()
345 			iproc_i2c_wr_reg(iproc_i2c, S_TX_OFFSET, value);  in bcm_iproc_i2c_slave_isr()
348 			iproc_i2c_wr_reg(iproc_i2c, S_CMD_OFFSET, val);  in bcm_iproc_i2c_slave_isr()
356 			iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_slave_isr()
368 		iproc_i2c_wr_reg(iproc_i2c, S_TX_OFFSET, value);  in bcm_iproc_i2c_slave_isr()
370 		iproc_i2c_wr_reg(iproc_i2c, S_CMD_OFFSET, val);  in bcm_iproc_i2c_slave_isr()
382 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_slave_isr()
386 	iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, status);  in bcm_iproc_i2c_slave_isr()
439 				iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET,  in bcm_iproc_i2c_send()
445 		iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);  in bcm_iproc_i2c_send()
464 			iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_read()
471 		iproc_i2c_wr_reg(iproc_i2c, M_FIFO_CTRL_OFFSET, val);  in bcm_iproc_i2c_read()
521 	iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, status);  in bcm_iproc_i2c_isr()
534 	iproc_i2c_wr_reg(iproc_i2c, CFG_OFFSET, val);  in bcm_iproc_i2c_init()
541 	iproc_i2c_wr_reg(iproc_i2c, CFG_OFFSET, val);  in bcm_iproc_i2c_init()
545 	iproc_i2c_wr_reg(iproc_i2c, M_FIFO_CTRL_OFFSET, val);  in bcm_iproc_i2c_init()
550 	iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_init()
553 	iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, 0xffffffff);  in bcm_iproc_i2c_init()
568 	iproc_i2c_wr_reg(iproc_i2c, CFG_OFFSET, val);  in bcm_iproc_i2c_enable_disable()
627 	iproc_i2c_wr_reg(iproc_i2c, M_CMD_OFFSET, cmd);  in bcm_iproc_i2c_xfer_wait()
633 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, 0);  in bcm_iproc_i2c_xfer_wait()
646 			iproc_i2c_wr_reg(iproc_i2c, IS_OFFSET, status);  in bcm_iproc_i2c_xfer_wait()
663 		iproc_i2c_wr_reg(iproc_i2c, M_FIFO_CTRL_OFFSET, val);  in bcm_iproc_i2c_xfer_wait()
671 		iproc_i2c_wr_reg(iproc_i2c, M_FIFO_CTRL_OFFSET, val);  in bcm_iproc_i2c_xfer_wait()
697 	iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, addr);  in bcm_iproc_i2c_xfer_single_msg()
713 			iproc_i2c_wr_reg(iproc_i2c, M_TX_OFFSET, val);  in bcm_iproc_i2c_xfer_single_msg()
756 		iproc_i2c_wr_reg(iproc_i2c, M_FIFO_CTRL_OFFSET, tmp);  in bcm_iproc_i2c_xfer_single_msg()
768 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val_intr_en);  in bcm_iproc_i2c_xfer_single_msg()
843 	iproc_i2c_wr_reg(iproc_i2c, TIM_CFG_OFFSET, val);  in bcm_iproc_i2c_cfg_speed()
945 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, 0);  in bcm_iproc_i2c_remove()
967 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, 0);  in bcm_iproc_i2c_suspend()
996 	iproc_i2c_wr_reg(iproc_i2c, TIM_CFG_OFFSET, val);  in bcm_iproc_i2c_resume()
1043 	iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, tmp);  in bcm_iproc_i2c_unreg_slave()
1048 	iproc_i2c_wr_reg(iproc_i2c, S_CFG_SMBUS_ADDR_OFFSET, tmp);  in bcm_iproc_i2c_unreg_slave()