95 #define IE_OFFSET                    0x38  macro
298 	iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_slave_init()
354 			val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);  in bcm_iproc_i2c_slave_isr()
356 			iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_slave_isr()
380 		val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);  in bcm_iproc_i2c_slave_isr()
382 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_slave_isr()
437 				tmp = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);  in bcm_iproc_i2c_send()
439 				iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET,  in bcm_iproc_i2c_send()
462 			val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);  in bcm_iproc_i2c_read()
464 			iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_read()
547 	val = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);  in bcm_iproc_i2c_init()
550 	iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val);  in bcm_iproc_i2c_init()
633 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, 0);  in bcm_iproc_i2c_xfer_wait()
635 		iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);  in bcm_iproc_i2c_xfer_wait()
768 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, val_intr_en);  in bcm_iproc_i2c_xfer_single_msg()
945 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, 0);  in bcm_iproc_i2c_remove()
946 		iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);  in bcm_iproc_i2c_remove()
967 		iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, 0);  in bcm_iproc_i2c_suspend()
968 		iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);  in bcm_iproc_i2c_suspend()
1040 	tmp = iproc_i2c_rd_reg(iproc_i2c, IE_OFFSET);  in bcm_iproc_i2c_unreg_slave()
1043 	iproc_i2c_wr_reg(iproc_i2c, IE_OFFSET, tmp);  in bcm_iproc_i2c_unreg_slave()