160 	u32 dispctrl = HVS_READ(SCALER_DISPCTRL);  in vc4_hvs_mask_underrun()  local
162 	dispctrl &= ~SCALER_DISPCTRL_DSPEISLUR(channel);  in vc4_hvs_mask_underrun()
164 	HVS_WRITE(SCALER_DISPCTRL, dispctrl);  in vc4_hvs_mask_underrun()
170 	u32 dispctrl = HVS_READ(SCALER_DISPCTRL);  in vc4_hvs_unmask_underrun()  local
172 	dispctrl |= SCALER_DISPCTRL_DSPEISLUR(channel);  in vc4_hvs_unmask_underrun()
176 	HVS_WRITE(SCALER_DISPCTRL, dispctrl);  in vc4_hvs_unmask_underrun()
225 	u32 dispctrl;  in vc4_hvs_bind()  local
272 	dispctrl = HVS_READ(SCALER_DISPCTRL);  in vc4_hvs_bind()
274 	dispctrl |= SCALER_DISPCTRL_ENABLE;  in vc4_hvs_bind()
275 	dispctrl |= SCALER_DISPCTRL_DISPEIRQ(0) |  in vc4_hvs_bind()
282 	dispctrl &= ~SCALER_DISPCTRL_DSP3_MUX_MASK;  in vc4_hvs_bind()
283 	dispctrl &= ~(SCALER_DISPCTRL_DMAEIRQ |  in vc4_hvs_bind()
296 	dispctrl |= VC4_SET_FIELD(2, SCALER_DISPCTRL_DSP3_MUX);  in vc4_hvs_bind()
298 	HVS_WRITE(SCALER_DISPCTRL, dispctrl);  in vc4_hvs_bind()