Lines Matching refs:afec0
664 u32 afec0 = DSI_PORT_READ(PHY_AFEC0); in vc4_dsi_latch_ulps() local
667 afec0 |= DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS); in vc4_dsi_latch_ulps()
669 afec0 &= ~DSI_PORT_BIT(PHY_AFEC0_LATCH_ULPS); in vc4_dsi_latch_ulps()
671 DSI_PORT_WRITE(PHY_AFEC0, afec0); in vc4_dsi_latch_ulps()
871 u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) | in vc4_dsi_encoder_enable() local
875 afec0 |= DSI0_PHY_AFEC0_PD_DLANE1; in vc4_dsi_encoder_enable()
878 afec0 |= DSI0_PHY_AFEC0_RESET; in vc4_dsi_encoder_enable()
880 DSI_PORT_WRITE(PHY_AFEC0, afec0); in vc4_dsi_encoder_enable()
887 u32 afec0 = (VC4_SET_FIELD(7, DSI_PHY_AFEC0_PTATADJ) | in vc4_dsi_encoder_enable() local
896 afec0 |= DSI1_PHY_AFEC0_PD_DLANE3; in vc4_dsi_encoder_enable()
898 afec0 |= DSI1_PHY_AFEC0_PD_DLANE2; in vc4_dsi_encoder_enable()
900 afec0 |= DSI1_PHY_AFEC0_PD_DLANE1; in vc4_dsi_encoder_enable()
902 afec0 |= DSI1_PHY_AFEC0_RESET; in vc4_dsi_encoder_enable()
904 DSI_PORT_WRITE(PHY_AFEC0, afec0); in vc4_dsi_encoder_enable()