Lines Matching refs:vop
42 #define VOP_WIN_SET(vop, win, name, v) \ argument
43 vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
44 #define VOP_SCL_SET(vop, win, name, v) \ argument
45 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
46 #define VOP_SCL_SET_EXT(vop, win, name, v) \ argument
47 vop_reg_set(vop, &win->phy->scl->ext->name, \
50 #define VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, name, v) \ argument
53 vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \
56 #define VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, win_yuv2yuv, name, v) \ argument
59 vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \
62 #define VOP_INTR_SET_MASK(vop, name, mask, v) \ argument
63 vop_reg_set(vop, &vop->data->intr->name, 0, mask, v, #name)
65 #define VOP_REG_SET(vop, group, name, v) \ argument
66 vop_reg_set(vop, &vop->data->group->name, 0, ~0, v, #name)
68 #define VOP_INTR_SET_TYPE(vop, name, type, v) \ argument
71 for (i = 0; i < vop->data->intr->nintrs; i++) { \
72 if (vop->data->intr->intrs[i] & type) { \
77 VOP_INTR_SET_MASK(vop, name, mask, reg); \
79 #define VOP_INTR_GET_TYPE(vop, name, type) \ argument
80 vop_get_intr_type(vop, &vop->data->intr->name, type)
82 #define VOP_WIN_GET(vop, win, name) \ argument
83 vop_read_reg(vop, win->base, &win->phy->name)
88 #define VOP_WIN_GET_YRGBADDR(vop, win) \ argument
89 vop_readl(vop, win->base + win->phy->yrgb_mst.offset)
92 ((vop_win) - (vop_win)->vop->win)
94 #define to_vop(x) container_of(x, struct vop, crtc)
117 struct vop *vop; member
121 struct vop { struct
171 static inline void vop_writel(struct vop *vop, uint32_t offset, uint32_t v) in vop_writel() argument
173 writel(v, vop->regs + offset); in vop_writel()
174 vop->regsbak[offset >> 2] = v; in vop_writel()
177 static inline uint32_t vop_readl(struct vop *vop, uint32_t offset) in vop_readl() argument
179 return readl(vop->regs + offset); in vop_readl()
182 static inline uint32_t vop_read_reg(struct vop *vop, uint32_t base, in vop_read_reg() argument
185 return (vop_readl(vop, base + reg->offset) >> reg->shift) & reg->mask; in vop_read_reg()
188 static void vop_reg_set(struct vop *vop, const struct vop_reg *reg, in vop_reg_set() argument
195 DRM_DEV_DEBUG(vop->dev, "Warning: not support %s\n", reg_name); in vop_reg_set()
206 uint32_t cached_val = vop->regsbak[offset >> 2]; in vop_reg_set()
209 vop->regsbak[offset >> 2] = v; in vop_reg_set()
213 writel_relaxed(v, vop->regs + offset); in vop_reg_set()
215 writel(v, vop->regs + offset); in vop_reg_set()
218 static inline uint32_t vop_get_intr_type(struct vop *vop, in vop_get_intr_type() argument
222 uint32_t regs = vop_read_reg(vop, 0, reg); in vop_get_intr_type()
224 for (i = 0; i < vop->data->intr->nintrs; i++) { in vop_get_intr_type()
225 if ((type & vop->data->intr->intrs[i]) && (regs & 1 << i)) in vop_get_intr_type()
226 ret |= vop->data->intr->intrs[i]; in vop_get_intr_type()
232 static inline void vop_cfg_done(struct vop *vop) in vop_cfg_done() argument
234 VOP_REG_SET(vop, common, cfg_done, 1); in vop_cfg_done()
310 static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, in scl_vop_cal_scl_fac() argument
329 DRM_DEV_ERROR(vop->dev, "Maximum dst width (3840) exceeded\n"); in scl_vop_cal_scl_fac()
334 VOP_SCL_SET(vop, win, scale_yrgb_x, in scl_vop_cal_scl_fac()
336 VOP_SCL_SET(vop, win, scale_yrgb_y, in scl_vop_cal_scl_fac()
339 VOP_SCL_SET(vop, win, scale_cbcr_x, in scl_vop_cal_scl_fac()
341 VOP_SCL_SET(vop, win, scale_cbcr_y, in scl_vop_cal_scl_fac()
364 VOP_SCL_SET_EXT(vop, win, lb_mode, lb_mode); in scl_vop_cal_scl_fac()
367 DRM_DEV_ERROR(vop->dev, "not allow yrgb ver scale\n"); in scl_vop_cal_scl_fac()
371 DRM_DEV_ERROR(vop->dev, "not allow cbcr ver scale\n"); in scl_vop_cal_scl_fac()
383 VOP_SCL_SET(vop, win, scale_yrgb_x, val); in scl_vop_cal_scl_fac()
386 VOP_SCL_SET(vop, win, scale_yrgb_y, val); in scl_vop_cal_scl_fac()
388 VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt4, vskiplines == 4); in scl_vop_cal_scl_fac()
389 VOP_SCL_SET_EXT(vop, win, vsd_yrgb_gt2, vskiplines == 2); in scl_vop_cal_scl_fac()
391 VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, yrgb_hor_scl_mode); in scl_vop_cal_scl_fac()
392 VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, yrgb_ver_scl_mode); in scl_vop_cal_scl_fac()
393 VOP_SCL_SET_EXT(vop, win, yrgb_hsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
394 VOP_SCL_SET_EXT(vop, win, yrgb_vsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
395 VOP_SCL_SET_EXT(vop, win, yrgb_vsu_mode, vsu_mode); in scl_vop_cal_scl_fac()
399 VOP_SCL_SET(vop, win, scale_cbcr_x, val); in scl_vop_cal_scl_fac()
402 VOP_SCL_SET(vop, win, scale_cbcr_y, val); in scl_vop_cal_scl_fac()
404 VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt4, vskiplines == 4); in scl_vop_cal_scl_fac()
405 VOP_SCL_SET_EXT(vop, win, vsd_cbcr_gt2, vskiplines == 2); in scl_vop_cal_scl_fac()
406 VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, cbcr_hor_scl_mode); in scl_vop_cal_scl_fac()
407 VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, cbcr_ver_scl_mode); in scl_vop_cal_scl_fac()
408 VOP_SCL_SET_EXT(vop, win, cbcr_hsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
409 VOP_SCL_SET_EXT(vop, win, cbcr_vsd_mode, SCALE_DOWN_BIL); in scl_vop_cal_scl_fac()
410 VOP_SCL_SET_EXT(vop, win, cbcr_vsu_mode, vsu_mode); in scl_vop_cal_scl_fac()
414 static void vop_dsp_hold_valid_irq_enable(struct vop *vop) in vop_dsp_hold_valid_irq_enable() argument
418 if (WARN_ON(!vop->is_enabled)) in vop_dsp_hold_valid_irq_enable()
421 spin_lock_irqsave(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_enable()
423 VOP_INTR_SET_TYPE(vop, clear, DSP_HOLD_VALID_INTR, 1); in vop_dsp_hold_valid_irq_enable()
424 VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 1); in vop_dsp_hold_valid_irq_enable()
426 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_enable()
429 static void vop_dsp_hold_valid_irq_disable(struct vop *vop) in vop_dsp_hold_valid_irq_disable() argument
433 if (WARN_ON(!vop->is_enabled)) in vop_dsp_hold_valid_irq_disable()
436 spin_lock_irqsave(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_disable()
438 VOP_INTR_SET_TYPE(vop, enable, DSP_HOLD_VALID_INTR, 0); in vop_dsp_hold_valid_irq_disable()
440 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_dsp_hold_valid_irq_disable()
465 static bool vop_line_flag_irq_is_enabled(struct vop *vop) in vop_line_flag_irq_is_enabled() argument
470 spin_lock_irqsave(&vop->irq_lock, flags); in vop_line_flag_irq_is_enabled()
472 line_flag_irq = VOP_INTR_GET_TYPE(vop, enable, LINE_FLAG_INTR); in vop_line_flag_irq_is_enabled()
474 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_line_flag_irq_is_enabled()
479 static void vop_line_flag_irq_enable(struct vop *vop) in vop_line_flag_irq_enable() argument
483 if (WARN_ON(!vop->is_enabled)) in vop_line_flag_irq_enable()
486 spin_lock_irqsave(&vop->irq_lock, flags); in vop_line_flag_irq_enable()
488 VOP_INTR_SET_TYPE(vop, clear, LINE_FLAG_INTR, 1); in vop_line_flag_irq_enable()
489 VOP_INTR_SET_TYPE(vop, enable, LINE_FLAG_INTR, 1); in vop_line_flag_irq_enable()
491 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_line_flag_irq_enable()
494 static void vop_line_flag_irq_disable(struct vop *vop) in vop_line_flag_irq_disable() argument
498 if (WARN_ON(!vop->is_enabled)) in vop_line_flag_irq_disable()
501 spin_lock_irqsave(&vop->irq_lock, flags); in vop_line_flag_irq_disable()
503 VOP_INTR_SET_TYPE(vop, enable, LINE_FLAG_INTR, 0); in vop_line_flag_irq_disable()
505 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_line_flag_irq_disable()
508 static int vop_core_clks_enable(struct vop *vop) in vop_core_clks_enable() argument
512 ret = clk_enable(vop->hclk); in vop_core_clks_enable()
516 ret = clk_enable(vop->aclk); in vop_core_clks_enable()
523 clk_disable(vop->hclk); in vop_core_clks_enable()
527 static void vop_core_clks_disable(struct vop *vop) in vop_core_clks_disable() argument
529 clk_disable(vop->aclk); in vop_core_clks_disable()
530 clk_disable(vop->hclk); in vop_core_clks_disable()
533 static void vop_win_disable(struct vop *vop, const struct vop_win *vop_win) in vop_win_disable() argument
538 VOP_SCL_SET_EXT(vop, win, yrgb_hor_scl_mode, SCALE_NONE); in vop_win_disable()
539 VOP_SCL_SET_EXT(vop, win, yrgb_ver_scl_mode, SCALE_NONE); in vop_win_disable()
540 VOP_SCL_SET_EXT(vop, win, cbcr_hor_scl_mode, SCALE_NONE); in vop_win_disable()
541 VOP_SCL_SET_EXT(vop, win, cbcr_ver_scl_mode, SCALE_NONE); in vop_win_disable()
544 VOP_WIN_SET(vop, win, enable, 0); in vop_win_disable()
545 vop->win_enabled &= ~BIT(VOP_WIN_TO_INDEX(vop_win)); in vop_win_disable()
550 struct vop *vop = to_vop(crtc); in vop_enable() local
553 ret = pm_runtime_get_sync(vop->dev); in vop_enable()
555 DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret); in vop_enable()
559 ret = vop_core_clks_enable(vop); in vop_enable()
563 ret = clk_enable(vop->dclk); in vop_enable()
573 ret = rockchip_drm_dma_attach_device(vop->drm_dev, vop->dev); in vop_enable()
575 DRM_DEV_ERROR(vop->dev, in vop_enable()
580 spin_lock(&vop->reg_lock); in vop_enable()
581 for (i = 0; i < vop->len; i += 4) in vop_enable()
582 writel_relaxed(vop->regsbak[i / 4], vop->regs + i); in vop_enable()
594 for (i = 0; i < vop->data->win_size; i++) { in vop_enable()
595 struct vop_win *vop_win = &vop->win[i]; in vop_enable()
597 vop_win_disable(vop, vop_win); in vop_enable()
600 spin_unlock(&vop->reg_lock); in vop_enable()
602 vop_cfg_done(vop); in vop_enable()
607 vop->is_enabled = true; in vop_enable()
609 spin_lock(&vop->reg_lock); in vop_enable()
611 VOP_REG_SET(vop, common, standby, 1); in vop_enable()
613 spin_unlock(&vop->reg_lock); in vop_enable()
620 clk_disable(vop->dclk); in vop_enable()
622 vop_core_clks_disable(vop); in vop_enable()
624 pm_runtime_put_sync(vop->dev); in vop_enable()
630 struct vop *vop = to_vop(crtc); in rockchip_drm_set_win_enabled() local
633 spin_lock(&vop->reg_lock); in rockchip_drm_set_win_enabled()
635 for (i = 0; i < vop->data->win_size; i++) { in rockchip_drm_set_win_enabled()
636 struct vop_win *vop_win = &vop->win[i]; in rockchip_drm_set_win_enabled()
639 VOP_WIN_SET(vop, win, enable, in rockchip_drm_set_win_enabled()
640 enabled && (vop->win_enabled & BIT(i))); in rockchip_drm_set_win_enabled()
642 vop_cfg_done(vop); in rockchip_drm_set_win_enabled()
644 spin_unlock(&vop->reg_lock); in rockchip_drm_set_win_enabled()
650 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_disable() local
652 WARN_ON(vop->event); in vop_crtc_atomic_disable()
657 mutex_lock(&vop->vop_lock); in vop_crtc_atomic_disable()
671 reinit_completion(&vop->dsp_hold_completion); in vop_crtc_atomic_disable()
672 vop_dsp_hold_valid_irq_enable(vop); in vop_crtc_atomic_disable()
674 spin_lock(&vop->reg_lock); in vop_crtc_atomic_disable()
676 VOP_REG_SET(vop, common, standby, 1); in vop_crtc_atomic_disable()
678 spin_unlock(&vop->reg_lock); in vop_crtc_atomic_disable()
680 wait_for_completion(&vop->dsp_hold_completion); in vop_crtc_atomic_disable()
682 vop_dsp_hold_valid_irq_disable(vop); in vop_crtc_atomic_disable()
684 vop->is_enabled = false; in vop_crtc_atomic_disable()
689 rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev); in vop_crtc_atomic_disable()
691 clk_disable(vop->dclk); in vop_crtc_atomic_disable()
692 vop_core_clks_disable(vop); in vop_crtc_atomic_disable()
693 pm_runtime_put(vop->dev); in vop_crtc_atomic_disable()
696 mutex_unlock(&vop->vop_lock); in vop_crtc_atomic_disable()
767 struct vop *vop = to_vop(old_state->crtc); in vop_plane_atomic_disable() local
772 spin_lock(&vop->reg_lock); in vop_plane_atomic_disable()
774 vop_win_disable(vop, vop_win); in vop_plane_atomic_disable()
776 spin_unlock(&vop->reg_lock); in vop_plane_atomic_disable()
787 struct vop *vop = to_vop(state->crtc); in vop_plane_atomic_update() local
811 if (WARN_ON(!vop->is_enabled)) in vop_plane_atomic_update()
846 spin_lock(&vop->reg_lock); in vop_plane_atomic_update()
848 VOP_WIN_SET(vop, win, format, format); in vop_plane_atomic_update()
849 VOP_WIN_SET(vop, win, yrgb_vir, DIV_ROUND_UP(fb->pitches[0], 4)); in vop_plane_atomic_update()
850 VOP_WIN_SET(vop, win, yrgb_mst, dma_addr); in vop_plane_atomic_update()
851 VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, y2r_en, is_yuv); in vop_plane_atomic_update()
852 VOP_WIN_SET(vop, win, y_mir_en, in vop_plane_atomic_update()
854 VOP_WIN_SET(vop, win, x_mir_en, in vop_plane_atomic_update()
869 VOP_WIN_SET(vop, win, uv_vir, DIV_ROUND_UP(fb->pitches[1], 4)); in vop_plane_atomic_update()
870 VOP_WIN_SET(vop, win, uv_mst, dma_addr); in vop_plane_atomic_update()
873 VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, in vop_plane_atomic_update()
881 scl_vop_cal_scl_fac(vop, win, actual_w, actual_h, in vop_plane_atomic_update()
885 VOP_WIN_SET(vop, win, act_info, act_info); in vop_plane_atomic_update()
886 VOP_WIN_SET(vop, win, dsp_info, dsp_info); in vop_plane_atomic_update()
887 VOP_WIN_SET(vop, win, dsp_st, dsp_st); in vop_plane_atomic_update()
890 VOP_WIN_SET(vop, win, rb_swap, rb_swap); in vop_plane_atomic_update()
900 VOP_WIN_SET(vop, win, dst_alpha_ctl, in vop_plane_atomic_update()
907 VOP_WIN_SET(vop, win, src_alpha_ctl, val); in vop_plane_atomic_update()
909 VOP_WIN_SET(vop, win, src_alpha_ctl, SRC_ALPHA_EN(0)); in vop_plane_atomic_update()
912 VOP_WIN_SET(vop, win, enable, 1); in vop_plane_atomic_update()
913 vop->win_enabled |= BIT(win_index); in vop_plane_atomic_update()
914 spin_unlock(&vop->reg_lock); in vop_plane_atomic_update()
951 struct vop *vop = to_vop(plane->state->crtc); in vop_plane_atomic_async_update() local
964 if (vop->is_enabled) { in vop_plane_atomic_async_update()
966 spin_lock(&vop->reg_lock); in vop_plane_atomic_async_update()
967 vop_cfg_done(vop); in vop_plane_atomic_async_update()
968 spin_unlock(&vop->reg_lock); in vop_plane_atomic_async_update()
981 drm_flip_work_queue(&vop->fb_unref_work, old_fb); in vop_plane_atomic_async_update()
982 set_bit(VOP_PENDING_FB_UNREF, &vop->pending); in vop_plane_atomic_async_update()
1007 struct vop *vop = to_vop(crtc); in vop_crtc_enable_vblank() local
1010 if (WARN_ON(!vop->is_enabled)) in vop_crtc_enable_vblank()
1013 spin_lock_irqsave(&vop->irq_lock, flags); in vop_crtc_enable_vblank()
1015 VOP_INTR_SET_TYPE(vop, clear, FS_INTR, 1); in vop_crtc_enable_vblank()
1016 VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 1); in vop_crtc_enable_vblank()
1018 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_crtc_enable_vblank()
1025 struct vop *vop = to_vop(crtc); in vop_crtc_disable_vblank() local
1028 if (WARN_ON(!vop->is_enabled)) in vop_crtc_disable_vblank()
1031 spin_lock_irqsave(&vop->irq_lock, flags); in vop_crtc_disable_vblank()
1033 VOP_INTR_SET_TYPE(vop, enable, FS_INTR, 0); in vop_crtc_disable_vblank()
1035 spin_unlock_irqrestore(&vop->irq_lock, flags); in vop_crtc_disable_vblank()
1042 struct vop *vop = to_vop(crtc); in vop_crtc_mode_fixup() local
1045 DIV_ROUND_UP(clk_round_rate(vop->dclk, in vop_crtc_mode_fixup()
1054 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_enable() local
1055 const struct vop_data *vop_data = vop->data; in vop_crtc_atomic_enable()
1078 mutex_lock(&vop->vop_lock); in vop_crtc_atomic_enable()
1080 WARN_ON(vop->event); in vop_crtc_atomic_enable()
1084 mutex_unlock(&vop->vop_lock); in vop_crtc_atomic_enable()
1085 DRM_DEV_ERROR(vop->dev, "Failed to enable vop (%d)\n", ret); in vop_crtc_atomic_enable()
1094 VOP_REG_SET(vop, output, pin_pol, pin_pol); in vop_crtc_atomic_enable()
1095 VOP_REG_SET(vop, output, mipi_dual_channel_en, 0); in vop_crtc_atomic_enable()
1099 VOP_REG_SET(vop, output, rgb_en, 1); in vop_crtc_atomic_enable()
1100 VOP_REG_SET(vop, output, rgb_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1103 VOP_REG_SET(vop, output, edp_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1104 VOP_REG_SET(vop, output, edp_en, 1); in vop_crtc_atomic_enable()
1107 VOP_REG_SET(vop, output, hdmi_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1108 VOP_REG_SET(vop, output, hdmi_en, 1); in vop_crtc_atomic_enable()
1111 VOP_REG_SET(vop, output, mipi_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1112 VOP_REG_SET(vop, output, mipi_en, 1); in vop_crtc_atomic_enable()
1113 VOP_REG_SET(vop, output, mipi_dual_channel_en, in vop_crtc_atomic_enable()
1118 VOP_REG_SET(vop, output, dp_pin_pol, pin_pol); in vop_crtc_atomic_enable()
1119 VOP_REG_SET(vop, output, dp_en, 1); in vop_crtc_atomic_enable()
1122 DRM_DEV_ERROR(vop->dev, "unsupported connector_type [%d]\n", in vop_crtc_atomic_enable()
1134 VOP_REG_SET(vop, common, pre_dither_down, 1); in vop_crtc_atomic_enable()
1136 VOP_REG_SET(vop, common, pre_dither_down, 0); in vop_crtc_atomic_enable()
1139 VOP_REG_SET(vop, common, dither_down_sel, DITHER_DOWN_ALLEGRO); in vop_crtc_atomic_enable()
1140 VOP_REG_SET(vop, common, dither_down_mode, RGB888_TO_RGB666); in vop_crtc_atomic_enable()
1141 VOP_REG_SET(vop, common, dither_down_en, 1); in vop_crtc_atomic_enable()
1143 VOP_REG_SET(vop, common, dither_down_en, 0); in vop_crtc_atomic_enable()
1146 VOP_REG_SET(vop, common, out_mode, s->output_mode); in vop_crtc_atomic_enable()
1148 VOP_REG_SET(vop, modeset, htotal_pw, (htotal << 16) | hsync_len); in vop_crtc_atomic_enable()
1151 VOP_REG_SET(vop, modeset, hact_st_end, val); in vop_crtc_atomic_enable()
1152 VOP_REG_SET(vop, modeset, hpost_st_end, val); in vop_crtc_atomic_enable()
1154 VOP_REG_SET(vop, modeset, vtotal_pw, (vtotal << 16) | vsync_len); in vop_crtc_atomic_enable()
1157 VOP_REG_SET(vop, modeset, vact_st_end, val); in vop_crtc_atomic_enable()
1158 VOP_REG_SET(vop, modeset, vpost_st_end, val); in vop_crtc_atomic_enable()
1160 VOP_REG_SET(vop, intr, line_flag_num[0], vact_end); in vop_crtc_atomic_enable()
1162 clk_set_rate(vop->dclk, adjusted_mode->clock * 1000); in vop_crtc_atomic_enable()
1164 VOP_REG_SET(vop, common, standby, 0); in vop_crtc_atomic_enable()
1165 mutex_unlock(&vop->vop_lock); in vop_crtc_atomic_enable()
1168 static bool vop_fs_irq_is_pending(struct vop *vop) in vop_fs_irq_is_pending() argument
1170 return VOP_INTR_GET_TYPE(vop, status, FS_INTR); in vop_fs_irq_is_pending()
1173 static void vop_wait_for_irq_handler(struct vop *vop) in vop_wait_for_irq_handler() argument
1186 ret = readx_poll_timeout_atomic(vop_fs_irq_is_pending, vop, pending, in vop_wait_for_irq_handler()
1189 DRM_DEV_ERROR(vop->dev, "VOP vblank IRQ stuck for 10 ms\n"); in vop_wait_for_irq_handler()
1191 synchronize_irq(vop->irq); in vop_wait_for_irq_handler()
1199 struct vop *vop = to_vop(crtc); in vop_crtc_atomic_flush() local
1203 if (WARN_ON(!vop->is_enabled)) in vop_crtc_atomic_flush()
1206 spin_lock(&vop->reg_lock); in vop_crtc_atomic_flush()
1208 vop_cfg_done(vop); in vop_crtc_atomic_flush()
1210 spin_unlock(&vop->reg_lock); in vop_crtc_atomic_flush()
1217 vop_wait_for_irq_handler(vop); in vop_crtc_atomic_flush()
1222 WARN_ON(vop->event); in vop_crtc_atomic_flush()
1224 vop->event = crtc->state->event; in vop_crtc_atomic_flush()
1239 drm_flip_work_queue(&vop->fb_unref_work, old_plane_state->fb); in vop_crtc_atomic_flush()
1240 set_bit(VOP_PENDING_FB_UNREF, &vop->pending); in vop_crtc_atomic_flush()
1289 static struct drm_connector *vop_get_edp_connector(struct vop *vop) in vop_get_edp_connector() argument
1294 drm_connector_list_iter_begin(vop->drm_dev, &conn_iter); in vop_get_edp_connector()
1309 struct vop *vop = to_vop(crtc); in vop_crtc_set_crc_source() local
1313 connector = vop_get_edp_connector(vop); in vop_crtc_set_crc_source()
1368 struct vop *vop = container_of(work, struct vop, fb_unref_work); in vop_fb_unref_worker() local
1371 drm_crtc_vblank_put(&vop->crtc); in vop_fb_unref_worker()
1375 static void vop_handle_vblank(struct vop *vop) in vop_handle_vblank() argument
1377 struct drm_device *drm = vop->drm_dev; in vop_handle_vblank()
1378 struct drm_crtc *crtc = &vop->crtc; in vop_handle_vblank()
1381 if (vop->event) { in vop_handle_vblank()
1382 drm_crtc_send_vblank_event(crtc, vop->event); in vop_handle_vblank()
1384 vop->event = NULL; in vop_handle_vblank()
1388 if (test_and_clear_bit(VOP_PENDING_FB_UNREF, &vop->pending)) in vop_handle_vblank()
1389 drm_flip_work_commit(&vop->fb_unref_work, system_unbound_wq); in vop_handle_vblank()
1394 struct vop *vop = data; in vop_isr() local
1395 struct drm_crtc *crtc = &vop->crtc; in vop_isr()
1403 if (!pm_runtime_get_if_in_use(vop->dev)) in vop_isr()
1406 if (vop_core_clks_enable(vop)) { in vop_isr()
1407 DRM_DEV_ERROR_RATELIMITED(vop->dev, "couldn't enable clocks\n"); in vop_isr()
1415 spin_lock(&vop->irq_lock); in vop_isr()
1417 active_irqs = VOP_INTR_GET_TYPE(vop, status, INTR_MASK); in vop_isr()
1420 VOP_INTR_SET_TYPE(vop, clear, active_irqs, 1); in vop_isr()
1422 spin_unlock(&vop->irq_lock); in vop_isr()
1429 complete(&vop->dsp_hold_completion); in vop_isr()
1435 complete(&vop->line_flag_completion); in vop_isr()
1442 vop_handle_vblank(vop); in vop_isr()
1449 DRM_DEV_ERROR(vop->dev, "Unknown VOP IRQs: %#02x\n", in vop_isr()
1453 vop_core_clks_disable(vop); in vop_isr()
1455 pm_runtime_put(vop->dev); in vop_isr()
1471 static int vop_create_crtc(struct vop *vop) in vop_create_crtc() argument
1473 const struct vop_data *vop_data = vop->data; in vop_create_crtc()
1474 struct device *dev = vop->dev; in vop_create_crtc()
1475 struct drm_device *drm_dev = vop->drm_dev; in vop_create_crtc()
1477 struct drm_crtc *crtc = &vop->crtc; in vop_create_crtc()
1488 struct vop_win *vop_win = &vop->win[i]; in vop_create_crtc()
1495 ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, in vop_create_crtc()
1501 DRM_DEV_ERROR(vop->dev, "failed to init plane %d\n", in vop_create_crtc()
1527 struct vop_win *vop_win = &vop->win[i]; in vop_create_crtc()
1534 ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, in vop_create_crtc()
1541 DRM_DEV_ERROR(vop->dev, "failed to init overlay %d\n", in vop_create_crtc()
1551 DRM_DEV_ERROR(vop->dev, "no port node found in %pOF\n", in vop_create_crtc()
1557 drm_flip_work_init(&vop->fb_unref_work, "fb_unref", in vop_create_crtc()
1560 init_completion(&vop->dsp_hold_completion); in vop_create_crtc()
1561 init_completion(&vop->line_flag_completion); in vop_create_crtc()
1566 DRM_DEV_DEBUG_KMS(vop->dev, in vop_create_crtc()
1581 static void vop_destroy_crtc(struct vop *vop) in vop_destroy_crtc() argument
1583 struct drm_crtc *crtc = &vop->crtc; in vop_destroy_crtc()
1584 struct drm_device *drm_dev = vop->drm_dev; in vop_destroy_crtc()
1608 drm_flip_work_cleanup(&vop->fb_unref_work); in vop_destroy_crtc()
1611 static int vop_initial(struct vop *vop) in vop_initial() argument
1616 vop->hclk = devm_clk_get(vop->dev, "hclk_vop"); in vop_initial()
1617 if (IS_ERR(vop->hclk)) { in vop_initial()
1618 DRM_DEV_ERROR(vop->dev, "failed to get hclk source\n"); in vop_initial()
1619 return PTR_ERR(vop->hclk); in vop_initial()
1621 vop->aclk = devm_clk_get(vop->dev, "aclk_vop"); in vop_initial()
1622 if (IS_ERR(vop->aclk)) { in vop_initial()
1623 DRM_DEV_ERROR(vop->dev, "failed to get aclk source\n"); in vop_initial()
1624 return PTR_ERR(vop->aclk); in vop_initial()
1626 vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); in vop_initial()
1627 if (IS_ERR(vop->dclk)) { in vop_initial()
1628 DRM_DEV_ERROR(vop->dev, "failed to get dclk source\n"); in vop_initial()
1629 return PTR_ERR(vop->dclk); in vop_initial()
1632 ret = pm_runtime_get_sync(vop->dev); in vop_initial()
1634 DRM_DEV_ERROR(vop->dev, "failed to get pm runtime: %d\n", ret); in vop_initial()
1638 ret = clk_prepare(vop->dclk); in vop_initial()
1640 DRM_DEV_ERROR(vop->dev, "failed to prepare dclk\n"); in vop_initial()
1645 ret = clk_prepare_enable(vop->hclk); in vop_initial()
1647 DRM_DEV_ERROR(vop->dev, "failed to prepare/enable hclk\n"); in vop_initial()
1651 ret = clk_prepare_enable(vop->aclk); in vop_initial()
1653 DRM_DEV_ERROR(vop->dev, "failed to prepare/enable aclk\n"); in vop_initial()
1660 ahb_rst = devm_reset_control_get(vop->dev, "ahb"); in vop_initial()
1662 DRM_DEV_ERROR(vop->dev, "failed to get ahb reset\n"); in vop_initial()
1670 VOP_INTR_SET_TYPE(vop, clear, INTR_MASK, 1); in vop_initial()
1671 VOP_INTR_SET_TYPE(vop, enable, INTR_MASK, 0); in vop_initial()
1673 for (i = 0; i < vop->len; i += sizeof(u32)) in vop_initial()
1674 vop->regsbak[i / 4] = readl_relaxed(vop->regs + i); in vop_initial()
1676 VOP_REG_SET(vop, misc, global_regdone_en, 1); in vop_initial()
1677 VOP_REG_SET(vop, common, dsp_blank, 0); in vop_initial()
1679 for (i = 0; i < vop->data->win_size; i++) { in vop_initial()
1680 struct vop_win *vop_win = &vop->win[i]; in vop_initial()
1684 VOP_WIN_SET(vop, win, channel, (channel + 1) << 4 | channel); in vop_initial()
1685 vop_win_disable(vop, vop_win); in vop_initial()
1686 VOP_WIN_SET(vop, win, gate, 1); in vop_initial()
1689 vop_cfg_done(vop); in vop_initial()
1694 vop->dclk_rst = devm_reset_control_get(vop->dev, "dclk"); in vop_initial()
1695 if (IS_ERR(vop->dclk_rst)) { in vop_initial()
1696 DRM_DEV_ERROR(vop->dev, "failed to get dclk reset\n"); in vop_initial()
1697 ret = PTR_ERR(vop->dclk_rst); in vop_initial()
1700 reset_control_assert(vop->dclk_rst); in vop_initial()
1702 reset_control_deassert(vop->dclk_rst); in vop_initial()
1704 clk_disable(vop->hclk); in vop_initial()
1705 clk_disable(vop->aclk); in vop_initial()
1707 vop->is_enabled = false; in vop_initial()
1709 pm_runtime_put_sync(vop->dev); in vop_initial()
1714 clk_disable_unprepare(vop->aclk); in vop_initial()
1716 clk_disable_unprepare(vop->hclk); in vop_initial()
1718 clk_unprepare(vop->dclk); in vop_initial()
1720 pm_runtime_put_sync(vop->dev); in vop_initial()
1727 static void vop_win_init(struct vop *vop) in vop_win_init() argument
1729 const struct vop_data *vop_data = vop->data; in vop_win_init()
1733 struct vop_win *vop_win = &vop->win[i]; in vop_win_init()
1737 vop_win->vop = vop; in vop_win_init()
1756 struct vop *vop = to_vop(crtc); in rockchip_drm_wait_vact_end() local
1760 if (!crtc || !vop->is_enabled) in rockchip_drm_wait_vact_end()
1763 mutex_lock(&vop->vop_lock); in rockchip_drm_wait_vact_end()
1769 if (vop_line_flag_irq_is_enabled(vop)) { in rockchip_drm_wait_vact_end()
1774 reinit_completion(&vop->line_flag_completion); in rockchip_drm_wait_vact_end()
1775 vop_line_flag_irq_enable(vop); in rockchip_drm_wait_vact_end()
1777 jiffies_left = wait_for_completion_timeout(&vop->line_flag_completion, in rockchip_drm_wait_vact_end()
1779 vop_line_flag_irq_disable(vop); in rockchip_drm_wait_vact_end()
1782 DRM_DEV_ERROR(vop->dev, "Timeout waiting for IRQ\n"); in rockchip_drm_wait_vact_end()
1788 mutex_unlock(&vop->vop_lock); in rockchip_drm_wait_vact_end()
1798 struct vop *vop; in vop_bind() local
1807 vop = devm_kzalloc(dev, struct_size(vop, win, vop_data->win_size), in vop_bind()
1809 if (!vop) in vop_bind()
1812 vop->dev = dev; in vop_bind()
1813 vop->data = vop_data; in vop_bind()
1814 vop->drm_dev = drm_dev; in vop_bind()
1815 dev_set_drvdata(dev, vop); in vop_bind()
1817 vop_win_init(vop); in vop_bind()
1820 vop->len = resource_size(res); in vop_bind()
1821 vop->regs = devm_ioremap_resource(dev, res); in vop_bind()
1822 if (IS_ERR(vop->regs)) in vop_bind()
1823 return PTR_ERR(vop->regs); in vop_bind()
1825 vop->regsbak = devm_kzalloc(dev, vop->len, GFP_KERNEL); in vop_bind()
1826 if (!vop->regsbak) in vop_bind()
1834 vop->irq = (unsigned int)irq; in vop_bind()
1836 spin_lock_init(&vop->reg_lock); in vop_bind()
1837 spin_lock_init(&vop->irq_lock); in vop_bind()
1838 mutex_init(&vop->vop_lock); in vop_bind()
1840 ret = vop_create_crtc(vop); in vop_bind()
1846 ret = vop_initial(vop); in vop_bind()
1853 ret = devm_request_irq(dev, vop->irq, vop_isr, in vop_bind()
1854 IRQF_SHARED, dev_name(dev), vop); in vop_bind()
1858 if (vop->data->feature & VOP_FEATURE_INTERNAL_RGB) { in vop_bind()
1859 vop->rgb = rockchip_rgb_init(dev, &vop->crtc, vop->drm_dev); in vop_bind()
1860 if (IS_ERR(vop->rgb)) { in vop_bind()
1861 ret = PTR_ERR(vop->rgb); in vop_bind()
1870 vop_destroy_crtc(vop); in vop_bind()
1876 struct vop *vop = dev_get_drvdata(dev); in vop_unbind() local
1878 if (vop->rgb) in vop_unbind()
1879 rockchip_rgb_fini(vop->rgb); in vop_unbind()
1882 vop_destroy_crtc(vop); in vop_unbind()
1884 clk_unprepare(vop->aclk); in vop_unbind()
1885 clk_unprepare(vop->hclk); in vop_unbind()
1886 clk_unprepare(vop->dclk); in vop_unbind()