590 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_divider_value()  local
597 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_set_divider_value()
600 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_set_divider_value()
607 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix);  in trinity_set_divider_value()
610 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_PG_CNTL + ix, value);  in trinity_set_divider_value()
617 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_ds_dividers()  local
619 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_ds_dividers()
622 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_ds_dividers()
629 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_ss_dividers()  local
631 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_ss_dividers()
634 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_ss_dividers()
642 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_vid()  local
644 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_set_vid()
647 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_set_vid()
649 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_set_vid()
652 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_set_vid()
659 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_allos_gnb_slow()  local
661 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix);  in trinity_set_allos_gnb_slow()
664 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);  in trinity_set_allos_gnb_slow()
671 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_force_nbp_state()  local
673 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix);  in trinity_set_force_nbp_state()
676 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value);  in trinity_set_force_nbp_state()
683 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_display_wm()  local
685 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_display_wm()
688 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_display_wm()
695 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_vce_wm()  local
697 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix);  in trinity_set_vce_wm()
700 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_1 + ix, value);  in trinity_set_vce_wm()
707 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_set_at()  local
709 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix);  in trinity_set_at()
712 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_AT + ix, value);  in trinity_set_at()
738 	u32 ix = index * TRINITY_SIZEOF_DPM_STATE_TABLE;  in trinity_power_level_enable_disable()  local
740 	value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix);  in trinity_power_level_enable_disable()
744 	WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_0 + ix, value);  in trinity_power_level_enable_disable()