2292 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_power_containment_values()  local
2351 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
2360 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_power_containment_values()
3672 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_program_ds_registers()  local
3675 	if (eg_pi->sclk_deep_sleep) {  in si_program_ds_registers()
3961 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_construct_voltage_tables()  local
3967 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3971 		if (eg_pi->vddc_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
3974 								 &eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3978 						&eg_pi->vddc_voltage_table);  in si_construct_voltage_tables()
3985 	if (eg_pi->vddci_control) {  in si_construct_voltage_tables()
3987 						    VOLTAGE_OBJ_GPIO_LUT, &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
3991 		if (eg_pi->vddci_voltage_table.count > SISLANDS_MAX_NO_VREG_STEPS)  in si_construct_voltage_tables()
3994 								 &eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
3999 						&eg_pi->vddci_voltage_table);  in si_construct_voltage_tables()
4052 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_voltage_tables()  local
4064 		if (eg_pi->vddc_voltage_table.count) {  in si_populate_smc_voltage_tables()
4065 			si_populate_smc_voltage_table(rdev, &eg_pi->vddc_voltage_table, table);  in si_populate_smc_voltage_tables()
4067 				cpu_to_be32(eg_pi->vddc_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4069 			for (i = 0; i < eg_pi->vddc_voltage_table.count; i++) {  in si_populate_smc_voltage_tables()
4070 				if (pi->max_vddc_in_table <= eg_pi->vddc_voltage_table.entries[i].value) {  in si_populate_smc_voltage_tables()
4077 		if (eg_pi->vddci_voltage_table.count) {  in si_populate_smc_voltage_tables()
4078 			si_populate_smc_voltage_table(rdev, &eg_pi->vddci_voltage_table, table);  in si_populate_smc_voltage_tables()
4081 				cpu_to_be32(eg_pi->vddci_voltage_table.mask_low);  in si_populate_smc_voltage_tables()
4372 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_initial_state()  local
4420 	ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_initial_state()
4436 	if (eg_pi->vddci_control)  in si_populate_smc_initial_state()
4438 					  &eg_pi->vddci_voltage_table,  in si_populate_smc_initial_state()
4493 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_smc_acpi_state()  local
4514 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4537 		ret = si_populate_voltage_value(rdev, &eg_pi->vddc_voltage_table,  in si_populate_smc_acpi_state()
4565 		if (eg_pi->acpi_vddci)  in si_populate_smc_acpi_state()
4566 			si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_populate_smc_acpi_state()
4567 						  eg_pi->acpi_vddci,  in si_populate_smc_acpi_state()
4612 	if (eg_pi->dynamic_ac_timing)  in si_populate_smc_acpi_state()
4633 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_populate_ulv_state()  local
4642 		if (eg_pi->sclk_deep_sleep) {  in si_populate_ulv_state()
4982 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_level_to_smc()  local
4989 	if (eg_pi->pcie_performance_request &&  in si_convert_power_level_to_smc()
5003 	    !eg_pi->uvd_enabled &&  in si_convert_power_level_to_smc()
5016 		if (pl->mclk > eg_pi->mclk_edc_wr_enable_threshold)  in si_convert_power_level_to_smc()
5046 					&eg_pi->vddc_voltage_table,  in si_convert_power_level_to_smc()
5061 	if (eg_pi->vddci_control) {  in si_convert_power_level_to_smc()
5062 		ret = si_populate_voltage_value(rdev, &eg_pi->vddci_voltage_table,  in si_convert_power_level_to_smc()
5193 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_convert_power_state_to_smc()  local
5207 		eg_pi->uvd_enabled = true;  in si_convert_power_state_to_smc()
5208 		if (eg_pi->smu_uvd_hs)  in si_convert_power_state_to_smc()
5211 		eg_pi->uvd_enabled = false;  in si_convert_power_state_to_smc()
5219 		if (eg_pi->sclk_deep_sleep) {  in si_convert_power_state_to_smc()
5244 		if (eg_pi->dynamic_ac_timing)  in si_convert_power_state_to_smc()
5814 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);
5816 	if (eg_pi->sclk_deep_sleep) {
6352 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_enable()  local
6370 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6373 			eg_pi->dynamic_ac_timing = false;  in si_dpm_enable()
6416 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_enable()
6522 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_pre_set_power_state()  local
6528 	si_apply_state_adjust_rules(rdev, &eg_pi->requested_rps);  in si_dpm_pre_set_power_state()
6561 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_set_power_state()  local
6562 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_set_power_state()
6563 	struct radeon_ps *old_ps = &eg_pi->current_rps;  in si_dpm_set_power_state()
6576 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6609 	if (eg_pi->dynamic_ac_timing) {  in si_dpm_set_power_state()
6635 	if (eg_pi->pcie_performance_request)  in si_dpm_set_power_state()
6664 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_post_set_power_state()  local
6665 	struct radeon_ps *new_ps = &eg_pi->requested_rps;  in si_dpm_post_set_power_state()
6737 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_parse_pplib_clock_info()  local
6767 		eg_pi->acpi_vddci = pl->vddci;  in si_parse_pplib_clock_info()
6903 	struct evergreen_power_info *eg_pi;  in si_dpm_init()  local
6916 	eg_pi = &ni_pi->eg;  in si_dpm_init()
6917 	pi = &eg_pi->rv7xx;  in si_dpm_init()
6944 	eg_pi->acpi_vddci = 0;  in si_dpm_init()
6990 	eg_pi->smu_uvd_hs = false;  in si_dpm_init()
6998 	eg_pi->mclk_edc_wr_enable_threshold = 40000;  in si_dpm_init()
7000 	ni_pi->mclk_rtt_mode_threshold = eg_pi->mclk_edc_wr_enable_threshold;  in si_dpm_init()
7018 	eg_pi->vddci_control =  in si_dpm_init()
7021 	if (!eg_pi->vddci_control)  in si_dpm_init()
7038 	eg_pi->sclk_deep_sleep = true;  in si_dpm_init()
7046 	eg_pi->dynamic_ac_timing = true;  in si_dpm_init()
7048 	eg_pi->light_sleep = true;  in si_dpm_init()
7050 	eg_pi->pcie_performance_request =  in si_dpm_init()
7053 	eg_pi->pcie_performance_request = false;  in si_dpm_init()
7095 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_debugfs_print_current_performance_level()  local
7096 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_debugfs_print_current_performance_level()
7115 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_sclk()  local
7116 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_sclk()
7133 	struct evergreen_power_info *eg_pi = evergreen_get_pi(rdev);  in si_dpm_get_current_mclk()  local
7134 	struct radeon_ps *rps = &eg_pi->current_rps;  in si_dpm_get_current_mclk()