423 	int ddc_line = 0;  in combios_setup_i2c_bus()  local
450 		ddc_line = 0;  in combios_setup_i2c_bus()
453 		ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
456 		ddc_line = RADEON_GPIO_VGA_DDC;  in combios_setup_i2c_bus()
459 		ddc_line = RADEON_GPIOPAD_MASK;  in combios_setup_i2c_bus()
462 		ddc_line = RADEON_MDGPIO_MASK;  in combios_setup_i2c_bus()
468 			ddc_line = RADEON_GPIOPAD_MASK;  in combios_setup_i2c_bus()
471 			ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
474 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
480 			ddc_line = RADEON_GPIO_DVI_DDC;  in combios_setup_i2c_bus()
485 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
487 			ddc_line = RADEON_GPIO_MONID;  in combios_setup_i2c_bus()
490 			ddc_line = RADEON_GPIO_CRT2_DDC;  in combios_setup_i2c_bus()
494 	if (ddc_line == RADEON_GPIOPAD_MASK) {  in combios_setup_i2c_bus()
503 	} else if (ddc_line == RADEON_MDGPIO_MASK) {  in combios_setup_i2c_bus()
513 		i2c.mask_clk_reg = ddc_line;  in combios_setup_i2c_bus()
514 		i2c.mask_data_reg = ddc_line;  in combios_setup_i2c_bus()
515 		i2c.a_clk_reg = ddc_line;  in combios_setup_i2c_bus()
516 		i2c.a_data_reg = ddc_line;  in combios_setup_i2c_bus()
517 		i2c.en_clk_reg = ddc_line;  in combios_setup_i2c_bus()
518 		i2c.en_data_reg = ddc_line;  in combios_setup_i2c_bus()
519 		i2c.y_clk_reg = ddc_line;  in combios_setup_i2c_bus()
520 		i2c.y_data_reg = ddc_line;  in combios_setup_i2c_bus()
533 	} else if ((ddc_line == RADEON_GPIOPAD_MASK) ||  in combios_setup_i2c_bus()
534 		   (ddc_line == RADEON_MDGPIO_MASK)) {  in combios_setup_i2c_bus()
563 		switch (ddc_line) {  in combios_setup_i2c_bus()
573 		switch (ddc_line) {  in combios_setup_i2c_bus()
585 		switch (ddc_line) {  in combios_setup_i2c_bus()
598 		switch (ddc_line) {  in combios_setup_i2c_bus()
612 		switch (ddc_line) {  in combios_setup_i2c_bus()
637 	if (ddc_line)  in combios_setup_i2c_bus()