Lines Matching refs:initialState

1244 	table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =  in cypress_populate_smc_initial_state()
1246 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = in cypress_populate_smc_initial_state()
1248 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = in cypress_populate_smc_initial_state()
1250 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = in cypress_populate_smc_initial_state()
1252 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = in cypress_populate_smc_initial_state()
1254 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL = in cypress_populate_smc_initial_state()
1257 table->initialState.levels[0].mclk.mclk770.vMPLL_SS = in cypress_populate_smc_initial_state()
1259 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 = in cypress_populate_smc_initial_state()
1262 table->initialState.levels[0].mclk.mclk770.mclk_value = in cypress_populate_smc_initial_state()
1265 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL = in cypress_populate_smc_initial_state()
1267 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 = in cypress_populate_smc_initial_state()
1269 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 = in cypress_populate_smc_initial_state()
1271 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM = in cypress_populate_smc_initial_state()
1273 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 = in cypress_populate_smc_initial_state()
1276 table->initialState.levels[0].sclk.sclk_value = in cypress_populate_smc_initial_state()
1279 table->initialState.levels[0].arbValue = MC_CG_ARB_FREQ_F0; in cypress_populate_smc_initial_state()
1281 table->initialState.levels[0].ACIndex = 0; in cypress_populate_smc_initial_state()
1286 &table->initialState.levels[0].vddc); in cypress_populate_smc_initial_state()
1292 &table->initialState.levels[0].vddci); in cypress_populate_smc_initial_state()
1295 &table->initialState.levels[0].mvdd); in cypress_populate_smc_initial_state()
1298 table->initialState.levels[0].aT = cpu_to_be32(a_t); in cypress_populate_smc_initial_state()
1300 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp); in cypress_populate_smc_initial_state()
1304 table->initialState.levels[0].gen2PCIE = 1; in cypress_populate_smc_initial_state()
1306 table->initialState.levels[0].gen2PCIE = 0; in cypress_populate_smc_initial_state()
1308 table->initialState.levels[0].gen2XSP = 1; in cypress_populate_smc_initial_state()
1310 table->initialState.levels[0].gen2XSP = 0; in cypress_populate_smc_initial_state()
1313 table->initialState.levels[0].strobeMode = in cypress_populate_smc_initial_state()
1318 table->initialState.levels[0].mcFlags = SMC_MC_EDC_RD_FLAG | SMC_MC_EDC_WR_FLAG; in cypress_populate_smc_initial_state()
1320 table->initialState.levels[0].mcFlags = 0; in cypress_populate_smc_initial_state()
1323 table->initialState.levels[1] = table->initialState.levels[0]; in cypress_populate_smc_initial_state()
1324 table->initialState.levels[2] = table->initialState.levels[0]; in cypress_populate_smc_initial_state()
1326 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC; in cypress_populate_smc_initial_state()
1355 table->ACPIState = table->initialState; in cypress_populate_smc_acpi_state()
1656 table->driverState = table->initialState; in cypress_init_smc_table()