3478 	radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in cik_ring_test()
3534 	radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in cik_hdp_flush_cp_ring_emit()
3563 	radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));  in cik_fence_gfx_ring_emit()
3575 	radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));  in cik_fence_gfx_ring_emit()
3602 	radeon_ring_write(ring, PACKET3(PACKET3_RELEASE_MEM, 5));  in cik_fence_compute_ring_emit()
3633 	radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));  in cik_semaphore_ring_emit()
3639 		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in cik_semaphore_ring_emit()
3694 		radeon_ring_write(ring, PACKET3(PACKET3_DMA_DATA, 5));  in cik_copy_cpdma()
3741 		radeon_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));  in cik_ring_ib_execute()
3744 		header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);  in cik_ring_ib_execute()
3749 			radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));  in cik_ring_ib_execute()
3755 			radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_ring_ib_execute()
3762 		header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);  in cik_ring_ib_execute()
3803 	ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);  in cik_ib_test()
4004 	radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));  in cik_cp_gfx_start()
4010 	radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_cp_gfx_start()
4013 	radeon_ring_write(ring, PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in cik_cp_gfx_start()
4020 	radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_cp_gfx_start()
4024 	radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));  in cik_cp_gfx_start()
4027 	radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));  in cik_cp_gfx_start()
5697 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
5711 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
5718 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 6));  in cik_vm_flush()
5729 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
5740 	radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));  in cik_vm_flush()
5748 	radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));  in cik_vm_flush()
5761 		radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));  in cik_vm_flush()
6725 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_get_csb_buffer()
6728 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));  in cik_get_csb_buffer()
6736 					cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));  in cik_get_csb_buffer()
6746 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));  in cik_get_csb_buffer()
6772 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));  in cik_get_csb_buffer()
6775 	buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));  in cik_get_csb_buffer()
8409 			nop = PACKET3(PACKET3_NOP, 0x3FFF);  in cik_startup()
8413 		nop = PACKET3(PACKET3_NOP, 0x3FFF);  in cik_startup()