Lines Matching refs:DSSERR
713 DSSERR("DSI error, irqstatus %x\n", irqstatus); in dsi_handle_irq_errors()
724 DSSERR("DSI VC(%d) error, vc irqstatus %x\n", in dsi_handle_irq_errors()
733 DSSERR("DSI CIO error, cio irqstatus %x\n", ciostatus); in dsi_handle_irq_errors()
1173 DSSERR("Failed to set dsi_if_enable to %d\n", enable); in dsi_if_enable()
1296 DSSERR("Failed to set DSI PLL power mode to %d\n", in dsi_pll_power()
1342 DSSERR("PLL not coming out of reset.\n"); in dsi_pll_enable()
1637 DSSERR("failed to set complexio power state to " in dsi_cio_power()
1907 DSSERR("CIO TXCLKESC%d domain not coming " \ in dsi_cio_wait_tx_clk_esc_reset()
2027 DSSERR("CIO SCP Clock domain not coming out of reset.\n"); in dsi_cio_init()
2075 DSSERR("CIO PWR clock domain not coming out of reset.\n"); in dsi_cio_init()
2157 DSSERR("Illegal FIFO configuration\n"); in dsi_config_tx_fifo()
2189 DSSERR("Illegal FIFO configuration\n"); in dsi_config_rx_fifo()
2212 DSSERR("TX_STOP bit not going down\n"); in dsi_force_tx_stop_mode_io()
2257 DSSERR("Failed to complete previous frame transfer\n"); in dsi_sync_vc_vp()
2303 DSSERR("Failed to complete previous l4 transfer\n"); in dsi_sync_vc_l4()
2350 DSSERR("Failed to set dsi_vc_enable to %d\n", enable); in dsi_vc_enable()
2366 DSSERR("VC(%d) busy when trying to configure it!\n", in dsi_vc_initial_config()
2401 DSSERR("vc(%d) busy when trying to config for VP\n", channel); in dsi_vc_config_source()
2460 DSSERR("\tACK with ERROR (%#x):\n", err); in dsi_show_rx_ack_with_err()
2462 DSSERR("\t\tSoT Error\n"); in dsi_show_rx_ack_with_err()
2464 DSSERR("\t\tSoT Sync Error\n"); in dsi_show_rx_ack_with_err()
2466 DSSERR("\t\tEoT Sync Error\n"); in dsi_show_rx_ack_with_err()
2468 DSSERR("\t\tEscape Mode Entry Command Error\n"); in dsi_show_rx_ack_with_err()
2470 DSSERR("\t\tLP Transmit Sync Error\n"); in dsi_show_rx_ack_with_err()
2472 DSSERR("\t\tHS Receive Timeout Error\n"); in dsi_show_rx_ack_with_err()
2474 DSSERR("\t\tFalse Control Error\n"); in dsi_show_rx_ack_with_err()
2476 DSSERR("\t\t(reserved7)\n"); in dsi_show_rx_ack_with_err()
2478 DSSERR("\t\tECC Error, single-bit (corrected)\n"); in dsi_show_rx_ack_with_err()
2480 DSSERR("\t\tECC Error, multi-bit (not corrected)\n"); in dsi_show_rx_ack_with_err()
2482 DSSERR("\t\tChecksum Error\n"); in dsi_show_rx_ack_with_err()
2484 DSSERR("\t\tData type not recognized\n"); in dsi_show_rx_ack_with_err()
2486 DSSERR("\t\tInvalid VC ID\n"); in dsi_show_rx_ack_with_err()
2488 DSSERR("\t\tInvalid Transmission Length\n"); in dsi_show_rx_ack_with_err()
2490 DSSERR("\t\t(reserved14)\n"); in dsi_show_rx_ack_with_err()
2492 DSSERR("\t\tDSI Protocol Violation\n"); in dsi_show_rx_ack_with_err()
2502 DSSERR("\trawval %#08x\n", val); in dsi_vc_flush_receive_data()
2508 DSSERR("\tDCS short response, 1 byte: %#x\n", in dsi_vc_flush_receive_data()
2511 DSSERR("\tDCS short response, 2 byte: %#x\n", in dsi_vc_flush_receive_data()
2514 DSSERR("\tDCS long response, len %d\n", in dsi_vc_flush_receive_data()
2518 DSSERR("\tunknown datatype 0x%02x\n", dt); in dsi_vc_flush_receive_data()
2533 DSSERR("rx fifo not empty when sending BTA, dumping data:\n"); in dsi_vc_send_bta()
2568 DSSERR("Failed to receive BTA\n"); in dsi_vc_send_bta_sync()
2575 DSSERR("Error while sending BTA: %x\n", err); in dsi_vc_send_bta_sync()
2632 DSSERR("unable to send long packet: packet too long.\n"); in dsi_vc_send_long()
2697 DSSERR("ERROR FIFO FULL, aborting transfer\n"); in dsi_vc_send_short()
2781 DSSERR("rx fifo not empty after write, dumping data:\n"); in dsi_vc_write_common()
2789 DSSERR("dsi_vc_write_common(ch %d, cmd 0x%02x, len %d) failed\n", in dsi_vc_write_common()
2819 DSSERR("dsi_vc_dcs_send_read_request(ch %d, cmd 0x%02x)" in dsi_vc_dcs_send_read_request()
2854 DSSERR("dsi_vc_generic_send_read_request(ch %d, reqlen %d)" in dsi_vc_generic_send_read_request()
2871 DSSERR("RX fifo empty when trying to read.\n"); in dsi_vc_read_rx_fifo()
2958 DSSERR("\tunknown datatype 0x%02x\n", dt); in dsi_vc_read_rx_fifo()
2964 DSSERR("dsi_vc_read_rx_fifo(ch %d type %s) failed\n", channel, in dsi_vc_read_rx_fifo()
2996 DSSERR("dsi_vc_dcs_read(ch %d, cmd 0x%02x) failed\n", channel, dcs_cmd); in dsi_vc_dcs_read()
3071 DSSERR("HS busy when enabling ULPS\n"); in dsi_enter_ulps()
3076 DSSERR("LP busy when enabling ULPS\n"); in dsi_enter_ulps()
3101 DSSERR("ULPS enable timeout\n"); in dsi_enter_ulps()
3890 DSSERR("TE not received for 250ms!\n"); in dsi_te_timeout()
3921 DSSERR("Framedone not received for 250ms!\n"); in dsi_framedone_timeout_work_callback()
3980 DSSERR("Failed to calc dispc clocks\n"); in dsi_configure_dispc_clocks()
4002 DSSERR("can't register FRAMEDONE handler\n"); in dsi_display_init_dispc()
4054 DSSERR("Failed to set dsi clocks\n"); in dsi_configure_dsi_clocks()
4709 DSSERR("failed to find suitable DSI clock settings\n"); in dsi_set_config()
4719 DSSERR("failed to find suitable DSI LP clock settings\n"); in dsi_set_config()
4815 DSSERR("cannot get VC for display %s", dssdev->name); in dsi_request_vc()
4824 DSSERR("VC ID out of range\n"); in dsi_set_vc_id()
4829 DSSERR("Virtual Channel out of range\n"); in dsi_set_vc_id()
4834 DSSERR("Virtual Channel not allocated to display %s\n", in dsi_set_vc_id()
4862 DSSERR("can't get fck\n"); in dsi_get_clocks()
5023 DSSERR("can't get sys_clk\n"); in dsi_init_pll_data()
5316 DSSERR("platform_get_irq failed\n"); in dsi_probe()
5323 DSSERR("request_irq failed\n"); in dsi_probe()
5330 DSSERR("can't get DSI VDD regulator\n"); in dsi_probe()
5345 DSSERR("unsupported DSI module\n"); in dsi_probe()
5395 DSSERR("Failed to populate DSI child devices: %d\n", r); in dsi_probe()
5405 DSSERR("Invalid DSI DT data\n"); in dsi_probe()