106 	u32 pixel_rate; /* in kHz */  member
237 				(unsigned long)ctrl->pixel_rate * 1000);  in edp_clk_enable()
239 				(unsigned long)ctrl->pixel_rate * 1000);  in edp_clk_enable()
409 	prate = ctrl->pixel_rate;  in edp_fill_link_cfg()
707 	prate = ctrl->pixel_rate;  in edp_link_rate_down_shift()
727 			ctrl->pixel_rate,  in edp_link_rate_down_shift()
911 		msm_edp_ctrl_pixel_clock_valid(ctrl, ctrl->pixel_rate, &m, &n);  in edp_ctrl_link_enable()
1270 	ctrl->pixel_rate = mode->clock;  in msm_edp_ctrl_timing_cfg()
1316 	u32 pixel_rate, u32 *pm, u32 *pn)  in msm_edp_ctrl_pixel_clock_valid()  argument
1333 		clk_err = abs(divs[i].rate - pixel_rate);  in msm_edp_ctrl_pixel_clock_valid()
1343 	DBG("pixel clock %d(kHz) not supported", pixel_rate);  in msm_edp_ctrl_pixel_clock_valid()