Lines Matching refs:pdpu
139 struct dpu_plane *pdpu, *tmp; in _dpu_plane_calc_fill_level() local
149 pdpu = to_dpu_plane(plane); in _dpu_plane_calc_fill_level()
151 fixed_buff_size = pdpu->pipe_sblk->common->pixel_ram_size; in _dpu_plane_calc_fill_level()
153 list_for_each_entry(tmp, &pdpu->mplane_list, mplane_list) { in _dpu_plane_calc_fill_level()
157 pdpu->base.base.id, tmp->base.base.id, in _dpu_plane_calc_fill_level()
185 plane->base.id, pdpu->pipe - SSPP_VIG0, in _dpu_plane_calc_fill_level()
225 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_set_qos_lut() local
230 if (!pdpu->is_rt_pipe) { in _dpu_plane_set_qos_lut()
237 drm_rect_width(&pdpu->pipe_cfg.src_rect)); in _dpu_plane_set_qos_lut()
246 &pdpu->catalog->perf.qos_lut_tbl[lut_usage], total_fl); in _dpu_plane_set_qos_lut()
248 pdpu->pipe_qos_cfg.creq_lut = qos_lut; in _dpu_plane_set_qos_lut()
250 trace_dpu_perf_set_qos_luts(pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_lut()
252 pdpu->is_rt_pipe, total_fl, qos_lut, lut_usage); in _dpu_plane_set_qos_lut()
256 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_lut()
258 pdpu->is_rt_pipe, total_fl, qos_lut); in _dpu_plane_set_qos_lut()
260 pdpu->pipe_hw->ops.setup_creq_lut(pdpu->pipe_hw, &pdpu->pipe_qos_cfg); in _dpu_plane_set_qos_lut()
271 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_set_danger_lut() local
275 if (!pdpu->is_rt_pipe) { in _dpu_plane_set_danger_lut()
276 danger_lut = pdpu->catalog->perf.danger_lut_tbl in _dpu_plane_set_danger_lut()
278 safe_lut = pdpu->catalog->perf.safe_lut_tbl in _dpu_plane_set_danger_lut()
286 danger_lut = pdpu->catalog->perf.danger_lut_tbl in _dpu_plane_set_danger_lut()
288 safe_lut = pdpu->catalog->perf.safe_lut_tbl in _dpu_plane_set_danger_lut()
291 danger_lut = pdpu->catalog->perf.danger_lut_tbl in _dpu_plane_set_danger_lut()
293 safe_lut = pdpu->catalog->perf.safe_lut_tbl in _dpu_plane_set_danger_lut()
298 pdpu->pipe_qos_cfg.danger_lut = danger_lut; in _dpu_plane_set_danger_lut()
299 pdpu->pipe_qos_cfg.safe_lut = safe_lut; in _dpu_plane_set_danger_lut()
301 trace_dpu_perf_set_danger_luts(pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_danger_lut()
304 pdpu->pipe_qos_cfg.danger_lut, in _dpu_plane_set_danger_lut()
305 pdpu->pipe_qos_cfg.safe_lut); in _dpu_plane_set_danger_lut()
309 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_danger_lut()
312 pdpu->pipe_qos_cfg.danger_lut, in _dpu_plane_set_danger_lut()
313 pdpu->pipe_qos_cfg.safe_lut); in _dpu_plane_set_danger_lut()
315 pdpu->pipe_hw->ops.setup_danger_safe_lut(pdpu->pipe_hw, in _dpu_plane_set_danger_lut()
316 &pdpu->pipe_qos_cfg); in _dpu_plane_set_danger_lut()
328 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_set_qos_ctrl() local
331 pdpu->pipe_qos_cfg.creq_vblank = pdpu->pipe_sblk->creq_vblank; in _dpu_plane_set_qos_ctrl()
332 pdpu->pipe_qos_cfg.danger_vblank = in _dpu_plane_set_qos_ctrl()
333 pdpu->pipe_sblk->danger_vblank; in _dpu_plane_set_qos_ctrl()
334 pdpu->pipe_qos_cfg.vblank_en = enable; in _dpu_plane_set_qos_ctrl()
339 pdpu->pipe_qos_cfg.vblank_en = false; in _dpu_plane_set_qos_ctrl()
340 pdpu->pipe_qos_cfg.creq_vblank = 0; /* clear vblank bits */ in _dpu_plane_set_qos_ctrl()
344 pdpu->pipe_qos_cfg.danger_safe_en = enable; in _dpu_plane_set_qos_ctrl()
346 if (!pdpu->is_rt_pipe) { in _dpu_plane_set_qos_ctrl()
347 pdpu->pipe_qos_cfg.vblank_en = false; in _dpu_plane_set_qos_ctrl()
348 pdpu->pipe_qos_cfg.danger_safe_en = false; in _dpu_plane_set_qos_ctrl()
353 pdpu->pipe - SSPP_VIG0, in _dpu_plane_set_qos_ctrl()
354 pdpu->pipe_qos_cfg.danger_safe_en, in _dpu_plane_set_qos_ctrl()
355 pdpu->pipe_qos_cfg.vblank_en, in _dpu_plane_set_qos_ctrl()
356 pdpu->pipe_qos_cfg.creq_vblank, in _dpu_plane_set_qos_ctrl()
357 pdpu->pipe_qos_cfg.danger_vblank, in _dpu_plane_set_qos_ctrl()
358 pdpu->is_rt_pipe); in _dpu_plane_set_qos_ctrl()
360 pdpu->pipe_hw->ops.setup_qos_ctrl(pdpu->pipe_hw, in _dpu_plane_set_qos_ctrl()
361 &pdpu->pipe_qos_cfg); in _dpu_plane_set_qos_ctrl()
372 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_set_ot_limit() local
377 ot_params.xin_id = pdpu->pipe_hw->cap->xin_id; in _dpu_plane_set_ot_limit()
378 ot_params.num = pdpu->pipe_hw->idx - SSPP_NONE; in _dpu_plane_set_ot_limit()
379 ot_params.width = drm_rect_width(&pdpu->pipe_cfg.src_rect); in _dpu_plane_set_ot_limit()
380 ot_params.height = drm_rect_height(&pdpu->pipe_cfg.src_rect); in _dpu_plane_set_ot_limit()
381 ot_params.is_wfd = !pdpu->is_rt_pipe; in _dpu_plane_set_ot_limit()
384 ot_params.clk_ctrl = pdpu->pipe_hw->cap->clk_ctrl; in _dpu_plane_set_ot_limit()
396 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_set_qos_remap() local
402 qos_params.clk_ctrl = pdpu->pipe_hw->cap->clk_ctrl; in _dpu_plane_set_qos_remap()
403 qos_params.xin_id = pdpu->pipe_hw->cap->xin_id; in _dpu_plane_set_qos_remap()
404 qos_params.num = pdpu->pipe_hw->idx - SSPP_VIG0; in _dpu_plane_set_qos_remap()
405 qos_params.is_rt = pdpu->is_rt_pipe; in _dpu_plane_set_qos_remap()
421 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_set_scanout() local
422 struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base); in _dpu_plane_set_scanout()
428 DPU_DEBUG_PLANE(pdpu, "not updating same src addrs\n"); in _dpu_plane_set_scanout()
430 DPU_ERROR_PLANE(pdpu, "failed to get format layout, %d\n", ret); in _dpu_plane_set_scanout()
431 else if (pdpu->pipe_hw->ops.setup_sourceaddress) { in _dpu_plane_set_scanout()
432 trace_dpu_plane_set_scanout(pdpu->pipe_hw->idx, in _dpu_plane_set_scanout()
435 pdpu->pipe_hw->ops.setup_sourceaddress(pdpu->pipe_hw, pipe_cfg, in _dpu_plane_set_scanout()
440 static void _dpu_plane_setup_scaler3(struct dpu_plane *pdpu, in _dpu_plane_setup_scaler3() argument
501 static void _dpu_plane_setup_csc(struct dpu_plane *pdpu) in _dpu_plane_setup_csc() argument
532 if (!pdpu) { in _dpu_plane_setup_csc()
537 if (BIT(DPU_SSPP_CSC_10BIT) & pdpu->features) in _dpu_plane_setup_csc()
538 pdpu->csc_ptr = (struct dpu_csc_cfg *)&dpu_csc10_YUV2RGB_601L; in _dpu_plane_setup_csc()
540 pdpu->csc_ptr = (struct dpu_csc_cfg *)&dpu_csc_YUV2RGB_601L; in _dpu_plane_setup_csc()
542 DPU_DEBUG_PLANE(pdpu, "using 0x%X 0x%X 0x%X...\n", in _dpu_plane_setup_csc()
543 pdpu->csc_ptr->csc_mv[0], in _dpu_plane_setup_csc()
544 pdpu->csc_ptr->csc_mv[1], in _dpu_plane_setup_csc()
545 pdpu->csc_ptr->csc_mv[2]); in _dpu_plane_setup_csc()
548 static void _dpu_plane_setup_scaler(struct dpu_plane *pdpu, in _dpu_plane_setup_scaler() argument
556 _dpu_plane_setup_scaler3(pdpu, pstate, in _dpu_plane_setup_scaler()
557 drm_rect_width(&pdpu->pipe_cfg.src_rect), in _dpu_plane_setup_scaler()
558 drm_rect_height(&pdpu->pipe_cfg.src_rect), in _dpu_plane_setup_scaler()
559 drm_rect_width(&pdpu->pipe_cfg.dst_rect), in _dpu_plane_setup_scaler()
560 drm_rect_height(&pdpu->pipe_cfg.dst_rect), in _dpu_plane_setup_scaler()
572 static int _dpu_plane_color_fill(struct dpu_plane *pdpu, in _dpu_plane_color_fill() argument
576 const struct drm_plane *plane = &pdpu->base; in _dpu_plane_color_fill()
579 DPU_DEBUG_PLANE(pdpu, "\n"); in _dpu_plane_color_fill()
588 if (fmt && pdpu->pipe_hw->ops.setup_solidfill) { in _dpu_plane_color_fill()
589 pdpu->pipe_hw->ops.setup_solidfill(pdpu->pipe_hw, in _dpu_plane_color_fill()
594 pdpu->pipe_cfg.src_rect.x1 = 0; in _dpu_plane_color_fill()
595 pdpu->pipe_cfg.src_rect.y1 = 0; in _dpu_plane_color_fill()
596 pdpu->pipe_cfg.src_rect.x2 = in _dpu_plane_color_fill()
597 drm_rect_width(&pdpu->pipe_cfg.dst_rect); in _dpu_plane_color_fill()
598 pdpu->pipe_cfg.src_rect.y2 = in _dpu_plane_color_fill()
599 drm_rect_height(&pdpu->pipe_cfg.dst_rect); in _dpu_plane_color_fill()
600 _dpu_plane_setup_scaler(pdpu, pstate, fmt, true); in _dpu_plane_color_fill()
602 if (pdpu->pipe_hw->ops.setup_format) in _dpu_plane_color_fill()
603 pdpu->pipe_hw->ops.setup_format(pdpu->pipe_hw, in _dpu_plane_color_fill()
607 if (pdpu->pipe_hw->ops.setup_rects) in _dpu_plane_color_fill()
608 pdpu->pipe_hw->ops.setup_rects(pdpu->pipe_hw, in _dpu_plane_color_fill()
609 &pdpu->pipe_cfg, in _dpu_plane_color_fill()
612 if (pdpu->pipe_hw->ops.setup_pe) in _dpu_plane_color_fill()
613 pdpu->pipe_hw->ops.setup_pe(pdpu->pipe_hw, in _dpu_plane_color_fill()
616 if (pdpu->pipe_hw->ops.setup_scaler && in _dpu_plane_color_fill()
618 pdpu->pipe_hw->ops.setup_scaler(pdpu->pipe_hw, in _dpu_plane_color_fill()
619 &pdpu->pipe_cfg, &pstate->pixel_ext, in _dpu_plane_color_fill()
766 struct dpu_plane *pdpu = to_dpu_plane(plane); in dpu_plane_prepare_fb() local
769 struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base); in dpu_plane_prepare_fb()
775 DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", fb->base.id); in dpu_plane_prepare_fb()
800 DPU_ERROR_PLANE(pdpu, "failed to get format layout, %d\n", ret); in dpu_plane_prepare_fb()
810 struct dpu_plane *pdpu = to_dpu_plane(plane); in dpu_plane_cleanup_fb() local
818 DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", old_state->fb->base.id); in dpu_plane_cleanup_fb()
846 struct dpu_plane *pdpu = to_dpu_plane(plane); in dpu_plane_atomic_check() local
856 min_scale = FRAC_16_16(1, pdpu->pipe_sblk->maxdwnscale); in dpu_plane_atomic_check()
858 pdpu->pipe_sblk->maxupscale << 16, in dpu_plane_atomic_check()
861 DPU_ERROR_PLANE(pdpu, "Check plane state failed (%d)\n", ret); in dpu_plane_atomic_check()
877 max_linewidth = pdpu->pipe_sblk->common->maxlinewidth; in dpu_plane_atomic_check()
884 (!(pdpu->features & DPU_SSPP_SCALER) || in dpu_plane_atomic_check()
885 !(pdpu->features & (BIT(DPU_SSPP_CSC) in dpu_plane_atomic_check()
887 DPU_ERROR_PLANE(pdpu, in dpu_plane_atomic_check()
893 DPU_ERROR_PLANE(pdpu, "invalid source " DRM_RECT_FMT "\n", in dpu_plane_atomic_check()
902 DPU_ERROR_PLANE(pdpu, "invalid yuv source " DRM_RECT_FMT "\n", in dpu_plane_atomic_check()
908 DPU_ERROR_PLANE(pdpu, "invalid dest rect " DRM_RECT_FMT "\n", in dpu_plane_atomic_check()
914 DPU_ERROR_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n", in dpu_plane_atomic_check()
924 struct dpu_plane *pdpu; in dpu_plane_flush() local
932 pdpu = to_dpu_plane(plane); in dpu_plane_flush()
939 if (pdpu->is_error) in dpu_plane_flush()
941 _dpu_plane_color_fill(pdpu, 0xFFFFFF, 0xFF); in dpu_plane_flush()
942 else if (pdpu->color_fill & DPU_PLANE_COLOR_FILL_FLAG) in dpu_plane_flush()
944 _dpu_plane_color_fill(pdpu, pdpu->color_fill, 0xFF); in dpu_plane_flush()
945 else if (pdpu->pipe_hw && pdpu->csc_ptr && pdpu->pipe_hw->ops.setup_csc) in dpu_plane_flush()
946 pdpu->pipe_hw->ops.setup_csc(pdpu->pipe_hw, pdpu->csc_ptr); in dpu_plane_flush()
959 struct dpu_plane *pdpu; in dpu_plane_set_error() local
964 pdpu = to_dpu_plane(plane); in dpu_plane_set_error()
965 pdpu->is_error = error; in dpu_plane_set_error()
971 struct dpu_plane *pdpu = to_dpu_plane(plane); in dpu_plane_sspp_atomic_update() local
979 memset(&(pdpu->pipe_cfg), 0, sizeof(struct dpu_hw_pipe_cfg)); in dpu_plane_sspp_atomic_update()
981 _dpu_plane_set_scanout(plane, pstate, &pdpu->pipe_cfg, fb); in dpu_plane_sspp_atomic_update()
985 pdpu->is_rt_pipe = (dpu_crtc_get_client_type(crtc) != NRT_CLIENT); in dpu_plane_sspp_atomic_update()
988 DPU_DEBUG_PLANE(pdpu, "FB[%u] " DRM_RECT_FP_FMT "->crtc%u " DRM_RECT_FMT in dpu_plane_sspp_atomic_update()
993 pdpu->pipe_cfg.src_rect = state->src; in dpu_plane_sspp_atomic_update()
996 pdpu->pipe_cfg.src_rect.x1 >>= 16; in dpu_plane_sspp_atomic_update()
997 pdpu->pipe_cfg.src_rect.x2 >>= 16; in dpu_plane_sspp_atomic_update()
998 pdpu->pipe_cfg.src_rect.y1 >>= 16; in dpu_plane_sspp_atomic_update()
999 pdpu->pipe_cfg.src_rect.y2 >>= 16; in dpu_plane_sspp_atomic_update()
1001 pdpu->pipe_cfg.dst_rect = state->dst; in dpu_plane_sspp_atomic_update()
1003 _dpu_plane_setup_scaler(pdpu, pstate, fmt, false); in dpu_plane_sspp_atomic_update()
1006 if (pdpu->color_fill & DPU_PLANE_COLOR_FILL_FLAG) { in dpu_plane_sspp_atomic_update()
1011 if (pdpu->pipe_hw->ops.setup_rects) { in dpu_plane_sspp_atomic_update()
1012 pdpu->pipe_hw->ops.setup_rects(pdpu->pipe_hw, in dpu_plane_sspp_atomic_update()
1013 &pdpu->pipe_cfg, in dpu_plane_sspp_atomic_update()
1017 if (pdpu->pipe_hw->ops.setup_pe && in dpu_plane_sspp_atomic_update()
1019 pdpu->pipe_hw->ops.setup_pe(pdpu->pipe_hw, in dpu_plane_sspp_atomic_update()
1027 if (pdpu->pipe_hw->ops.setup_scaler && in dpu_plane_sspp_atomic_update()
1029 pdpu->pipe_hw->ops.setup_scaler(pdpu->pipe_hw, in dpu_plane_sspp_atomic_update()
1030 &pdpu->pipe_cfg, &pstate->pixel_ext, in dpu_plane_sspp_atomic_update()
1033 if (pdpu->pipe_hw->ops.setup_multirect) in dpu_plane_sspp_atomic_update()
1034 pdpu->pipe_hw->ops.setup_multirect( in dpu_plane_sspp_atomic_update()
1035 pdpu->pipe_hw, in dpu_plane_sspp_atomic_update()
1039 if (pdpu->pipe_hw->ops.setup_format) { in dpu_plane_sspp_atomic_update()
1056 pdpu->pipe_hw->ops.setup_format(pdpu->pipe_hw, fmt, src_flags, in dpu_plane_sspp_atomic_update()
1059 if (pdpu->pipe_hw->ops.setup_cdp) { in dpu_plane_sspp_atomic_update()
1064 cdp_cfg->enable = pdpu->catalog->perf.cdp_cfg in dpu_plane_sspp_atomic_update()
1073 pdpu->pipe_hw->ops.setup_cdp(pdpu->pipe_hw, cdp_cfg); in dpu_plane_sspp_atomic_update()
1078 _dpu_plane_setup_csc(pdpu); in dpu_plane_sspp_atomic_update()
1080 pdpu->csc_ptr = 0; in dpu_plane_sspp_atomic_update()
1096 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_atomic_disable() local
1106 pdpu->pipe_hw && pdpu->pipe_hw->ops.setup_multirect) in _dpu_plane_atomic_disable()
1107 pdpu->pipe_hw->ops.setup_multirect(pdpu->pipe_hw, in _dpu_plane_atomic_disable()
1114 struct dpu_plane *pdpu = to_dpu_plane(plane); in dpu_plane_atomic_update() local
1117 pdpu->is_error = false; in dpu_plane_atomic_update()
1119 DPU_DEBUG_PLANE(pdpu, "\n"); in dpu_plane_atomic_update()
1130 struct dpu_plane *pdpu; in dpu_plane_restore() local
1137 pdpu = to_dpu_plane(plane); in dpu_plane_restore()
1139 DPU_DEBUG_PLANE(pdpu, "\n"); in dpu_plane_restore()
1147 struct dpu_plane *pdpu = plane ? to_dpu_plane(plane) : NULL; in dpu_plane_destroy() local
1149 DPU_DEBUG_PLANE(pdpu, "\n"); in dpu_plane_destroy()
1151 if (pdpu) { in dpu_plane_destroy()
1154 mutex_destroy(&pdpu->lock); in dpu_plane_destroy()
1159 dpu_hw_sspp_destroy(pdpu->pipe_hw); in dpu_plane_destroy()
1161 kfree(pdpu); in dpu_plane_destroy()
1175 struct dpu_plane *pdpu; in dpu_plane_duplicate_state() local
1188 pdpu = to_dpu_plane(plane); in dpu_plane_duplicate_state()
1191 DPU_ERROR_PLANE(pdpu, "failed to allocate state\n"); in dpu_plane_duplicate_state()
1195 DPU_DEBUG_PLANE(pdpu, "\n"); in dpu_plane_duplicate_state()
1206 struct dpu_plane *pdpu; in dpu_plane_reset() local
1214 pdpu = to_dpu_plane(plane); in dpu_plane_reset()
1215 DPU_DEBUG_PLANE(pdpu, "\n"); in dpu_plane_reset()
1225 DPU_ERROR_PLANE(pdpu, "failed to allocate state\n"); in dpu_plane_reset()
1237 struct dpu_plane *pdpu = to_dpu_plane(plane); in dpu_plane_danger_signal_ctrl() local
1240 if (!pdpu->is_rt_pipe) in dpu_plane_danger_signal_ctrl()
1317 struct dpu_plane *pdpu = to_dpu_plane(plane); in _dpu_plane_init_debugfs() local
1319 const struct dpu_sspp_cfg *cfg = pdpu->pipe_hw->cap; in _dpu_plane_init_debugfs()
1323 pdpu->debugfs_root = in _dpu_plane_init_debugfs()
1324 debugfs_create_dir(pdpu->pipe_name, in _dpu_plane_init_debugfs()
1329 pdpu->debugfs_root, &pdpu->features); in _dpu_plane_init_debugfs()
1332 dpu_debugfs_setup_regset32(&pdpu->debugfs_src, in _dpu_plane_init_debugfs()
1337 pdpu->debugfs_root, &pdpu->debugfs_src); in _dpu_plane_init_debugfs()
1341 dpu_debugfs_setup_regset32(&pdpu->debugfs_scaler, in _dpu_plane_init_debugfs()
1346 pdpu->debugfs_root, in _dpu_plane_init_debugfs()
1347 &pdpu->debugfs_scaler); in _dpu_plane_init_debugfs()
1350 pdpu->debugfs_root, in _dpu_plane_init_debugfs()
1351 &pdpu->debugfs_default_scale); in _dpu_plane_init_debugfs()
1356 dpu_debugfs_setup_regset32(&pdpu->debugfs_csc, in _dpu_plane_init_debugfs()
1361 pdpu->debugfs_root, &pdpu->debugfs_csc); in _dpu_plane_init_debugfs()
1366 pdpu->debugfs_root, in _dpu_plane_init_debugfs()
1370 pdpu->debugfs_root, in _dpu_plane_init_debugfs()
1374 pdpu->debugfs_root, in _dpu_plane_init_debugfs()
1378 pdpu->debugfs_root, in _dpu_plane_init_debugfs()
1383 pdpu->debugfs_root, in _dpu_plane_init_debugfs()
1402 struct dpu_plane *pdpu = to_dpu_plane(plane); in dpu_plane_early_unregister() local
1404 debugfs_remove_recursive(pdpu->debugfs_root); in dpu_plane_early_unregister()
1460 struct dpu_plane *pdpu; in dpu_plane_init() local
1468 pdpu = kzalloc(sizeof(*pdpu), GFP_KERNEL); in dpu_plane_init()
1469 if (!pdpu) { in dpu_plane_init()
1476 plane = &pdpu->base; in dpu_plane_init()
1477 pdpu->pipe = pipe; in dpu_plane_init()
1478 pdpu->is_virtual = (master_plane_id != 0); in dpu_plane_init()
1479 INIT_LIST_HEAD(&pdpu->mplane_list); in dpu_plane_init()
1484 list_add_tail(&pdpu->mplane_list, &mpdpu->mplane_list); in dpu_plane_init()
1488 pdpu->pipe_hw = dpu_hw_sspp_init(pipe, kms->mmio, kms->catalog, in dpu_plane_init()
1490 if (IS_ERR(pdpu->pipe_hw)) { in dpu_plane_init()
1492 ret = PTR_ERR(pdpu->pipe_hw); in dpu_plane_init()
1494 } else if (!pdpu->pipe_hw->cap || !pdpu->pipe_hw->cap->sblk) { in dpu_plane_init()
1500 pdpu->features = pdpu->pipe_hw->cap->features; in dpu_plane_init()
1501 pdpu->pipe_sblk = pdpu->pipe_hw->cap->sblk; in dpu_plane_init()
1502 if (!pdpu->pipe_sblk) { in dpu_plane_init()
1507 if (pdpu->is_virtual) { in dpu_plane_init()
1508 format_list = pdpu->pipe_sblk->virt_format_list; in dpu_plane_init()
1509 num_formats = pdpu->pipe_sblk->virt_num_formats; in dpu_plane_init()
1512 format_list = pdpu->pipe_sblk->format_list; in dpu_plane_init()
1513 num_formats = pdpu->pipe_sblk->num_formats; in dpu_plane_init()
1522 pdpu->catalog = kms->catalog; in dpu_plane_init()
1548 snprintf(pdpu->pipe_name, DPU_NAME_SIZE, "plane%u", plane->base.id); in dpu_plane_init()
1550 mutex_init(&pdpu->lock); in dpu_plane_init()
1552 DPU_DEBUG("%s created for pipe:%u id:%u virtual:%u\n", pdpu->pipe_name, in dpu_plane_init()
1557 if (pdpu && pdpu->pipe_hw) in dpu_plane_init()
1558 dpu_hw_sspp_destroy(pdpu->pipe_hw); in dpu_plane_init()
1560 kfree(pdpu); in dpu_plane_init()