Lines Matching refs:a5xx_gpu
12 static inline bool try_preempt_state(struct a5xx_gpu *a5xx_gpu, in try_preempt_state() argument
15 enum preempt_state cur = atomic_cmpxchg(&a5xx_gpu->preempt_state, in try_preempt_state()
25 static inline void set_preempt_state(struct a5xx_gpu *gpu, in set_preempt_state()
78 struct a5xx_gpu *a5xx_gpu = from_timer(a5xx_gpu, t, preempt_timer); in a5xx_preempt_timer() local
79 struct msm_gpu *gpu = &a5xx_gpu->base.base; in a5xx_preempt_timer()
83 if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_FAULTED)) in a5xx_preempt_timer()
94 struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); in a5xx_preempt_trigger() local
105 if (!try_preempt_state(a5xx_gpu, PREEMPT_NONE, PREEMPT_START)) in a5xx_preempt_trigger()
115 if (!ring || (a5xx_gpu->cur_ring == ring)) { in a5xx_preempt_trigger()
128 set_preempt_state(a5xx_gpu, PREEMPT_ABORT); in a5xx_preempt_trigger()
129 update_wptr(gpu, a5xx_gpu->cur_ring); in a5xx_preempt_trigger()
130 set_preempt_state(a5xx_gpu, PREEMPT_NONE); in a5xx_preempt_trigger()
136 a5xx_gpu->preempt[ring->id]->wptr = get_wptr(ring); in a5xx_preempt_trigger()
142 a5xx_gpu->preempt_iova[ring->id]); in a5xx_preempt_trigger()
144 a5xx_gpu->next_ring = ring; in a5xx_preempt_trigger()
147 mod_timer(&a5xx_gpu->preempt_timer, jiffies + msecs_to_jiffies(10000)); in a5xx_preempt_trigger()
150 set_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED); in a5xx_preempt_trigger()
163 struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); in a5xx_preempt_irq() local
167 if (!try_preempt_state(a5xx_gpu, PREEMPT_TRIGGERED, PREEMPT_PENDING)) in a5xx_preempt_irq()
171 del_timer(&a5xx_gpu->preempt_timer); in a5xx_preempt_irq()
181 set_preempt_state(a5xx_gpu, PREEMPT_FAULTED); in a5xx_preempt_irq()
188 a5xx_gpu->cur_ring = a5xx_gpu->next_ring; in a5xx_preempt_irq()
189 a5xx_gpu->next_ring = NULL; in a5xx_preempt_irq()
191 update_wptr(gpu, a5xx_gpu->cur_ring); in a5xx_preempt_irq()
193 set_preempt_state(a5xx_gpu, PREEMPT_NONE); in a5xx_preempt_irq()
199 struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); in a5xx_preempt_hw_init() local
203 a5xx_gpu->cur_ring = gpu->rb[0]; in a5xx_preempt_hw_init()
210 a5xx_gpu->preempt[i]->wptr = 0; in a5xx_preempt_hw_init()
211 a5xx_gpu->preempt[i]->rptr = 0; in a5xx_preempt_hw_init()
212 a5xx_gpu->preempt[i]->rbase = gpu->rb[i]->iova; in a5xx_preempt_hw_init()
220 set_preempt_state(a5xx_gpu, PREEMPT_NONE); in a5xx_preempt_hw_init()
223 static int preempt_init_ring(struct a5xx_gpu *a5xx_gpu, in preempt_init_ring() argument
226 struct adreno_gpu *adreno_gpu = &a5xx_gpu->base; in preempt_init_ring()
241 a5xx_gpu->preempt_bo[ring->id] = bo; in preempt_init_ring()
242 a5xx_gpu->preempt_iova[ring->id] = iova; in preempt_init_ring()
243 a5xx_gpu->preempt[ring->id] = ptr; in preempt_init_ring()
260 struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); in a5xx_preempt_fini() local
264 msm_gem_kernel_put(a5xx_gpu->preempt_bo[i], gpu->aspace, true); in a5xx_preempt_fini()
270 struct a5xx_gpu *a5xx_gpu = to_a5xx_gpu(adreno_gpu); in a5xx_preempt_init() local
278 if (preempt_init_ring(a5xx_gpu, gpu->rb[i])) { in a5xx_preempt_init()
290 timer_setup(&a5xx_gpu->preempt_timer, a5xx_preempt_timer, 0); in a5xx_preempt_init()