85 				OUT_RING(ring, ptr[i]);  in a5xx_submit_in_rb()
122 	OUT_RING(ring, 0x02);  in a5xx_submit()
126 	OUT_RING(ring, 0);  in a5xx_submit()
130 	OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));  in a5xx_submit()
131 	OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[submit->ring->id]));  in a5xx_submit()
135 	OUT_RING(ring, 1);  in a5xx_submit()
139 	OUT_RING(ring, 0x02);  in a5xx_submit()
143 	OUT_RING(ring, 0x02);  in a5xx_submit()
156 			OUT_RING(ring, lower_32_bits(submit->cmd[i].iova));  in a5xx_submit()
157 			OUT_RING(ring, upper_32_bits(submit->cmd[i].iova));  in a5xx_submit()
158 			OUT_RING(ring, submit->cmd[i].size);  in a5xx_submit()
170 	OUT_RING(ring, 0);  in a5xx_submit()
171 	OUT_RING(ring, 0);  in a5xx_submit()
172 	OUT_RING(ring, 0);  in a5xx_submit()
173 	OUT_RING(ring, 0);  in a5xx_submit()
174 	OUT_RING(ring, 0);  in a5xx_submit()
178 	OUT_RING(ring, 0x01);  in a5xx_submit()
182 	OUT_RING(ring, submit->seqno);  in a5xx_submit()
189 	OUT_RING(ring, CACHE_FLUSH_TS | (1 << 31));  in a5xx_submit()
190 	OUT_RING(ring, lower_32_bits(rbmemptr(ring, fence)));  in a5xx_submit()
191 	OUT_RING(ring, upper_32_bits(rbmemptr(ring, fence)));  in a5xx_submit()
192 	OUT_RING(ring, submit->seqno);  in a5xx_submit()
201 	OUT_RING(ring, 0x00);  in a5xx_submit()
202 	OUT_RING(ring, 0x00);  in a5xx_submit()
204 	OUT_RING(ring, 0x01);  in a5xx_submit()
206 	OUT_RING(ring, 0x01);  in a5xx_submit()
337 	OUT_RING(ring, 0x0000002F);  in a5xx_me_init()
340 	OUT_RING(ring, 0x00000003);  in a5xx_me_init()
343 	OUT_RING(ring, 0x20000000);  in a5xx_me_init()
346 	OUT_RING(ring, 0x00000000);  in a5xx_me_init()
347 	OUT_RING(ring, 0x00000000);  in a5xx_me_init()
355 		OUT_RING(ring, 0x0000000B);  in a5xx_me_init()
358 		OUT_RING(ring, 0x00000000);  in a5xx_me_init()
361 	OUT_RING(ring, 0x00000000);  in a5xx_me_init()
362 	OUT_RING(ring, 0x00000000);  in a5xx_me_init()
379 	OUT_RING(ring, 0);  in a5xx_preempt_start()
383 	OUT_RING(ring, lower_32_bits(a5xx_gpu->preempt_iova[ring->id]));  in a5xx_preempt_start()
384 	OUT_RING(ring, upper_32_bits(a5xx_gpu->preempt_iova[ring->id]));  in a5xx_preempt_start()
388 	OUT_RING(ring, 1);  in a5xx_preempt_start()
391 	OUT_RING(ring, 0x00);  in a5xx_preempt_start()
394 	OUT_RING(ring, 0x01);  in a5xx_preempt_start()
397 	OUT_RING(ring, 0x01);  in a5xx_preempt_start()
401 	OUT_RING(ring, 0x00);  in a5xx_preempt_start()
402 	OUT_RING(ring, 0x00);  in a5xx_preempt_start()
403 	OUT_RING(ring, 0x01);  in a5xx_preempt_start()
404 	OUT_RING(ring, 0x01);  in a5xx_preempt_start()
707 		OUT_RING(gpu->rb[0], 0x0F);  in a5xx_hw_init()
724 		OUT_RING(gpu->rb[0], 0x00000000);  in a5xx_hw_init()