1045 static inline uint32_t A5XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val)  in A5XX_CP_PROTECT_REG_BASE_ADDR()  argument
1047 	return ((val) << A5XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A5XX_CP_PROTECT_REG_BASE_ADDR__MASK;  in A5XX_CP_PROTECT_REG_BASE_ADDR()
1051 static inline uint32_t A5XX_CP_PROTECT_REG_MASK_LEN(uint32_t val)  in A5XX_CP_PROTECT_REG_MASK_LEN()  argument
1053 	return ((val) << A5XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A5XX_CP_PROTECT_REG_MASK_LEN__MASK;  in A5XX_CP_PROTECT_REG_MASK_LEN()
1958 static inline uint32_t A5XX_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A5XX_VSC_BIN_SIZE_WIDTH()  argument
1960 	return ((val >> 5) << A5XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A5XX_VSC_BIN_SIZE_WIDTH__MASK;  in A5XX_VSC_BIN_SIZE_WIDTH()
1964 static inline uint32_t A5XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A5XX_VSC_BIN_SIZE_HEIGHT()  argument
1966 	return ((val >> 5) << A5XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A5XX_VSC_BIN_SIZE_HEIGHT__MASK;  in A5XX_VSC_BIN_SIZE_HEIGHT()
1982 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_X()  argument
1984 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_X__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_X__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_X()
1988 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_Y()  argument
1990 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_Y__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_Y__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_Y()
1994 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_W()  argument
1996 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_W__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_W__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_W()
2000 static inline uint32_t A5XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)  in A5XX_VSC_PIPE_CONFIG_REG_H()  argument
2002 	return ((val) << A5XX_VSC_PIPE_CONFIG_REG_H__SHIFT) & A5XX_VSC_PIPE_CONFIG_REG_H__MASK;  in A5XX_VSC_PIPE_CONFIG_REG_H()
2023 static inline uint32_t A5XX_VSC_RESOLVE_CNTL_X(uint32_t val)  in A5XX_VSC_RESOLVE_CNTL_X()  argument
2025 	return ((val) << A5XX_VSC_RESOLVE_CNTL_X__SHIFT) & A5XX_VSC_RESOLVE_CNTL_X__MASK;  in A5XX_VSC_RESOLVE_CNTL_X()
2029 static inline uint32_t A5XX_VSC_RESOLVE_CNTL_Y(uint32_t val)  in A5XX_VSC_RESOLVE_CNTL_Y()  argument
2031 	return ((val) << A5XX_VSC_RESOLVE_CNTL_Y__SHIFT) & A5XX_VSC_RESOLVE_CNTL_Y__MASK;  in A5XX_VSC_RESOLVE_CNTL_Y()
2672 static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ(uint32_t val)  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ()  argument
2674 …return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HO…  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_HORZ()
2678 static inline uint32_t A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT(uint32_t val)  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT()  argument
2680 …return ((val) << A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT__SHIFT) & A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VE…  in A5XX_GRAS_CL_GUARDBAND_CLIP_ADJ_VERT()
2686 static inline uint32_t A5XX_GRAS_CL_VPORT_XOFFSET_0(float val)  in A5XX_GRAS_CL_VPORT_XOFFSET_0()  argument
2688 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_XOFFSET_0__MASK;  in A5XX_GRAS_CL_VPORT_XOFFSET_0()
2694 static inline uint32_t A5XX_GRAS_CL_VPORT_XSCALE_0(float val)  in A5XX_GRAS_CL_VPORT_XSCALE_0()  argument
2696 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_XSCALE_0__MASK;  in A5XX_GRAS_CL_VPORT_XSCALE_0()
2702 static inline uint32_t A5XX_GRAS_CL_VPORT_YOFFSET_0(float val)  in A5XX_GRAS_CL_VPORT_YOFFSET_0()  argument
2704 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_YOFFSET_0__MASK;  in A5XX_GRAS_CL_VPORT_YOFFSET_0()
2710 static inline uint32_t A5XX_GRAS_CL_VPORT_YSCALE_0(float val)  in A5XX_GRAS_CL_VPORT_YSCALE_0()  argument
2712 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_YSCALE_0__MASK;  in A5XX_GRAS_CL_VPORT_YSCALE_0()
2718 static inline uint32_t A5XX_GRAS_CL_VPORT_ZOFFSET_0(float val)  in A5XX_GRAS_CL_VPORT_ZOFFSET_0()  argument
2720 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZOFFSET_0__MASK;  in A5XX_GRAS_CL_VPORT_ZOFFSET_0()
2726 static inline uint32_t A5XX_GRAS_CL_VPORT_ZSCALE_0(float val)  in A5XX_GRAS_CL_VPORT_ZSCALE_0()  argument
2728 	return ((fui(val)) << A5XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A5XX_GRAS_CL_VPORT_ZSCALE_0__MASK;  in A5XX_GRAS_CL_VPORT_ZSCALE_0()
2737 static inline uint32_t A5XX_GRAS_SU_CNTL_LINEHALFWIDTH(float val)  in A5XX_GRAS_SU_CNTL_LINEHALFWIDTH()  argument
2739 …return ((((int32_t)(val * 4.0))) << A5XX_GRAS_SU_CNTL_LINEHALFWIDTH__SHIFT) & A5XX_GRAS_SU_CNTL_LI…  in A5XX_GRAS_SU_CNTL_LINEHALFWIDTH()
2747 static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MIN(float val)  in A5XX_GRAS_SU_POINT_MINMAX_MIN()  argument
2749 …return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A5XX_GRAS_SU_POINT_M…  in A5XX_GRAS_SU_POINT_MINMAX_MIN()
2753 static inline uint32_t A5XX_GRAS_SU_POINT_MINMAX_MAX(float val)  in A5XX_GRAS_SU_POINT_MINMAX_MAX()  argument
2755 …return ((((uint32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A5XX_GRAS_SU_POINT_M…  in A5XX_GRAS_SU_POINT_MINMAX_MAX()
2761 static inline uint32_t A5XX_GRAS_SU_POINT_SIZE(float val)  in A5XX_GRAS_SU_POINT_SIZE()  argument
2763 …return ((((int32_t)(val * 16.0))) << A5XX_GRAS_SU_POINT_SIZE__SHIFT) & A5XX_GRAS_SU_POINT_SIZE__MA…  in A5XX_GRAS_SU_POINT_SIZE()
2775 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_SCALE(float val)  in A5XX_GRAS_SU_POLY_OFFSET_SCALE()  argument
2777 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_SCALE__MAS…  in A5XX_GRAS_SU_POLY_OFFSET_SCALE()
2783 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET()  argument
2785 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFFSET__M…  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET()
2791 static inline uint32_t A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP(float val)  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP()  argument
2793 …return ((fui(val)) << A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP__SHIFT) & A5XX_GRAS_SU_POLY_OFFSET_OFF…  in A5XX_GRAS_SU_POLY_OFFSET_OFFSET_CLAMP()
2799 static inline uint32_t A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val)  in A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT()  argument
2801 …return ((val) << A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_GRAS_SU_DEPTH_BUFFER_I…  in A5XX_GRAS_SU_DEPTH_BUFFER_INFO_DEPTH_FORMAT()
2815 static inline uint32_t A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES()  argument
2817 …return ((val) << A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES__…  in A5XX_GRAS_SC_RAS_MSAA_CNTL_SAMPLES()
2823 static inline uint32_t A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES()  argument
2825 …return ((val) << A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES…  in A5XX_GRAS_SC_DEST_MSAA_CNTL_SAMPLES()
2835 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X()  argument
2837 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X()
2841 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y()  argument
2843 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y()
2850 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X()  argument
2852 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_X()
2856 static inline uint32_t A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y(uint32_t val)  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y()  argument
2858 …return ((val) << A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y__…  in A5XX_GRAS_SC_SCREEN_SCISSOR_BR_0_Y()
2865 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X()  argument
2867 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_X()
2871 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y()  argument
2873 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_TL_0_Y()
2880 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X()  argument
2882 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_X()
2886 static inline uint32_t A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y(uint32_t val)  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y()  argument
2888 …return ((val) << A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y__SHIFT) & A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0…  in A5XX_GRAS_SC_VIEWPORT_SCISSOR_BR_0_Y()
2895 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X()  argument
2897 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
2901 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()  argument
2903 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
2910 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X()  argument
2912 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
2916 static inline uint32_t A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()  argument
2918 	return ((val) << A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;  in A5XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
2933 static inline uint32_t A5XX_GRAS_LRZ_BUFFER_PITCH(uint32_t val)  in A5XX_GRAS_LRZ_BUFFER_PITCH()  argument
2935 	return ((val >> 5) << A5XX_GRAS_LRZ_BUFFER_PITCH__SHIFT) & A5XX_GRAS_LRZ_BUFFER_PITCH__MASK;  in A5XX_GRAS_LRZ_BUFFER_PITCH()
2945 static inline uint32_t A5XX_RB_CNTL_WIDTH(uint32_t val)  in A5XX_RB_CNTL_WIDTH()  argument
2947 	return ((val >> 5) << A5XX_RB_CNTL_WIDTH__SHIFT) & A5XX_RB_CNTL_WIDTH__MASK;  in A5XX_RB_CNTL_WIDTH()
2951 static inline uint32_t A5XX_RB_CNTL_HEIGHT(uint32_t val)  in A5XX_RB_CNTL_HEIGHT()  argument
2953 	return ((val >> 5) << A5XX_RB_CNTL_HEIGHT__SHIFT) & A5XX_RB_CNTL_HEIGHT__MASK;  in A5XX_RB_CNTL_HEIGHT()
2965 static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS(uint32_t val)  in A5XX_RB_RENDER_CNTL_FLAG_MRTS()  argument
2967 	return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS__MASK;  in A5XX_RB_RENDER_CNTL_FLAG_MRTS()
2971 static inline uint32_t A5XX_RB_RENDER_CNTL_FLAG_MRTS2(uint32_t val)  in A5XX_RB_RENDER_CNTL_FLAG_MRTS2()  argument
2973 	return ((val) << A5XX_RB_RENDER_CNTL_FLAG_MRTS2__SHIFT) & A5XX_RB_RENDER_CNTL_FLAG_MRTS2__MASK;  in A5XX_RB_RENDER_CNTL_FLAG_MRTS2()
2979 static inline uint32_t A5XX_RB_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_RB_RAS_MSAA_CNTL_SAMPLES()  argument
2981 	return ((val) << A5XX_RB_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_RAS_MSAA_CNTL_SAMPLES__MASK;  in A5XX_RB_RAS_MSAA_CNTL_SAMPLES()
2987 static inline uint32_t A5XX_RB_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_RB_DEST_MSAA_CNTL_SAMPLES()  argument
2989 	return ((val) << A5XX_RB_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_RB_DEST_MSAA_CNTL_SAMPLES__MASK;  in A5XX_RB_DEST_MSAA_CNTL_SAMPLES()
3009 static inline uint32_t A5XX_RB_FS_OUTPUT_CNTL_MRT(uint32_t val)  in A5XX_RB_FS_OUTPUT_CNTL_MRT()  argument
3011 	return ((val) << A5XX_RB_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_RB_FS_OUTPUT_CNTL_MRT__MASK;  in A5XX_RB_FS_OUTPUT_CNTL_MRT()
3018 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT0(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT0()  argument
3020 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT0__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT0__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT0()
3024 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT1(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT1()  argument
3026 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT1__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT1__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT1()
3030 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT2(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT2()  argument
3032 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT2__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT2__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT2()
3036 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT3(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT3()  argument
3038 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT3__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT3__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT3()
3042 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT4(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT4()  argument
3044 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT4__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT4__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT4()
3048 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT5(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT5()  argument
3050 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT5__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT5__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT5()
3054 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT6(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT6()  argument
3056 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT6__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT6__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT6()
3060 static inline uint32_t A5XX_RB_RENDER_COMPONENTS_RT7(uint32_t val)  in A5XX_RB_RENDER_COMPONENTS_RT7()  argument
3062 	return ((val) << A5XX_RB_RENDER_COMPONENTS_RT7__SHIFT) & A5XX_RB_RENDER_COMPONENTS_RT7__MASK;  in A5XX_RB_RENDER_COMPONENTS_RT7()
3073 static inline uint32_t A5XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)  in A5XX_RB_MRT_CONTROL_ROP_CODE()  argument
3075 	return ((val) << A5XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) & A5XX_RB_MRT_CONTROL_ROP_CODE__MASK;  in A5XX_RB_MRT_CONTROL_ROP_CODE()
3079 static inline uint32_t A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)  in A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE()  argument
3081 …return ((val) << A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A5XX_RB_MRT_CONTROL_COMPONENT_ENAB…  in A5XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
3087 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()  argument
3089 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB_…  in A5XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
3093 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()  argument
3095 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RG…  in A5XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
3099 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()  argument
3101 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_RGB…  in A5XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
3105 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()  argument
3107 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_AL…  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
3111 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()  argument
3113 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_…  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
3117 static inline uint32_t A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()  argument
3119 …return ((val) << A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A5XX_RB_MRT_BLEND_CONTROL_A…  in A5XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
3125 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT()  argument
3127 …return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA…  in A5XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
3131 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()  argument
3133 …return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MO…  in A5XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
3137 static inline uint32_t A5XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A5XX_RB_MRT_BUF_INFO_DITHER_MODE()  argument
3139 	return ((val) << A5XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT) & A5XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK;  in A5XX_RB_MRT_BUF_INFO_DITHER_MODE()
3143 static inline uint32_t A5XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_RB_MRT_BUF_INFO_COLOR_SWAP()  argument
3145 	return ((val) << A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;  in A5XX_RB_MRT_BUF_INFO_COLOR_SWAP()
3152 static inline uint32_t A5XX_RB_MRT_PITCH(uint32_t val)  in A5XX_RB_MRT_PITCH()  argument
3154 	return ((val >> 6) << A5XX_RB_MRT_PITCH__SHIFT) & A5XX_RB_MRT_PITCH__MASK;  in A5XX_RB_MRT_PITCH()
3160 static inline uint32_t A5XX_RB_MRT_ARRAY_PITCH(uint32_t val)  in A5XX_RB_MRT_ARRAY_PITCH()  argument
3162 	return ((val >> 6) << A5XX_RB_MRT_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_ARRAY_PITCH__MASK;  in A5XX_RB_MRT_ARRAY_PITCH()
3172 static inline uint32_t A5XX_RB_BLEND_RED_UINT(uint32_t val)  in A5XX_RB_BLEND_RED_UINT()  argument
3174 	return ((val) << A5XX_RB_BLEND_RED_UINT__SHIFT) & A5XX_RB_BLEND_RED_UINT__MASK;  in A5XX_RB_BLEND_RED_UINT()
3178 static inline uint32_t A5XX_RB_BLEND_RED_SINT(uint32_t val)  in A5XX_RB_BLEND_RED_SINT()  argument
3180 	return ((val) << A5XX_RB_BLEND_RED_SINT__SHIFT) & A5XX_RB_BLEND_RED_SINT__MASK;  in A5XX_RB_BLEND_RED_SINT()
3184 static inline uint32_t A5XX_RB_BLEND_RED_FLOAT(float val)  in A5XX_RB_BLEND_RED_FLOAT()  argument
3186 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_RED_FLOAT__SHIFT) & A5XX_RB_BLEND_RED_FLOAT__MA…  in A5XX_RB_BLEND_RED_FLOAT()
3192 static inline uint32_t A5XX_RB_BLEND_RED_F32(float val)  in A5XX_RB_BLEND_RED_F32()  argument
3194 	return ((fui(val)) << A5XX_RB_BLEND_RED_F32__SHIFT) & A5XX_RB_BLEND_RED_F32__MASK;  in A5XX_RB_BLEND_RED_F32()
3200 static inline uint32_t A5XX_RB_BLEND_GREEN_UINT(uint32_t val)  in A5XX_RB_BLEND_GREEN_UINT()  argument
3202 	return ((val) << A5XX_RB_BLEND_GREEN_UINT__SHIFT) & A5XX_RB_BLEND_GREEN_UINT__MASK;  in A5XX_RB_BLEND_GREEN_UINT()
3206 static inline uint32_t A5XX_RB_BLEND_GREEN_SINT(uint32_t val)  in A5XX_RB_BLEND_GREEN_SINT()  argument
3208 	return ((val) << A5XX_RB_BLEND_GREEN_SINT__SHIFT) & A5XX_RB_BLEND_GREEN_SINT__MASK;  in A5XX_RB_BLEND_GREEN_SINT()
3212 static inline uint32_t A5XX_RB_BLEND_GREEN_FLOAT(float val)  in A5XX_RB_BLEND_GREEN_FLOAT()  argument
3214 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A5XX_RB_BLEND_GREEN_FLOAT…  in A5XX_RB_BLEND_GREEN_FLOAT()
3220 static inline uint32_t A5XX_RB_BLEND_GREEN_F32(float val)  in A5XX_RB_BLEND_GREEN_F32()  argument
3222 	return ((fui(val)) << A5XX_RB_BLEND_GREEN_F32__SHIFT) & A5XX_RB_BLEND_GREEN_F32__MASK;  in A5XX_RB_BLEND_GREEN_F32()
3228 static inline uint32_t A5XX_RB_BLEND_BLUE_UINT(uint32_t val)  in A5XX_RB_BLEND_BLUE_UINT()  argument
3230 	return ((val) << A5XX_RB_BLEND_BLUE_UINT__SHIFT) & A5XX_RB_BLEND_BLUE_UINT__MASK;  in A5XX_RB_BLEND_BLUE_UINT()
3234 static inline uint32_t A5XX_RB_BLEND_BLUE_SINT(uint32_t val)  in A5XX_RB_BLEND_BLUE_SINT()  argument
3236 	return ((val) << A5XX_RB_BLEND_BLUE_SINT__SHIFT) & A5XX_RB_BLEND_BLUE_SINT__MASK;  in A5XX_RB_BLEND_BLUE_SINT()
3240 static inline uint32_t A5XX_RB_BLEND_BLUE_FLOAT(float val)  in A5XX_RB_BLEND_BLUE_FLOAT()  argument
3242 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A5XX_RB_BLEND_BLUE_FLOAT__…  in A5XX_RB_BLEND_BLUE_FLOAT()
3248 static inline uint32_t A5XX_RB_BLEND_BLUE_F32(float val)  in A5XX_RB_BLEND_BLUE_F32()  argument
3250 	return ((fui(val)) << A5XX_RB_BLEND_BLUE_F32__SHIFT) & A5XX_RB_BLEND_BLUE_F32__MASK;  in A5XX_RB_BLEND_BLUE_F32()
3256 static inline uint32_t A5XX_RB_BLEND_ALPHA_UINT(uint32_t val)  in A5XX_RB_BLEND_ALPHA_UINT()  argument
3258 	return ((val) << A5XX_RB_BLEND_ALPHA_UINT__SHIFT) & A5XX_RB_BLEND_ALPHA_UINT__MASK;  in A5XX_RB_BLEND_ALPHA_UINT()
3262 static inline uint32_t A5XX_RB_BLEND_ALPHA_SINT(uint32_t val)  in A5XX_RB_BLEND_ALPHA_SINT()  argument
3264 	return ((val) << A5XX_RB_BLEND_ALPHA_SINT__SHIFT) & A5XX_RB_BLEND_ALPHA_SINT__MASK;  in A5XX_RB_BLEND_ALPHA_SINT()
3268 static inline uint32_t A5XX_RB_BLEND_ALPHA_FLOAT(float val)  in A5XX_RB_BLEND_ALPHA_FLOAT()  argument
3270 …return ((util_float_to_half(val)) << A5XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A5XX_RB_BLEND_ALPHA_FLOAT…  in A5XX_RB_BLEND_ALPHA_FLOAT()
3276 static inline uint32_t A5XX_RB_BLEND_ALPHA_F32(float val)  in A5XX_RB_BLEND_ALPHA_F32()  argument
3278 	return ((fui(val)) << A5XX_RB_BLEND_ALPHA_F32__SHIFT) & A5XX_RB_BLEND_ALPHA_F32__MASK;  in A5XX_RB_BLEND_ALPHA_F32()
3284 static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)  in A5XX_RB_ALPHA_CONTROL_ALPHA_REF()  argument
3286 	return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK;  in A5XX_RB_ALPHA_CONTROL_ALPHA_REF()
3291 static inline uint32_t A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)  in A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()  argument
3293 …return ((val) << A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_…  in A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()
3299 static inline uint32_t A5XX_RB_BLEND_CNTL_ENABLE_BLEND(uint32_t val)  in A5XX_RB_BLEND_CNTL_ENABLE_BLEND()  argument
3301 	return ((val) << A5XX_RB_BLEND_CNTL_ENABLE_BLEND__SHIFT) & A5XX_RB_BLEND_CNTL_ENABLE_BLEND__MASK;  in A5XX_RB_BLEND_CNTL_ENABLE_BLEND()
3307 static inline uint32_t A5XX_RB_BLEND_CNTL_SAMPLE_MASK(uint32_t val)  in A5XX_RB_BLEND_CNTL_SAMPLE_MASK()  argument
3309 	return ((val) << A5XX_RB_BLEND_CNTL_SAMPLE_MASK__SHIFT) & A5XX_RB_BLEND_CNTL_SAMPLE_MASK__MASK;  in A5XX_RB_BLEND_CNTL_SAMPLE_MASK()
3321 static inline uint32_t A5XX_RB_DEPTH_CNTL_ZFUNC(enum adreno_compare_func val)  in A5XX_RB_DEPTH_CNTL_ZFUNC()  argument
3323 	return ((val) << A5XX_RB_DEPTH_CNTL_ZFUNC__SHIFT) & A5XX_RB_DEPTH_CNTL_ZFUNC__MASK;  in A5XX_RB_DEPTH_CNTL_ZFUNC()
3330 static inline uint32_t A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT(enum a5xx_depth_format val)  in A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT()  argument
3332 …return ((val) << A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT__SHIFT) & A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_…  in A5XX_RB_DEPTH_BUFFER_INFO_DEPTH_FORMAT()
3342 static inline uint32_t A5XX_RB_DEPTH_BUFFER_PITCH(uint32_t val)  in A5XX_RB_DEPTH_BUFFER_PITCH()  argument
3344 	return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_PITCH__MASK;  in A5XX_RB_DEPTH_BUFFER_PITCH()
3350 static inline uint32_t A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH(uint32_t val)  in A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH()  argument
3352 …return ((val >> 6) << A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH_…  in A5XX_RB_DEPTH_BUFFER_ARRAY_PITCH()
3361 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)  in A5XX_RB_STENCIL_CONTROL_FUNC()  argument
3363 	return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC__MASK;  in A5XX_RB_STENCIL_CONTROL_FUNC()
3367 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_FAIL()  argument
3369 	return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL__MASK;  in A5XX_RB_STENCIL_CONTROL_FAIL()
3373 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZPASS()  argument
3375 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS__MASK;  in A5XX_RB_STENCIL_CONTROL_ZPASS()
3379 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZFAIL()  argument
3381 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL__MASK;  in A5XX_RB_STENCIL_CONTROL_ZFAIL()
3385 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)  in A5XX_RB_STENCIL_CONTROL_FUNC_BF()  argument
3387 	return ((val) << A5XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_FUNC_BF()
3391 static inline uint32_t A5XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_FAIL_BF()  argument
3393 	return ((val) << A5XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_FAIL_BF()
3397 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZPASS_BF()  argument
3399 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_ZPASS_BF()
3403 static inline uint32_t A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)  in A5XX_RB_STENCIL_CONTROL_ZFAIL_BF()  argument
3405 	return ((val) << A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A5XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;  in A5XX_RB_STENCIL_CONTROL_ZFAIL_BF()
3418 static inline uint32_t A5XX_RB_STENCIL_PITCH(uint32_t val)  in A5XX_RB_STENCIL_PITCH()  argument
3420 	return ((val >> 6) << A5XX_RB_STENCIL_PITCH__SHIFT) & A5XX_RB_STENCIL_PITCH__MASK;  in A5XX_RB_STENCIL_PITCH()
3426 static inline uint32_t A5XX_RB_STENCIL_ARRAY_PITCH(uint32_t val)  in A5XX_RB_STENCIL_ARRAY_PITCH()  argument
3428 	return ((val >> 6) << A5XX_RB_STENCIL_ARRAY_PITCH__SHIFT) & A5XX_RB_STENCIL_ARRAY_PITCH__MASK;  in A5XX_RB_STENCIL_ARRAY_PITCH()
3434 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A5XX_RB_STENCILREFMASK_STENCILREF()  argument
3436 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILREF__MA…  in A5XX_RB_STENCILREFMASK_STENCILREF()
3440 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_STENCILMASK()  argument
3442 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILMASK__…  in A5XX_RB_STENCILREFMASK_STENCILMASK()
3446 static inline uint32_t A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_STENCILWRITEMASK()  argument
3448 …return ((val) << A5XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A5XX_RB_STENCILREFMASK_STENCILW…  in A5XX_RB_STENCILREFMASK_STENCILWRITEMASK()
3454 static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A5XX_RB_STENCILREFMASK_BF_STENCILREF()  argument
3456 …return ((val) << A5XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A5XX_RB_STENCILREFMASK_BF_STENCILR…  in A5XX_RB_STENCILREFMASK_BF_STENCILREF()
3460 static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_BF_STENCILMASK()  argument
3462 …return ((val) << A5XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A5XX_RB_STENCILREFMASK_BF_STENCIL…  in A5XX_RB_STENCILREFMASK_BF_STENCILMASK()
3466 static inline uint32_t A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()  argument
3468 …return ((val) << A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A5XX_RB_STENCILREFMASK_BF_ST…  in A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
3475 static inline uint32_t A5XX_RB_WINDOW_OFFSET_X(uint32_t val)  in A5XX_RB_WINDOW_OFFSET_X()  argument
3477 	return ((val) << A5XX_RB_WINDOW_OFFSET_X__SHIFT) & A5XX_RB_WINDOW_OFFSET_X__MASK;  in A5XX_RB_WINDOW_OFFSET_X()
3481 static inline uint32_t A5XX_RB_WINDOW_OFFSET_Y(uint32_t val)  in A5XX_RB_WINDOW_OFFSET_Y()  argument
3483 	return ((val) << A5XX_RB_WINDOW_OFFSET_Y__SHIFT) & A5XX_RB_WINDOW_OFFSET_Y__MASK;  in A5XX_RB_WINDOW_OFFSET_Y()
3492 static inline uint32_t A5XX_RB_BLIT_CNTL_BUF(enum a5xx_blit_buf val)  in A5XX_RB_BLIT_CNTL_BUF()  argument
3494 	return ((val) << A5XX_RB_BLIT_CNTL_BUF__SHIFT) & A5XX_RB_BLIT_CNTL_BUF__MASK;  in A5XX_RB_BLIT_CNTL_BUF()
3501 static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_X(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_1_X()  argument
3503 	return ((val) << A5XX_RB_RESOLVE_CNTL_1_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_X__MASK;  in A5XX_RB_RESOLVE_CNTL_1_X()
3507 static inline uint32_t A5XX_RB_RESOLVE_CNTL_1_Y(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_1_Y()  argument
3509 	return ((val) << A5XX_RB_RESOLVE_CNTL_1_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_1_Y__MASK;  in A5XX_RB_RESOLVE_CNTL_1_Y()
3516 static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_X(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_2_X()  argument
3518 	return ((val) << A5XX_RB_RESOLVE_CNTL_2_X__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_X__MASK;  in A5XX_RB_RESOLVE_CNTL_2_X()
3522 static inline uint32_t A5XX_RB_RESOLVE_CNTL_2_Y(uint32_t val)  in A5XX_RB_RESOLVE_CNTL_2_Y()  argument
3524 	return ((val) << A5XX_RB_RESOLVE_CNTL_2_Y__SHIFT) & A5XX_RB_RESOLVE_CNTL_2_Y__MASK;  in A5XX_RB_RESOLVE_CNTL_2_Y()
3537 static inline uint32_t A5XX_RB_BLIT_DST_PITCH(uint32_t val)  in A5XX_RB_BLIT_DST_PITCH()  argument
3539 	return ((val >> 6) << A5XX_RB_BLIT_DST_PITCH__SHIFT) & A5XX_RB_BLIT_DST_PITCH__MASK;  in A5XX_RB_BLIT_DST_PITCH()
3545 static inline uint32_t A5XX_RB_BLIT_DST_ARRAY_PITCH(uint32_t val)  in A5XX_RB_BLIT_DST_ARRAY_PITCH()  argument
3547 	return ((val >> 6) << A5XX_RB_BLIT_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_DST_ARRAY_PITCH__MASK;  in A5XX_RB_BLIT_DST_ARRAY_PITCH()
3563 static inline uint32_t A5XX_RB_CLEAR_CNTL_MASK(uint32_t val)  in A5XX_RB_CLEAR_CNTL_MASK()  argument
3565 	return ((val) << A5XX_RB_CLEAR_CNTL_MASK__SHIFT) & A5XX_RB_CLEAR_CNTL_MASK__MASK;  in A5XX_RB_CLEAR_CNTL_MASK()
3583 static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_PITCH(uint32_t val)  in A5XX_RB_MRT_FLAG_BUFFER_PITCH()  argument
3585 	return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_PITCH__MASK;  in A5XX_RB_MRT_FLAG_BUFFER_PITCH()
3591 static inline uint32_t A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH(uint32_t val)  in A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH()  argument
3593 …return ((val >> 6) << A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH__SHIFT) & A5XX_RB_MRT_FLAG_BUFFER_ARRAY_…  in A5XX_RB_MRT_FLAG_BUFFER_ARRAY_PITCH()
3603 static inline uint32_t A5XX_RB_BLIT_FLAG_DST_PITCH(uint32_t val)  in A5XX_RB_BLIT_FLAG_DST_PITCH()  argument
3605 	return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_PITCH__MASK;  in A5XX_RB_BLIT_FLAG_DST_PITCH()
3611 static inline uint32_t A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH(uint32_t val)  in A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH()  argument
3613 …return ((val >> 6) << A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH__SHIFT) & A5XX_RB_BLIT_FLAG_DST_ARRAY_PITC…  in A5XX_RB_BLIT_FLAG_DST_ARRAY_PITCH()
3623 static inline uint32_t A5XX_VPC_CNTL_0_STRIDE_IN_VPC(uint32_t val)  in A5XX_VPC_CNTL_0_STRIDE_IN_VPC()  argument
3625 	return ((val) << A5XX_VPC_CNTL_0_STRIDE_IN_VPC__SHIFT) & A5XX_VPC_CNTL_0_STRIDE_IN_VPC__MASK;  in A5XX_VPC_CNTL_0_STRIDE_IN_VPC()
3652 static inline uint32_t A5XX_VPC_PACK_NUMNONPOSVAR(uint32_t val)  in A5XX_VPC_PACK_NUMNONPOSVAR()  argument
3654 	return ((val) << A5XX_VPC_PACK_NUMNONPOSVAR__SHIFT) & A5XX_VPC_PACK_NUMNONPOSVAR__MASK;  in A5XX_VPC_PACK_NUMNONPOSVAR()
3658 static inline uint32_t A5XX_VPC_PACK_PSIZELOC(uint32_t val)  in A5XX_VPC_PACK_PSIZELOC()  argument
3660 	return ((val) << A5XX_VPC_PACK_PSIZELOC__SHIFT) & A5XX_VPC_PACK_PSIZELOC__MASK;  in A5XX_VPC_PACK_PSIZELOC()
3681 static inline uint32_t A5XX_VPC_SO_PROG_A_BUF(uint32_t val)  in A5XX_VPC_SO_PROG_A_BUF()  argument
3683 	return ((val) << A5XX_VPC_SO_PROG_A_BUF__SHIFT) & A5XX_VPC_SO_PROG_A_BUF__MASK;  in A5XX_VPC_SO_PROG_A_BUF()
3687 static inline uint32_t A5XX_VPC_SO_PROG_A_OFF(uint32_t val)  in A5XX_VPC_SO_PROG_A_OFF()  argument
3689 	return ((val >> 2) << A5XX_VPC_SO_PROG_A_OFF__SHIFT) & A5XX_VPC_SO_PROG_A_OFF__MASK;  in A5XX_VPC_SO_PROG_A_OFF()
3694 static inline uint32_t A5XX_VPC_SO_PROG_B_BUF(uint32_t val)  in A5XX_VPC_SO_PROG_B_BUF()  argument
3696 	return ((val) << A5XX_VPC_SO_PROG_B_BUF__SHIFT) & A5XX_VPC_SO_PROG_B_BUF__MASK;  in A5XX_VPC_SO_PROG_B_BUF()
3700 static inline uint32_t A5XX_VPC_SO_PROG_B_OFF(uint32_t val)  in A5XX_VPC_SO_PROG_B_OFF()  argument
3702 	return ((val >> 2) << A5XX_VPC_SO_PROG_B_OFF__SHIFT) & A5XX_VPC_SO_PROG_B_OFF__MASK;  in A5XX_VPC_SO_PROG_B_OFF()
3725 static inline uint32_t A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC(uint32_t val)  in A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC()  argument
3727 …return ((val) << A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC__SHIFT) & A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_V…  in A5XX_PC_PRIMITIVE_CNTL_STRIDE_IN_VPC()
3739 static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)  in A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE()  argument
3741 …return ((val) << A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE__SHIFT) & A5XX_PC_RASTER_CNTL_POLYMODE_F…  in A5XX_PC_RASTER_CNTL_POLYMODE_FRONT_PTYPE()
3745 static inline uint32_t A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val)  in A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE()  argument
3747 …return ((val) << A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE__SHIFT) & A5XX_PC_RASTER_CNTL_POLYMODE_BA…  in A5XX_PC_RASTER_CNTL_POLYMODE_BACK_PTYPE()
3760 static inline uint32_t A5XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val)  in A5XX_PC_GS_PARAM_MAX_VERTICES()  argument
3762 	return ((val) << A5XX_PC_GS_PARAM_MAX_VERTICES__SHIFT) & A5XX_PC_GS_PARAM_MAX_VERTICES__MASK;  in A5XX_PC_GS_PARAM_MAX_VERTICES()
3766 static inline uint32_t A5XX_PC_GS_PARAM_INVOCATIONS(uint32_t val)  in A5XX_PC_GS_PARAM_INVOCATIONS()  argument
3768 	return ((val) << A5XX_PC_GS_PARAM_INVOCATIONS__SHIFT) & A5XX_PC_GS_PARAM_INVOCATIONS__MASK;  in A5XX_PC_GS_PARAM_INVOCATIONS()
3772 static inline uint32_t A5XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)  in A5XX_PC_GS_PARAM_PRIMTYPE()  argument
3774 	return ((val) << A5XX_PC_GS_PARAM_PRIMTYPE__SHIFT) & A5XX_PC_GS_PARAM_PRIMTYPE__MASK;  in A5XX_PC_GS_PARAM_PRIMTYPE()
3780 static inline uint32_t A5XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val)  in A5XX_PC_HS_PARAM_VERTICES_OUT()  argument
3782 	return ((val) << A5XX_PC_HS_PARAM_VERTICES_OUT__SHIFT) & A5XX_PC_HS_PARAM_VERTICES_OUT__MASK;  in A5XX_PC_HS_PARAM_VERTICES_OUT()
3786 static inline uint32_t A5XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val)  in A5XX_PC_HS_PARAM_SPACING()  argument
3788 	return ((val) << A5XX_PC_HS_PARAM_SPACING__SHIFT) & A5XX_PC_HS_PARAM_SPACING__MASK;  in A5XX_PC_HS_PARAM_SPACING()
3798 static inline uint32_t A5XX_VFD_CONTROL_0_VTXCNT(uint32_t val)  in A5XX_VFD_CONTROL_0_VTXCNT()  argument
3800 	return ((val) << A5XX_VFD_CONTROL_0_VTXCNT__SHIFT) & A5XX_VFD_CONTROL_0_VTXCNT__MASK;  in A5XX_VFD_CONTROL_0_VTXCNT()
3806 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)  in A5XX_VFD_CONTROL_1_REGID4VTX()  argument
3808 	return ((val) << A5XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A5XX_VFD_CONTROL_1_REGID4VTX__MASK;  in A5XX_VFD_CONTROL_1_REGID4VTX()
3812 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4INST(uint32_t val)  in A5XX_VFD_CONTROL_1_REGID4INST()  argument
3814 	return ((val) << A5XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A5XX_VFD_CONTROL_1_REGID4INST__MASK;  in A5XX_VFD_CONTROL_1_REGID4INST()
3818 static inline uint32_t A5XX_VFD_CONTROL_1_REGID4PRIMID(uint32_t val)  in A5XX_VFD_CONTROL_1_REGID4PRIMID()  argument
3820 	return ((val) << A5XX_VFD_CONTROL_1_REGID4PRIMID__SHIFT) & A5XX_VFD_CONTROL_1_REGID4PRIMID__MASK;  in A5XX_VFD_CONTROL_1_REGID4PRIMID()
3826 static inline uint32_t A5XX_VFD_CONTROL_2_REGID_PATCHID(uint32_t val)  in A5XX_VFD_CONTROL_2_REGID_PATCHID()  argument
3828 	return ((val) << A5XX_VFD_CONTROL_2_REGID_PATCHID__SHIFT) & A5XX_VFD_CONTROL_2_REGID_PATCHID__MASK;  in A5XX_VFD_CONTROL_2_REGID_PATCHID()
3834 static inline uint32_t A5XX_VFD_CONTROL_3_REGID_PATCHID(uint32_t val)  in A5XX_VFD_CONTROL_3_REGID_PATCHID()  argument
3836 	return ((val) << A5XX_VFD_CONTROL_3_REGID_PATCHID__SHIFT) & A5XX_VFD_CONTROL_3_REGID_PATCHID__MASK;  in A5XX_VFD_CONTROL_3_REGID_PATCHID()
3840 static inline uint32_t A5XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val)  in A5XX_VFD_CONTROL_3_REGID_TESSX()  argument
3842 	return ((val) << A5XX_VFD_CONTROL_3_REGID_TESSX__SHIFT) & A5XX_VFD_CONTROL_3_REGID_TESSX__MASK;  in A5XX_VFD_CONTROL_3_REGID_TESSX()
3846 static inline uint32_t A5XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val)  in A5XX_VFD_CONTROL_3_REGID_TESSY()  argument
3848 	return ((val) << A5XX_VFD_CONTROL_3_REGID_TESSY__SHIFT) & A5XX_VFD_CONTROL_3_REGID_TESSY__MASK;  in A5XX_VFD_CONTROL_3_REGID_TESSY()
3874 static inline uint32_t A5XX_VFD_DECODE_INSTR_IDX(uint32_t val)  in A5XX_VFD_DECODE_INSTR_IDX()  argument
3876 	return ((val) << A5XX_VFD_DECODE_INSTR_IDX__SHIFT) & A5XX_VFD_DECODE_INSTR_IDX__MASK;  in A5XX_VFD_DECODE_INSTR_IDX()
3881 static inline uint32_t A5XX_VFD_DECODE_INSTR_FORMAT(enum a5xx_vtx_fmt val)  in A5XX_VFD_DECODE_INSTR_FORMAT()  argument
3883 	return ((val) << A5XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A5XX_VFD_DECODE_INSTR_FORMAT__MASK;  in A5XX_VFD_DECODE_INSTR_FORMAT()
3887 static inline uint32_t A5XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)  in A5XX_VFD_DECODE_INSTR_SWAP()  argument
3889 	return ((val) << A5XX_VFD_DECODE_INSTR_SWAP__SHIFT) & A5XX_VFD_DECODE_INSTR_SWAP__MASK;  in A5XX_VFD_DECODE_INSTR_SWAP()
3901 static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK(uint32_t val)  in A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK()  argument
3903 …return ((val) << A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK__…  in A5XX_VFD_DEST_CNTL_INSTR_WRITEMASK()
3907 static inline uint32_t A5XX_VFD_DEST_CNTL_INSTR_REGID(uint32_t val)  in A5XX_VFD_DEST_CNTL_INSTR_REGID()  argument
3909 	return ((val) << A5XX_VFD_DEST_CNTL_INSTR_REGID__SHIFT) & A5XX_VFD_DEST_CNTL_INSTR_REGID__MASK;  in A5XX_VFD_DEST_CNTL_INSTR_REGID()
3920 static inline uint32_t A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET()  argument
3922 …return ((val) << A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_VS_CONFIG_CONSTOBJECTOFFSET()
3926 static inline uint32_t A5XX_SP_VS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_VS_CONFIG_SHADEROBJOFFSET()  argument
3928 …return ((val) << A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_VS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_VS_CONFIG_SHADEROBJOFFSET()
3935 static inline uint32_t A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET()  argument
3937 …return ((val) << A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_FS_CONFIG_CONSTOBJECTOFFSET()
3941 static inline uint32_t A5XX_SP_FS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_FS_CONFIG_SHADEROBJOFFSET()  argument
3943 …return ((val) << A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_FS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_FS_CONFIG_SHADEROBJOFFSET()
3950 static inline uint32_t A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET()  argument
3952 …return ((val) << A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_HS_CONFIG_CONSTOBJECTOFFSET()
3956 static inline uint32_t A5XX_SP_HS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_HS_CONFIG_SHADEROBJOFFSET()  argument
3958 …return ((val) << A5XX_SP_HS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_HS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_HS_CONFIG_SHADEROBJOFFSET()
3965 static inline uint32_t A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET()  argument
3967 …return ((val) << A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_DS_CONFIG_CONSTOBJECTOFFSET()
3971 static inline uint32_t A5XX_SP_DS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_DS_CONFIG_SHADEROBJOFFSET()  argument
3973 …return ((val) << A5XX_SP_DS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_DS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_DS_CONFIG_SHADEROBJOFFSET()
3980 static inline uint32_t A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET()  argument
3982 …return ((val) << A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_GS_CONFIG_CONSTOBJECTOFFSET()
3986 static inline uint32_t A5XX_SP_GS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_GS_CONFIG_SHADEROBJOFFSET()  argument
3988 …return ((val) << A5XX_SP_GS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_GS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_GS_CONFIG_SHADEROBJOFFSET()
3995 static inline uint32_t A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET()  argument
3997 …return ((val) << A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET…  in A5XX_SP_CS_CONFIG_CONSTOBJECTOFFSET()
4001 static inline uint32_t A5XX_SP_CS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_SP_CS_CONFIG_SHADEROBJOFFSET()  argument
4003 …return ((val) << A5XX_SP_CS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_SP_CS_CONFIG_SHADEROBJOFFSET__MA…  in A5XX_SP_CS_CONFIG_SHADEROBJOFFSET()
4013 static inline uint32_t A5XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_VS_CTRL_REG0_THREADSIZE()  argument
4015 	return ((val) << A5XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_VS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_VS_CTRL_REG0_THREADSIZE()
4019 static inline uint32_t A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4021 …return ((val) << A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
4025 static inline uint32_t A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4027 …return ((val) << A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_VS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
4033 static inline uint32_t A5XX_SP_VS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_VS_CTRL_REG0_BRANCHSTACK()  argument
4035 	return ((val) << A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_VS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_VS_CTRL_REG0_BRANCHSTACK()
4041 static inline uint32_t A5XX_SP_PRIMITIVE_CNTL_VSOUT(uint32_t val)  in A5XX_SP_PRIMITIVE_CNTL_VSOUT()  argument
4043 	return ((val) << A5XX_SP_PRIMITIVE_CNTL_VSOUT__SHIFT) & A5XX_SP_PRIMITIVE_CNTL_VSOUT__MASK;  in A5XX_SP_PRIMITIVE_CNTL_VSOUT()
4051 static inline uint32_t A5XX_SP_VS_OUT_REG_A_REGID(uint32_t val)  in A5XX_SP_VS_OUT_REG_A_REGID()  argument
4053 	return ((val) << A5XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_A_REGID__MASK;  in A5XX_SP_VS_OUT_REG_A_REGID()
4057 static inline uint32_t A5XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)  in A5XX_SP_VS_OUT_REG_A_COMPMASK()  argument
4059 	return ((val) << A5XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_A_COMPMASK__MASK;  in A5XX_SP_VS_OUT_REG_A_COMPMASK()
4063 static inline uint32_t A5XX_SP_VS_OUT_REG_B_REGID(uint32_t val)  in A5XX_SP_VS_OUT_REG_B_REGID()  argument
4065 	return ((val) << A5XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A5XX_SP_VS_OUT_REG_B_REGID__MASK;  in A5XX_SP_VS_OUT_REG_B_REGID()
4069 static inline uint32_t A5XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)  in A5XX_SP_VS_OUT_REG_B_COMPMASK()  argument
4071 	return ((val) << A5XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A5XX_SP_VS_OUT_REG_B_COMPMASK__MASK;  in A5XX_SP_VS_OUT_REG_B_COMPMASK()
4079 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC0()  argument
4081 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC0()
4085 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC1()  argument
4087 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC1()
4091 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC2()  argument
4093 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC2()
4097 static inline uint32_t A5XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A5XX_SP_VS_VPC_DST_REG_OUTLOC3()  argument
4099 	return ((val) << A5XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A5XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK;  in A5XX_SP_VS_VPC_DST_REG_OUTLOC3()
4111 static inline uint32_t A5XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_FS_CTRL_REG0_THREADSIZE()  argument
4113 	return ((val) << A5XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_FS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_FS_CTRL_REG0_THREADSIZE()
4117 static inline uint32_t A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4119 …return ((val) << A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
4123 static inline uint32_t A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4125 …return ((val) << A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_FS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
4131 static inline uint32_t A5XX_SP_FS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_FS_CTRL_REG0_BRANCHSTACK()  argument
4133 	return ((val) << A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_FS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_FS_CTRL_REG0_BRANCHSTACK()
4150 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_MRT(uint32_t val)  in A5XX_SP_FS_OUTPUT_CNTL_MRT()  argument
4152 	return ((val) << A5XX_SP_FS_OUTPUT_CNTL_MRT__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_MRT__MASK;  in A5XX_SP_FS_OUTPUT_CNTL_MRT()
4156 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID(uint32_t val)  in A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID()  argument
4158 …return ((val) << A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID__…  in A5XX_SP_FS_OUTPUT_CNTL_DEPTH_REGID()
4162 static inline uint32_t A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID(uint32_t val)  in A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID()  argument
4164 …return ((val) << A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMA…  in A5XX_SP_FS_OUTPUT_CNTL_SAMPLEMASK_REGID()
4172 static inline uint32_t A5XX_SP_FS_OUTPUT_REG_REGID(uint32_t val)  in A5XX_SP_FS_OUTPUT_REG_REGID()  argument
4174 	return ((val) << A5XX_SP_FS_OUTPUT_REG_REGID__SHIFT) & A5XX_SP_FS_OUTPUT_REG_REGID__MASK;  in A5XX_SP_FS_OUTPUT_REG_REGID()
4183 static inline uint32_t A5XX_SP_FS_MRT_REG_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_SP_FS_MRT_REG_COLOR_FORMAT()  argument
4185 	return ((val) << A5XX_SP_FS_MRT_REG_COLOR_FORMAT__SHIFT) & A5XX_SP_FS_MRT_REG_COLOR_FORMAT__MASK;  in A5XX_SP_FS_MRT_REG_COLOR_FORMAT()
4196 static inline uint32_t A5XX_SP_CS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_CS_CTRL_REG0_THREADSIZE()  argument
4198 	return ((val) << A5XX_SP_CS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_CS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_CS_CTRL_REG0_THREADSIZE()
4202 static inline uint32_t A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4204 …return ((val) << A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_CS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_CS_CTRL_REG0_HALFREGFOOTPRINT()
4208 static inline uint32_t A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4210 …return ((val) << A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_CS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_CS_CTRL_REG0_FULLREGFOOTPRINT()
4216 static inline uint32_t A5XX_SP_CS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_CS_CTRL_REG0_BRANCHSTACK()  argument
4218 	return ((val) << A5XX_SP_CS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_CS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_CS_CTRL_REG0_BRANCHSTACK()
4230 static inline uint32_t A5XX_SP_HS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_HS_CTRL_REG0_THREADSIZE()  argument
4232 	return ((val) << A5XX_SP_HS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_HS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_HS_CTRL_REG0_THREADSIZE()
4236 static inline uint32_t A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4238 …return ((val) << A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_HS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_HS_CTRL_REG0_HALFREGFOOTPRINT()
4242 static inline uint32_t A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4244 …return ((val) << A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_HS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_HS_CTRL_REG0_FULLREGFOOTPRINT()
4250 static inline uint32_t A5XX_SP_HS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_HS_CTRL_REG0_BRANCHSTACK()  argument
4252 	return ((val) << A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_HS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_HS_CTRL_REG0_BRANCHSTACK()
4264 static inline uint32_t A5XX_SP_DS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_DS_CTRL_REG0_THREADSIZE()  argument
4266 	return ((val) << A5XX_SP_DS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_DS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_DS_CTRL_REG0_THREADSIZE()
4270 static inline uint32_t A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4272 …return ((val) << A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_DS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_DS_CTRL_REG0_HALFREGFOOTPRINT()
4276 static inline uint32_t A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4278 …return ((val) << A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_DS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_DS_CTRL_REG0_FULLREGFOOTPRINT()
4284 static inline uint32_t A5XX_SP_DS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_DS_CTRL_REG0_BRANCHSTACK()  argument
4286 	return ((val) << A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_DS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_DS_CTRL_REG0_BRANCHSTACK()
4298 static inline uint32_t A5XX_SP_GS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A5XX_SP_GS_CTRL_REG0_THREADSIZE()  argument
4300 	return ((val) << A5XX_SP_GS_CTRL_REG0_THREADSIZE__SHIFT) & A5XX_SP_GS_CTRL_REG0_THREADSIZE__MASK;  in A5XX_SP_GS_CTRL_REG0_THREADSIZE()
4304 static inline uint32_t A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT()  argument
4306 …return ((val) << A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A5XX_SP_GS_CTRL_REG0_HALFREGFOOTP…  in A5XX_SP_GS_CTRL_REG0_HALFREGFOOTPRINT()
4310 static inline uint32_t A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT()  argument
4312 …return ((val) << A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A5XX_SP_GS_CTRL_REG0_FULLREGFOOTP…  in A5XX_SP_GS_CTRL_REG0_FULLREGFOOTPRINT()
4318 static inline uint32_t A5XX_SP_GS_CTRL_REG0_BRANCHSTACK(uint32_t val)  in A5XX_SP_GS_CTRL_REG0_BRANCHSTACK()  argument
4320 	return ((val) << A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__SHIFT) & A5XX_SP_GS_CTRL_REG0_BRANCHSTACK__MASK;  in A5XX_SP_GS_CTRL_REG0_BRANCHSTACK()
4332 static inline uint32_t A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES()  argument
4334 …return ((val) << A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES__…  in A5XX_TPL1_TP_RAS_MSAA_CNTL_SAMPLES()
4340 static inline uint32_t A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES()  argument
4342 …return ((val) << A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES__SHIFT) & A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES…  in A5XX_TPL1_TP_DEST_MSAA_CNTL_SAMPLES()
4415 static inline uint32_t A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)  in A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()  argument
4417 …return ((val) << A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A5XX_HLSQ_CONTROL_0_REG_FSTHREADSI…  in A5XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
4421 static inline uint32_t A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE(enum a3xx_threadsize val)  in A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE()  argument
4423 …return ((val) << A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE__SHIFT) & A5XX_HLSQ_CONTROL_0_REG_CSTHREADSI…  in A5XX_HLSQ_CONTROL_0_REG_CSTHREADSIZE()
4429 static inline uint32_t A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD(uint32_t val)  in A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD()  argument
4431 …return ((val) << A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD__SHIFT) & A5XX_HLSQ_CONTROL_1_REG_PRIM…  in A5XX_HLSQ_CONTROL_1_REG_PRIMALLOCTHRESHOLD()
4437 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_FACEREGID()  argument
4439 …return ((val) << A5XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_FACEREGID__MA…  in A5XX_HLSQ_CONTROL_2_REG_FACEREGID()
4443 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_SAMPLEID(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEID()  argument
4445 	return ((val) << A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_SAMPLEID__MASK;  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEID()
4449 static inline uint32_t A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK(uint32_t val)  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK()  argument
4451 …return ((val) << A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__SHIFT) & A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK__…  in A5XX_HLSQ_CONTROL_2_REG_SAMPLEMASK()
4457 static inline uint32_t A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID()  argument
4459 …return ((val) << A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID__SHIFT) & A5XX_HLSQ_CONTROL_3_REG_FRAGCO…  in A5XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID()
4465 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID()  argument
4467 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_XYCOORDREG…  in A5XX_HLSQ_CONTROL_4_REG_XYCOORDREGID()
4471 static inline uint32_t A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID(uint32_t val)  in A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID()  argument
4473 …return ((val) << A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID__SHIFT) & A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREG…  in A5XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID()
4482 static inline uint32_t A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET()  argument
4484 …return ((val) << A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_VS_CONFIG_CONSTOBJECTOFFSET()
4488 static inline uint32_t A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET()  argument
4490 …return ((val) << A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_VS_CONFIG_SHADEROBJOFFSET()
4497 static inline uint32_t A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET()  argument
4499 …return ((val) << A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_FS_CONFIG_CONSTOBJECTOFFSET()
4503 static inline uint32_t A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET()  argument
4505 …return ((val) << A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_FS_CONFIG_SHADEROBJOFFSET()
4512 static inline uint32_t A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET()  argument
4514 …return ((val) << A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_HS_CONFIG_CONSTOBJECTOFFSET()
4518 static inline uint32_t A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET()  argument
4520 …return ((val) << A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_HS_CONFIG_SHADEROBJOFFSET()
4527 static inline uint32_t A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET()  argument
4529 …return ((val) << A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_DS_CONFIG_CONSTOBJECTOFFSET()
4533 static inline uint32_t A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET()  argument
4535 …return ((val) << A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_DS_CONFIG_SHADEROBJOFFSET()
4542 static inline uint32_t A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET()  argument
4544 …return ((val) << A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_GS_CONFIG_CONSTOBJECTOFFSET()
4548 static inline uint32_t A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET()  argument
4550 …return ((val) << A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_GS_CONFIG_SHADEROBJOFFSET()
4557 static inline uint32_t A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET(uint32_t val)  in A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET()  argument
4559 …return ((val) << A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET__SHIFT) & A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOF…  in A5XX_HLSQ_CS_CONFIG_CONSTOBJECTOFFSET()
4563 static inline uint32_t A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET(uint32_t val)  in A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET()  argument
4565 …return ((val) << A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET__SHIFT) & A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET…  in A5XX_HLSQ_CS_CONFIG_SHADEROBJOFFSET()
4572 static inline uint32_t A5XX_HLSQ_VS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_VS_CNTL_INSTRLEN()  argument
4574 	return ((val) << A5XX_HLSQ_VS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_VS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_VS_CNTL_INSTRLEN()
4581 static inline uint32_t A5XX_HLSQ_FS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_FS_CNTL_INSTRLEN()  argument
4583 	return ((val) << A5XX_HLSQ_FS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_FS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_FS_CNTL_INSTRLEN()
4590 static inline uint32_t A5XX_HLSQ_HS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_HS_CNTL_INSTRLEN()  argument
4592 	return ((val) << A5XX_HLSQ_HS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_HS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_HS_CNTL_INSTRLEN()
4599 static inline uint32_t A5XX_HLSQ_DS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_DS_CNTL_INSTRLEN()  argument
4601 	return ((val) << A5XX_HLSQ_DS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_DS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_DS_CNTL_INSTRLEN()
4608 static inline uint32_t A5XX_HLSQ_GS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_GS_CNTL_INSTRLEN()  argument
4610 	return ((val) << A5XX_HLSQ_GS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_GS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_GS_CNTL_INSTRLEN()
4617 static inline uint32_t A5XX_HLSQ_CS_CNTL_INSTRLEN(uint32_t val)  in A5XX_HLSQ_CS_CNTL_INSTRLEN()  argument
4619 	return ((val) << A5XX_HLSQ_CS_CNTL_INSTRLEN__SHIFT) & A5XX_HLSQ_CS_CNTL_INSTRLEN__MASK;  in A5XX_HLSQ_CS_CNTL_INSTRLEN()
4631 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM()  argument
4633 	return ((val) << A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM__MASK;  in A5XX_HLSQ_CS_NDRANGE_0_KERNELDIM()
4637 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX()  argument
4639 …return ((val) << A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX__MA…  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEX()
4643 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY()  argument
4645 …return ((val) << A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY__MA…  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEY()
4649 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ()  argument
4651 …return ((val) << A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ__SHIFT) & A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ__MA…  in A5XX_HLSQ_CS_NDRANGE_0_LOCALSIZEZ()
4657 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X()  argument
4659 …return ((val) << A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X__SHIFT) & A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X…  in A5XX_HLSQ_CS_NDRANGE_1_GLOBALSIZE_X()
4665 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X()  argument
4667 …return ((val) << A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__SHIFT) & A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X__…  in A5XX_HLSQ_CS_NDRANGE_2_GLOBALOFF_X()
4673 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y()  argument
4675 …return ((val) << A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y__SHIFT) & A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y…  in A5XX_HLSQ_CS_NDRANGE_3_GLOBALSIZE_Y()
4681 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y()  argument
4683 …return ((val) << A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__SHIFT) & A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y__…  in A5XX_HLSQ_CS_NDRANGE_4_GLOBALOFF_Y()
4689 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z()  argument
4691 …return ((val) << A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z__SHIFT) & A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z…  in A5XX_HLSQ_CS_NDRANGE_5_GLOBALSIZE_Z()
4697 static inline uint32_t A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z(uint32_t val)  in A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z()  argument
4699 …return ((val) << A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__SHIFT) & A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z__…  in A5XX_HLSQ_CS_NDRANGE_6_GLOBALOFF_Z()
4705 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID()  argument
4707 	return ((val) << A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID__SHIFT) & A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID__MASK;  in A5XX_HLSQ_CS_CNTL_0_WGIDCONSTID()
4711 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_UNK0(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_UNK0()  argument
4713 	return ((val) << A5XX_HLSQ_CS_CNTL_0_UNK0__SHIFT) & A5XX_HLSQ_CS_CNTL_0_UNK0__MASK;  in A5XX_HLSQ_CS_CNTL_0_UNK0()
4717 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_UNK1(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_UNK1()  argument
4719 	return ((val) << A5XX_HLSQ_CS_CNTL_0_UNK1__SHIFT) & A5XX_HLSQ_CS_CNTL_0_UNK1__MASK;  in A5XX_HLSQ_CS_CNTL_0_UNK1()
4723 static inline uint32_t A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID(uint32_t val)  in A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID()  argument
4725 	return ((val) << A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID__SHIFT) & A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID__MASK;  in A5XX_HLSQ_CS_CNTL_0_LOCALIDREGID()
4779 static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_RB_2D_SRC_INFO_COLOR_FORMAT()  argument
4781 	return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_FORMAT__MASK;  in A5XX_RB_2D_SRC_INFO_COLOR_FORMAT()
4785 static inline uint32_t A5XX_RB_2D_SRC_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_RB_2D_SRC_INFO_TILE_MODE()  argument
4787 	return ((val) << A5XX_RB_2D_SRC_INFO_TILE_MODE__SHIFT) & A5XX_RB_2D_SRC_INFO_TILE_MODE__MASK;  in A5XX_RB_2D_SRC_INFO_TILE_MODE()
4791 static inline uint32_t A5XX_RB_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_RB_2D_SRC_INFO_COLOR_SWAP()  argument
4793 	return ((val) << A5XX_RB_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_SRC_INFO_COLOR_SWAP__MASK;  in A5XX_RB_2D_SRC_INFO_COLOR_SWAP()
4804 static inline uint32_t A5XX_RB_2D_SRC_SIZE_PITCH(uint32_t val)  in A5XX_RB_2D_SRC_SIZE_PITCH()  argument
4806 	return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_PITCH__MASK;  in A5XX_RB_2D_SRC_SIZE_PITCH()
4810 static inline uint32_t A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH(uint32_t val)  in A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH()  argument
4812 …return ((val >> 6) << A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH__M…  in A5XX_RB_2D_SRC_SIZE_ARRAY_PITCH()
4818 static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_RB_2D_DST_INFO_COLOR_FORMAT()  argument
4820 	return ((val) << A5XX_RB_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_FORMAT__MASK;  in A5XX_RB_2D_DST_INFO_COLOR_FORMAT()
4824 static inline uint32_t A5XX_RB_2D_DST_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_RB_2D_DST_INFO_TILE_MODE()  argument
4826 	return ((val) << A5XX_RB_2D_DST_INFO_TILE_MODE__SHIFT) & A5XX_RB_2D_DST_INFO_TILE_MODE__MASK;  in A5XX_RB_2D_DST_INFO_TILE_MODE()
4830 static inline uint32_t A5XX_RB_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_RB_2D_DST_INFO_COLOR_SWAP()  argument
4832 	return ((val) << A5XX_RB_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_RB_2D_DST_INFO_COLOR_SWAP__MASK;  in A5XX_RB_2D_DST_INFO_COLOR_SWAP()
4843 static inline uint32_t A5XX_RB_2D_DST_SIZE_PITCH(uint32_t val)  in A5XX_RB_2D_DST_SIZE_PITCH()  argument
4845 	return ((val >> 6) << A5XX_RB_2D_DST_SIZE_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_PITCH__MASK;  in A5XX_RB_2D_DST_SIZE_PITCH()
4849 static inline uint32_t A5XX_RB_2D_DST_SIZE_ARRAY_PITCH(uint32_t val)  in A5XX_RB_2D_DST_SIZE_ARRAY_PITCH()  argument
4851 …return ((val >> 6) << A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__SHIFT) & A5XX_RB_2D_DST_SIZE_ARRAY_PITCH__M…  in A5XX_RB_2D_DST_SIZE_ARRAY_PITCH()
4867 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT()  argument
4869 …return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT__…  in A5XX_GRAS_2D_SRC_INFO_COLOR_FORMAT()
4873 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_GRAS_2D_SRC_INFO_TILE_MODE()  argument
4875 	return ((val) << A5XX_GRAS_2D_SRC_INFO_TILE_MODE__SHIFT) & A5XX_GRAS_2D_SRC_INFO_TILE_MODE__MASK;  in A5XX_GRAS_2D_SRC_INFO_TILE_MODE()
4879 static inline uint32_t A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP()  argument
4881 	return ((val) << A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP__MASK;  in A5XX_GRAS_2D_SRC_INFO_COLOR_SWAP()
4888 static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT(enum a5xx_color_fmt val)  in A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT()  argument
4890 …return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT__…  in A5XX_GRAS_2D_DST_INFO_COLOR_FORMAT()
4894 static inline uint32_t A5XX_GRAS_2D_DST_INFO_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_GRAS_2D_DST_INFO_TILE_MODE()  argument
4896 	return ((val) << A5XX_GRAS_2D_DST_INFO_TILE_MODE__SHIFT) & A5XX_GRAS_2D_DST_INFO_TILE_MODE__MASK;  in A5XX_GRAS_2D_DST_INFO_TILE_MODE()
4900 static inline uint32_t A5XX_GRAS_2D_DST_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A5XX_GRAS_2D_DST_INFO_COLOR_SWAP()  argument
4902 	return ((val) << A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__SHIFT) & A5XX_GRAS_2D_DST_INFO_COLOR_SWAP__MASK;  in A5XX_GRAS_2D_DST_INFO_COLOR_SWAP()
4916 static inline uint32_t A5XX_TEX_SAMP_0_XY_MAG(enum a5xx_tex_filter val)  in A5XX_TEX_SAMP_0_XY_MAG()  argument
4918 	return ((val) << A5XX_TEX_SAMP_0_XY_MAG__SHIFT) & A5XX_TEX_SAMP_0_XY_MAG__MASK;  in A5XX_TEX_SAMP_0_XY_MAG()
4922 static inline uint32_t A5XX_TEX_SAMP_0_XY_MIN(enum a5xx_tex_filter val)  in A5XX_TEX_SAMP_0_XY_MIN()  argument
4924 	return ((val) << A5XX_TEX_SAMP_0_XY_MIN__SHIFT) & A5XX_TEX_SAMP_0_XY_MIN__MASK;  in A5XX_TEX_SAMP_0_XY_MIN()
4928 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_S(enum a5xx_tex_clamp val)  in A5XX_TEX_SAMP_0_WRAP_S()  argument
4930 	return ((val) << A5XX_TEX_SAMP_0_WRAP_S__SHIFT) & A5XX_TEX_SAMP_0_WRAP_S__MASK;  in A5XX_TEX_SAMP_0_WRAP_S()
4934 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_T(enum a5xx_tex_clamp val)  in A5XX_TEX_SAMP_0_WRAP_T()  argument
4936 	return ((val) << A5XX_TEX_SAMP_0_WRAP_T__SHIFT) & A5XX_TEX_SAMP_0_WRAP_T__MASK;  in A5XX_TEX_SAMP_0_WRAP_T()
4940 static inline uint32_t A5XX_TEX_SAMP_0_WRAP_R(enum a5xx_tex_clamp val)  in A5XX_TEX_SAMP_0_WRAP_R()  argument
4942 	return ((val) << A5XX_TEX_SAMP_0_WRAP_R__SHIFT) & A5XX_TEX_SAMP_0_WRAP_R__MASK;  in A5XX_TEX_SAMP_0_WRAP_R()
4946 static inline uint32_t A5XX_TEX_SAMP_0_ANISO(enum a5xx_tex_aniso val)  in A5XX_TEX_SAMP_0_ANISO()  argument
4948 	return ((val) << A5XX_TEX_SAMP_0_ANISO__SHIFT) & A5XX_TEX_SAMP_0_ANISO__MASK;  in A5XX_TEX_SAMP_0_ANISO()
4952 static inline uint32_t A5XX_TEX_SAMP_0_LOD_BIAS(float val)  in A5XX_TEX_SAMP_0_LOD_BIAS()  argument
4954 …return ((((int32_t)(val * 256.0))) << A5XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A5XX_TEX_SAMP_0_LOD_BIAS_…  in A5XX_TEX_SAMP_0_LOD_BIAS()
4960 static inline uint32_t A5XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val)  in A5XX_TEX_SAMP_1_COMPARE_FUNC()  argument
4962 	return ((val) << A5XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A5XX_TEX_SAMP_1_COMPARE_FUNC__MASK;  in A5XX_TEX_SAMP_1_COMPARE_FUNC()
4969 static inline uint32_t A5XX_TEX_SAMP_1_MAX_LOD(float val)  in A5XX_TEX_SAMP_1_MAX_LOD()  argument
4971 …return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A5XX_TEX_SAMP_1_MAX_LOD__…  in A5XX_TEX_SAMP_1_MAX_LOD()
4975 static inline uint32_t A5XX_TEX_SAMP_1_MIN_LOD(float val)  in A5XX_TEX_SAMP_1_MIN_LOD()  argument
4977 …return ((((uint32_t)(val * 256.0))) << A5XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A5XX_TEX_SAMP_1_MIN_LOD__…  in A5XX_TEX_SAMP_1_MIN_LOD()
4983 static inline uint32_t A5XX_TEX_SAMP_2_BCOLOR_OFFSET(uint32_t val)  in A5XX_TEX_SAMP_2_BCOLOR_OFFSET()  argument
4985 	return ((val) << A5XX_TEX_SAMP_2_BCOLOR_OFFSET__SHIFT) & A5XX_TEX_SAMP_2_BCOLOR_OFFSET__MASK;  in A5XX_TEX_SAMP_2_BCOLOR_OFFSET()
4993 static inline uint32_t A5XX_TEX_CONST_0_TILE_MODE(enum a5xx_tile_mode val)  in A5XX_TEX_CONST_0_TILE_MODE()  argument
4995 	return ((val) << A5XX_TEX_CONST_0_TILE_MODE__SHIFT) & A5XX_TEX_CONST_0_TILE_MODE__MASK;  in A5XX_TEX_CONST_0_TILE_MODE()
5000 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_X(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_X()  argument
5002 	return ((val) << A5XX_TEX_CONST_0_SWIZ_X__SHIFT) & A5XX_TEX_CONST_0_SWIZ_X__MASK;  in A5XX_TEX_CONST_0_SWIZ_X()
5006 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Y(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_Y()  argument
5008 	return ((val) << A5XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Y__MASK;  in A5XX_TEX_CONST_0_SWIZ_Y()
5012 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_Z(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_Z()  argument
5014 	return ((val) << A5XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A5XX_TEX_CONST_0_SWIZ_Z__MASK;  in A5XX_TEX_CONST_0_SWIZ_Z()
5018 static inline uint32_t A5XX_TEX_CONST_0_SWIZ_W(enum a5xx_tex_swiz val)  in A5XX_TEX_CONST_0_SWIZ_W()  argument
5020 	return ((val) << A5XX_TEX_CONST_0_SWIZ_W__SHIFT) & A5XX_TEX_CONST_0_SWIZ_W__MASK;  in A5XX_TEX_CONST_0_SWIZ_W()
5024 static inline uint32_t A5XX_TEX_CONST_0_MIPLVLS(uint32_t val)  in A5XX_TEX_CONST_0_MIPLVLS()  argument
5026 	return ((val) << A5XX_TEX_CONST_0_MIPLVLS__SHIFT) & A5XX_TEX_CONST_0_MIPLVLS__MASK;  in A5XX_TEX_CONST_0_MIPLVLS()
5030 static inline uint32_t A5XX_TEX_CONST_0_SAMPLES(enum a3xx_msaa_samples val)  in A5XX_TEX_CONST_0_SAMPLES()  argument
5032 	return ((val) << A5XX_TEX_CONST_0_SAMPLES__SHIFT) & A5XX_TEX_CONST_0_SAMPLES__MASK;  in A5XX_TEX_CONST_0_SAMPLES()
5036 static inline uint32_t A5XX_TEX_CONST_0_FMT(enum a5xx_tex_fmt val)  in A5XX_TEX_CONST_0_FMT()  argument
5038 	return ((val) << A5XX_TEX_CONST_0_FMT__SHIFT) & A5XX_TEX_CONST_0_FMT__MASK;  in A5XX_TEX_CONST_0_FMT()
5042 static inline uint32_t A5XX_TEX_CONST_0_SWAP(enum a3xx_color_swap val)  in A5XX_TEX_CONST_0_SWAP()  argument
5044 	return ((val) << A5XX_TEX_CONST_0_SWAP__SHIFT) & A5XX_TEX_CONST_0_SWAP__MASK;  in A5XX_TEX_CONST_0_SWAP()
5050 static inline uint32_t A5XX_TEX_CONST_1_WIDTH(uint32_t val)  in A5XX_TEX_CONST_1_WIDTH()  argument
5052 	return ((val) << A5XX_TEX_CONST_1_WIDTH__SHIFT) & A5XX_TEX_CONST_1_WIDTH__MASK;  in A5XX_TEX_CONST_1_WIDTH()
5056 static inline uint32_t A5XX_TEX_CONST_1_HEIGHT(uint32_t val)  in A5XX_TEX_CONST_1_HEIGHT()  argument
5058 	return ((val) << A5XX_TEX_CONST_1_HEIGHT__SHIFT) & A5XX_TEX_CONST_1_HEIGHT__MASK;  in A5XX_TEX_CONST_1_HEIGHT()
5064 static inline uint32_t A5XX_TEX_CONST_2_FETCHSIZE(enum a5xx_tex_fetchsize val)  in A5XX_TEX_CONST_2_FETCHSIZE()  argument
5066 	return ((val) << A5XX_TEX_CONST_2_FETCHSIZE__SHIFT) & A5XX_TEX_CONST_2_FETCHSIZE__MASK;  in A5XX_TEX_CONST_2_FETCHSIZE()
5070 static inline uint32_t A5XX_TEX_CONST_2_PITCH(uint32_t val)  in A5XX_TEX_CONST_2_PITCH()  argument
5072 	return ((val) << A5XX_TEX_CONST_2_PITCH__SHIFT) & A5XX_TEX_CONST_2_PITCH__MASK;  in A5XX_TEX_CONST_2_PITCH()
5076 static inline uint32_t A5XX_TEX_CONST_2_TYPE(enum a5xx_tex_type val)  in A5XX_TEX_CONST_2_TYPE()  argument
5078 	return ((val) << A5XX_TEX_CONST_2_TYPE__SHIFT) & A5XX_TEX_CONST_2_TYPE__MASK;  in A5XX_TEX_CONST_2_TYPE()
5084 static inline uint32_t A5XX_TEX_CONST_3_ARRAY_PITCH(uint32_t val)  in A5XX_TEX_CONST_3_ARRAY_PITCH()  argument
5086 	return ((val >> 12) << A5XX_TEX_CONST_3_ARRAY_PITCH__SHIFT) & A5XX_TEX_CONST_3_ARRAY_PITCH__MASK;  in A5XX_TEX_CONST_3_ARRAY_PITCH()
5093 static inline uint32_t A5XX_TEX_CONST_4_BASE_LO(uint32_t val)  in A5XX_TEX_CONST_4_BASE_LO()  argument
5095 	return ((val >> 5) << A5XX_TEX_CONST_4_BASE_LO__SHIFT) & A5XX_TEX_CONST_4_BASE_LO__MASK;  in A5XX_TEX_CONST_4_BASE_LO()
5101 static inline uint32_t A5XX_TEX_CONST_5_BASE_HI(uint32_t val)  in A5XX_TEX_CONST_5_BASE_HI()  argument
5103 	return ((val) << A5XX_TEX_CONST_5_BASE_HI__SHIFT) & A5XX_TEX_CONST_5_BASE_HI__MASK;  in A5XX_TEX_CONST_5_BASE_HI()
5107 static inline uint32_t A5XX_TEX_CONST_5_DEPTH(uint32_t val)  in A5XX_TEX_CONST_5_DEPTH()  argument
5109 	return ((val) << A5XX_TEX_CONST_5_DEPTH__SHIFT) & A5XX_TEX_CONST_5_DEPTH__MASK;  in A5XX_TEX_CONST_5_DEPTH()
5127 static inline uint32_t A5XX_SSBO_0_0_BASE_LO(uint32_t val)  in A5XX_SSBO_0_0_BASE_LO()  argument
5129 	return ((val >> 5) << A5XX_SSBO_0_0_BASE_LO__SHIFT) & A5XX_SSBO_0_0_BASE_LO__MASK;  in A5XX_SSBO_0_0_BASE_LO()
5135 static inline uint32_t A5XX_SSBO_0_1_PITCH(uint32_t val)  in A5XX_SSBO_0_1_PITCH()  argument
5137 	return ((val) << A5XX_SSBO_0_1_PITCH__SHIFT) & A5XX_SSBO_0_1_PITCH__MASK;  in A5XX_SSBO_0_1_PITCH()
5143 static inline uint32_t A5XX_SSBO_0_2_ARRAY_PITCH(uint32_t val)  in A5XX_SSBO_0_2_ARRAY_PITCH()  argument
5145 	return ((val >> 12) << A5XX_SSBO_0_2_ARRAY_PITCH__SHIFT) & A5XX_SSBO_0_2_ARRAY_PITCH__MASK;  in A5XX_SSBO_0_2_ARRAY_PITCH()
5151 static inline uint32_t A5XX_SSBO_0_3_CPP(uint32_t val)  in A5XX_SSBO_0_3_CPP()  argument
5153 	return ((val) << A5XX_SSBO_0_3_CPP__SHIFT) & A5XX_SSBO_0_3_CPP__MASK;  in A5XX_SSBO_0_3_CPP()
5159 static inline uint32_t A5XX_SSBO_1_0_FMT(enum a5xx_tex_fmt val)  in A5XX_SSBO_1_0_FMT()  argument
5161 	return ((val) << A5XX_SSBO_1_0_FMT__SHIFT) & A5XX_SSBO_1_0_FMT__MASK;  in A5XX_SSBO_1_0_FMT()
5165 static inline uint32_t A5XX_SSBO_1_0_WIDTH(uint32_t val)  in A5XX_SSBO_1_0_WIDTH()  argument
5167 	return ((val) << A5XX_SSBO_1_0_WIDTH__SHIFT) & A5XX_SSBO_1_0_WIDTH__MASK;  in A5XX_SSBO_1_0_WIDTH()
5173 static inline uint32_t A5XX_SSBO_1_1_HEIGHT(uint32_t val)  in A5XX_SSBO_1_1_HEIGHT()  argument
5175 	return ((val) << A5XX_SSBO_1_1_HEIGHT__SHIFT) & A5XX_SSBO_1_1_HEIGHT__MASK;  in A5XX_SSBO_1_1_HEIGHT()
5179 static inline uint32_t A5XX_SSBO_1_1_DEPTH(uint32_t val)  in A5XX_SSBO_1_1_DEPTH()  argument
5181 	return ((val) << A5XX_SSBO_1_1_DEPTH__SHIFT) & A5XX_SSBO_1_1_DEPTH__MASK;  in A5XX_SSBO_1_1_DEPTH()
5187 static inline uint32_t A5XX_SSBO_2_0_BASE_LO(uint32_t val)  in A5XX_SSBO_2_0_BASE_LO()  argument
5189 	return ((val) << A5XX_SSBO_2_0_BASE_LO__SHIFT) & A5XX_SSBO_2_0_BASE_LO__MASK;  in A5XX_SSBO_2_0_BASE_LO()
5195 static inline uint32_t A5XX_SSBO_2_1_BASE_HI(uint32_t val)  in A5XX_SSBO_2_1_BASE_HI()  argument
5197 	return ((val) << A5XX_SSBO_2_1_BASE_HI__SHIFT) & A5XX_SSBO_2_1_BASE_HI__MASK;  in A5XX_SSBO_2_1_BASE_HI()