847 static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val)  in A4XX_CGC_HLSQ_EARLY_CYC()  argument
849 	return ((val) << A4XX_CGC_HLSQ_EARLY_CYC__SHIFT) & A4XX_CGC_HLSQ_EARLY_CYC__MASK;  in A4XX_CGC_HLSQ_EARLY_CYC()
904 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()  argument
906 …return ((val) << A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT) & A4XX_RB_FRAME_BUFFER_DIMENSION_WID…  in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
910 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()  argument
912 …return ((val) << A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT) & A4XX_RB_FRAME_BUFFER_DIMENSION_HE…  in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
926 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val)  in A4XX_RB_MODE_CONTROL_WIDTH()  argument
928 	return ((val >> 5) << A4XX_RB_MODE_CONTROL_WIDTH__SHIFT) & A4XX_RB_MODE_CONTROL_WIDTH__MASK;  in A4XX_RB_MODE_CONTROL_WIDTH()
932 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val)  in A4XX_RB_MODE_CONTROL_HEIGHT()  argument
934 	return ((val >> 5) << A4XX_RB_MODE_CONTROL_HEIGHT__SHIFT) & A4XX_RB_MODE_CONTROL_HEIGHT__MASK;  in A4XX_RB_MODE_CONTROL_HEIGHT()
946 static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val)  in A4XX_RB_MSAA_CONTROL_SAMPLES()  argument
948 	return ((val) << A4XX_RB_MSAA_CONTROL_SAMPLES__SHIFT) & A4XX_RB_MSAA_CONTROL_SAMPLES__MASK;  in A4XX_RB_MSAA_CONTROL_SAMPLES()
961 static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val)  in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()  argument
963 …return ((val) << A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES__SHIFT) & A4XX_RB_RENDER_CONTROL2_MSAA_SAMPL…  in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()
977 static inline uint32_t A4XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val)  in A4XX_RB_MRT_CONTROL_ROP_CODE()  argument
979 	return ((val) << A4XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) & A4XX_RB_MRT_CONTROL_ROP_CODE__MASK;  in A4XX_RB_MRT_CONTROL_ROP_CODE()
983 static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()  argument
985 …return ((val) << A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A4XX_RB_MRT_CONTROL_COMPONENT_ENAB…  in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
991 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()  argument
993 …return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA…  in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
997 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a4xx_tile_mode val)  in A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()  argument
999 …return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MO…  in A4XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
1003 static inline uint32_t A4XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_MRT_BUF_INFO_DITHER_MODE()  argument
1005 	return ((val) << A4XX_RB_MRT_BUF_INFO_DITHER_MODE__SHIFT) & A4XX_RB_MRT_BUF_INFO_DITHER_MODE__MASK;  in A4XX_RB_MRT_BUF_INFO_DITHER_MODE()
1009 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A4XX_RB_MRT_BUF_INFO_COLOR_SWAP()  argument
1011 	return ((val) << A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK;  in A4XX_RB_MRT_BUF_INFO_COLOR_SWAP()
1016 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val)  in A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()  argument
1018 …return ((val >> 4) << A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) & A4XX_RB_MRT_BUF_INFO_COLOR_BU…  in A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()
1026 static inline uint32_t A4XX_RB_MRT_CONTROL3_STRIDE(uint32_t val)  in A4XX_RB_MRT_CONTROL3_STRIDE()  argument
1028 	return ((val) << A4XX_RB_MRT_CONTROL3_STRIDE__SHIFT) & A4XX_RB_MRT_CONTROL3_STRIDE__MASK;  in A4XX_RB_MRT_CONTROL3_STRIDE()
1034 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()  argument
1036 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RGB_…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
1040 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()  argument
1042 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RG…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
1046 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()  argument
1048 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_RGB…  in A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
1052 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()  argument
1054 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_AL…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
1058 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()  argument
1060 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
1064 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()  argument
1066 …return ((val) << A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A4XX_RB_MRT_BLEND_CONTROL_A…  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
1072 static inline uint32_t A4XX_RB_BLEND_RED_UINT(uint32_t val)  in A4XX_RB_BLEND_RED_UINT()  argument
1074 	return ((val) << A4XX_RB_BLEND_RED_UINT__SHIFT) & A4XX_RB_BLEND_RED_UINT__MASK;  in A4XX_RB_BLEND_RED_UINT()
1078 static inline uint32_t A4XX_RB_BLEND_RED_SINT(uint32_t val)  in A4XX_RB_BLEND_RED_SINT()  argument
1080 	return ((val) << A4XX_RB_BLEND_RED_SINT__SHIFT) & A4XX_RB_BLEND_RED_SINT__MASK;  in A4XX_RB_BLEND_RED_SINT()
1084 static inline uint32_t A4XX_RB_BLEND_RED_FLOAT(float val)  in A4XX_RB_BLEND_RED_FLOAT()  argument
1086 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_RED_FLOAT__SHIFT) & A4XX_RB_BLEND_RED_FLOAT__MA…  in A4XX_RB_BLEND_RED_FLOAT()
1092 static inline uint32_t A4XX_RB_BLEND_RED_F32(float val)  in A4XX_RB_BLEND_RED_F32()  argument
1094 	return ((fui(val)) << A4XX_RB_BLEND_RED_F32__SHIFT) & A4XX_RB_BLEND_RED_F32__MASK;  in A4XX_RB_BLEND_RED_F32()
1100 static inline uint32_t A4XX_RB_BLEND_GREEN_UINT(uint32_t val)  in A4XX_RB_BLEND_GREEN_UINT()  argument
1102 	return ((val) << A4XX_RB_BLEND_GREEN_UINT__SHIFT) & A4XX_RB_BLEND_GREEN_UINT__MASK;  in A4XX_RB_BLEND_GREEN_UINT()
1106 static inline uint32_t A4XX_RB_BLEND_GREEN_SINT(uint32_t val)  in A4XX_RB_BLEND_GREEN_SINT()  argument
1108 	return ((val) << A4XX_RB_BLEND_GREEN_SINT__SHIFT) & A4XX_RB_BLEND_GREEN_SINT__MASK;  in A4XX_RB_BLEND_GREEN_SINT()
1112 static inline uint32_t A4XX_RB_BLEND_GREEN_FLOAT(float val)  in A4XX_RB_BLEND_GREEN_FLOAT()  argument
1114 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A4XX_RB_BLEND_GREEN_FLOAT…  in A4XX_RB_BLEND_GREEN_FLOAT()
1120 static inline uint32_t A4XX_RB_BLEND_GREEN_F32(float val)  in A4XX_RB_BLEND_GREEN_F32()  argument
1122 	return ((fui(val)) << A4XX_RB_BLEND_GREEN_F32__SHIFT) & A4XX_RB_BLEND_GREEN_F32__MASK;  in A4XX_RB_BLEND_GREEN_F32()
1128 static inline uint32_t A4XX_RB_BLEND_BLUE_UINT(uint32_t val)  in A4XX_RB_BLEND_BLUE_UINT()  argument
1130 	return ((val) << A4XX_RB_BLEND_BLUE_UINT__SHIFT) & A4XX_RB_BLEND_BLUE_UINT__MASK;  in A4XX_RB_BLEND_BLUE_UINT()
1134 static inline uint32_t A4XX_RB_BLEND_BLUE_SINT(uint32_t val)  in A4XX_RB_BLEND_BLUE_SINT()  argument
1136 	return ((val) << A4XX_RB_BLEND_BLUE_SINT__SHIFT) & A4XX_RB_BLEND_BLUE_SINT__MASK;  in A4XX_RB_BLEND_BLUE_SINT()
1140 static inline uint32_t A4XX_RB_BLEND_BLUE_FLOAT(float val)  in A4XX_RB_BLEND_BLUE_FLOAT()  argument
1142 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A4XX_RB_BLEND_BLUE_FLOAT__…  in A4XX_RB_BLEND_BLUE_FLOAT()
1148 static inline uint32_t A4XX_RB_BLEND_BLUE_F32(float val)  in A4XX_RB_BLEND_BLUE_F32()  argument
1150 	return ((fui(val)) << A4XX_RB_BLEND_BLUE_F32__SHIFT) & A4XX_RB_BLEND_BLUE_F32__MASK;  in A4XX_RB_BLEND_BLUE_F32()
1156 static inline uint32_t A4XX_RB_BLEND_ALPHA_UINT(uint32_t val)  in A4XX_RB_BLEND_ALPHA_UINT()  argument
1158 	return ((val) << A4XX_RB_BLEND_ALPHA_UINT__SHIFT) & A4XX_RB_BLEND_ALPHA_UINT__MASK;  in A4XX_RB_BLEND_ALPHA_UINT()
1162 static inline uint32_t A4XX_RB_BLEND_ALPHA_SINT(uint32_t val)  in A4XX_RB_BLEND_ALPHA_SINT()  argument
1164 	return ((val) << A4XX_RB_BLEND_ALPHA_SINT__SHIFT) & A4XX_RB_BLEND_ALPHA_SINT__MASK;  in A4XX_RB_BLEND_ALPHA_SINT()
1168 static inline uint32_t A4XX_RB_BLEND_ALPHA_FLOAT(float val)  in A4XX_RB_BLEND_ALPHA_FLOAT()  argument
1170 …return ((util_float_to_half(val)) << A4XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A4XX_RB_BLEND_ALPHA_FLOAT…  in A4XX_RB_BLEND_ALPHA_FLOAT()
1176 static inline uint32_t A4XX_RB_BLEND_ALPHA_F32(float val)  in A4XX_RB_BLEND_ALPHA_F32()  argument
1178 	return ((fui(val)) << A4XX_RB_BLEND_ALPHA_F32__SHIFT) & A4XX_RB_BLEND_ALPHA_F32__MASK;  in A4XX_RB_BLEND_ALPHA_F32()
1184 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_REF()  argument
1186 	return ((val) << A4XX_RB_ALPHA_CONTROL_ALPHA_REF__SHIFT) & A4XX_RB_ALPHA_CONTROL_ALPHA_REF__MASK;  in A4XX_RB_ALPHA_CONTROL_ALPHA_REF()
1191 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()  argument
1193 …return ((val) << A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_…  in A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()
1199 static inline uint32_t A4XX_RB_FS_OUTPUT_ENABLE_BLEND(uint32_t val)  in A4XX_RB_FS_OUTPUT_ENABLE_BLEND()  argument
1201 	return ((val) << A4XX_RB_FS_OUTPUT_ENABLE_BLEND__SHIFT) & A4XX_RB_FS_OUTPUT_ENABLE_BLEND__MASK;  in A4XX_RB_FS_OUTPUT_ENABLE_BLEND()
1206 static inline uint32_t A4XX_RB_FS_OUTPUT_SAMPLE_MASK(uint32_t val)  in A4XX_RB_FS_OUTPUT_SAMPLE_MASK()  argument
1208 	return ((val) << A4XX_RB_FS_OUTPUT_SAMPLE_MASK__SHIFT) & A4XX_RB_FS_OUTPUT_SAMPLE_MASK__MASK;  in A4XX_RB_FS_OUTPUT_SAMPLE_MASK()
1215 static inline uint32_t A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR(uint32_t val)  in A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR()  argument
1217 …return ((val >> 2) << A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR__SHIFT) & A4XX_RB_SAMPLE_COUNT_CONTROL_ADD…  in A4XX_RB_SAMPLE_COUNT_CONTROL_ADDR()
1223 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT0(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT0()  argument
1225 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT0__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT0__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT0()
1229 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT1(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT1()  argument
1231 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT1__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT1__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT1()
1235 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT2(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT2()  argument
1237 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT2__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT2__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT2()
1241 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT3(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT3()  argument
1243 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT3__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT3__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT3()
1247 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT4(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT4()  argument
1249 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT4__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT4__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT4()
1253 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT5(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT5()  argument
1255 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT5__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT5__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT5()
1259 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT6(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT6()  argument
1261 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT6__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT6__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT6()
1265 static inline uint32_t A4XX_RB_RENDER_COMPONENTS_RT7(uint32_t val)  in A4XX_RB_RENDER_COMPONENTS_RT7()  argument
1267 	return ((val) << A4XX_RB_RENDER_COMPONENTS_RT7__SHIFT) & A4XX_RB_RENDER_COMPONENTS_RT7__MASK;  in A4XX_RB_RENDER_COMPONENTS_RT7()
1273 static inline uint32_t A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val)  in A4XX_RB_COPY_CONTROL_MSAA_RESOLVE()  argument
1275 …return ((val) << A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT) & A4XX_RB_COPY_CONTROL_MSAA_RESOLVE__MA…  in A4XX_RB_COPY_CONTROL_MSAA_RESOLVE()
1279 static inline uint32_t A4XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val)  in A4XX_RB_COPY_CONTROL_MODE()  argument
1281 	return ((val) << A4XX_RB_COPY_CONTROL_MODE__SHIFT) & A4XX_RB_COPY_CONTROL_MODE__MASK;  in A4XX_RB_COPY_CONTROL_MODE()
1285 static inline uint32_t A4XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val)  in A4XX_RB_COPY_CONTROL_FASTCLEAR()  argument
1287 	return ((val) << A4XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) & A4XX_RB_COPY_CONTROL_FASTCLEAR__MASK;  in A4XX_RB_COPY_CONTROL_FASTCLEAR()
1291 static inline uint32_t A4XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val)  in A4XX_RB_COPY_CONTROL_GMEM_BASE()  argument
1293 …return ((val >> 14) << A4XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) & A4XX_RB_COPY_CONTROL_GMEM_BASE__MA…  in A4XX_RB_COPY_CONTROL_GMEM_BASE()
1299 static inline uint32_t A4XX_RB_COPY_DEST_BASE_BASE(uint32_t val)  in A4XX_RB_COPY_DEST_BASE_BASE()  argument
1301 	return ((val >> 5) << A4XX_RB_COPY_DEST_BASE_BASE__SHIFT) & A4XX_RB_COPY_DEST_BASE_BASE__MASK;  in A4XX_RB_COPY_DEST_BASE_BASE()
1307 static inline uint32_t A4XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val)  in A4XX_RB_COPY_DEST_PITCH_PITCH()  argument
1309 	return ((val >> 5) << A4XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) & A4XX_RB_COPY_DEST_PITCH_PITCH__MASK;  in A4XX_RB_COPY_DEST_PITCH_PITCH()
1315 static inline uint32_t A4XX_RB_COPY_DEST_INFO_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_COPY_DEST_INFO_FORMAT()  argument
1317 	return ((val) << A4XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) & A4XX_RB_COPY_DEST_INFO_FORMAT__MASK;  in A4XX_RB_COPY_DEST_INFO_FORMAT()
1321 static inline uint32_t A4XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val)  in A4XX_RB_COPY_DEST_INFO_SWAP()  argument
1323 	return ((val) << A4XX_RB_COPY_DEST_INFO_SWAP__SHIFT) & A4XX_RB_COPY_DEST_INFO_SWAP__MASK;  in A4XX_RB_COPY_DEST_INFO_SWAP()
1327 static inline uint32_t A4XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_COPY_DEST_INFO_DITHER_MODE()  argument
1329 …return ((val) << A4XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) & A4XX_RB_COPY_DEST_INFO_DITHER_MODE__…  in A4XX_RB_COPY_DEST_INFO_DITHER_MODE()
1333 static inline uint32_t A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()  argument
1335 …return ((val) << A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT) & A4XX_RB_COPY_DEST_INFO_COMPONEN…  in A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()
1339 static inline uint32_t A4XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val)  in A4XX_RB_COPY_DEST_INFO_ENDIAN()  argument
1341 	return ((val) << A4XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT) & A4XX_RB_COPY_DEST_INFO_ENDIAN__MASK;  in A4XX_RB_COPY_DEST_INFO_ENDIAN()
1345 static inline uint32_t A4XX_RB_COPY_DEST_INFO_TILE(enum a4xx_tile_mode val)  in A4XX_RB_COPY_DEST_INFO_TILE()  argument
1347 	return ((val) << A4XX_RB_COPY_DEST_INFO_TILE__SHIFT) & A4XX_RB_COPY_DEST_INFO_TILE__MASK;  in A4XX_RB_COPY_DEST_INFO_TILE()
1353 static inline uint32_t A4XX_RB_FS_OUTPUT_REG_MRT(uint32_t val)  in A4XX_RB_FS_OUTPUT_REG_MRT()  argument
1355 	return ((val) << A4XX_RB_FS_OUTPUT_REG_MRT__SHIFT) & A4XX_RB_FS_OUTPUT_REG_MRT__MASK;  in A4XX_RB_FS_OUTPUT_REG_MRT()
1365 static inline uint32_t A4XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val)  in A4XX_RB_DEPTH_CONTROL_ZFUNC()  argument
1367 	return ((val) << A4XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT) & A4XX_RB_DEPTH_CONTROL_ZFUNC__MASK;  in A4XX_RB_DEPTH_CONTROL_ZFUNC()
1379 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum a4xx_depth_format val)  in A4XX_RB_DEPTH_INFO_DEPTH_FORMAT()  argument
1381 	return ((val) << A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) & A4XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK;  in A4XX_RB_DEPTH_INFO_DEPTH_FORMAT()
1385 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)  in A4XX_RB_DEPTH_INFO_DEPTH_BASE()  argument
1387 	return ((val >> 12) << A4XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A4XX_RB_DEPTH_INFO_DEPTH_BASE__MASK;  in A4XX_RB_DEPTH_INFO_DEPTH_BASE()
1393 static inline uint32_t A4XX_RB_DEPTH_PITCH(uint32_t val)  in A4XX_RB_DEPTH_PITCH()  argument
1395 	return ((val >> 5) << A4XX_RB_DEPTH_PITCH__SHIFT) & A4XX_RB_DEPTH_PITCH__MASK;  in A4XX_RB_DEPTH_PITCH()
1401 static inline uint32_t A4XX_RB_DEPTH_PITCH2(uint32_t val)  in A4XX_RB_DEPTH_PITCH2()  argument
1403 	return ((val >> 5) << A4XX_RB_DEPTH_PITCH2__SHIFT) & A4XX_RB_DEPTH_PITCH2__MASK;  in A4XX_RB_DEPTH_PITCH2()
1412 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC()  argument
1414 	return ((val) << A4XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A4XX_RB_STENCIL_CONTROL_FUNC__MASK;  in A4XX_RB_STENCIL_CONTROL_FUNC()
1418 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL()  argument
1420 	return ((val) << A4XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A4XX_RB_STENCIL_CONTROL_FAIL__MASK;  in A4XX_RB_STENCIL_CONTROL_FAIL()
1424 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS()  argument
1426 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZPASS__MASK;  in A4XX_RB_STENCIL_CONTROL_ZPASS()
1430 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL()  argument
1432 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZFAIL__MASK;  in A4XX_RB_STENCIL_CONTROL_ZFAIL()
1436 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC_BF()  argument
1438 	return ((val) << A4XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_FUNC_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_FUNC_BF()
1442 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL_BF()  argument
1444 	return ((val) << A4XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_FAIL_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_FAIL_BF()
1448 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS_BF()  argument
1450 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_ZPASS_BF()
1454 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL_BF()  argument
1456 	return ((val) << A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A4XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK;  in A4XX_RB_STENCIL_CONTROL_ZFAIL_BF()
1466 static inline uint32_t A4XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val)  in A4XX_RB_STENCIL_INFO_STENCIL_BASE()  argument
1468 …return ((val >> 12) << A4XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) & A4XX_RB_STENCIL_INFO_STENCIL_BA…  in A4XX_RB_STENCIL_INFO_STENCIL_BASE()
1474 static inline uint32_t A4XX_RB_STENCIL_PITCH(uint32_t val)  in A4XX_RB_STENCIL_PITCH()  argument
1476 	return ((val >> 5) << A4XX_RB_STENCIL_PITCH__SHIFT) & A4XX_RB_STENCIL_PITCH__MASK;  in A4XX_RB_STENCIL_PITCH()
1482 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILREF()  argument
1484 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILREF__MA…  in A4XX_RB_STENCILREFMASK_STENCILREF()
1488 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILMASK()  argument
1490 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILMASK__…  in A4XX_RB_STENCILREFMASK_STENCILMASK()
1494 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILWRITEMASK()  argument
1496 …return ((val) << A4XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A4XX_RB_STENCILREFMASK_STENCILW…  in A4XX_RB_STENCILREFMASK_STENCILWRITEMASK()
1502 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILREF()  argument
1504 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A4XX_RB_STENCILREFMASK_BF_STENCILR…  in A4XX_RB_STENCILREFMASK_BF_STENCILREF()
1508 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILMASK()  argument
1510 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A4XX_RB_STENCILREFMASK_BF_STENCIL…  in A4XX_RB_STENCILREFMASK_BF_STENCILMASK()
1514 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()  argument
1516 …return ((val) << A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A4XX_RB_STENCILREFMASK_BF_ST…  in A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
1523 static inline uint32_t A4XX_RB_BIN_OFFSET_X(uint32_t val)  in A4XX_RB_BIN_OFFSET_X()  argument
1525 	return ((val) << A4XX_RB_BIN_OFFSET_X__SHIFT) & A4XX_RB_BIN_OFFSET_X__MASK;  in A4XX_RB_BIN_OFFSET_X()
1529 static inline uint32_t A4XX_RB_BIN_OFFSET_Y(uint32_t val)  in A4XX_RB_BIN_OFFSET_Y()  argument
1531 	return ((val) << A4XX_RB_BIN_OFFSET_Y__SHIFT) & A4XX_RB_BIN_OFFSET_Y__MASK;  in A4XX_RB_BIN_OFFSET_Y()
2203 static inline uint32_t A4XX_CP_PROTECT_REG_BASE_ADDR(uint32_t val)  in A4XX_CP_PROTECT_REG_BASE_ADDR()  argument
2205 	return ((val) << A4XX_CP_PROTECT_REG_BASE_ADDR__SHIFT) & A4XX_CP_PROTECT_REG_BASE_ADDR__MASK;  in A4XX_CP_PROTECT_REG_BASE_ADDR()
2209 static inline uint32_t A4XX_CP_PROTECT_REG_MASK_LEN(uint32_t val)  in A4XX_CP_PROTECT_REG_MASK_LEN()  argument
2211 	return ((val) << A4XX_CP_PROTECT_REG_MASK_LEN__SHIFT) & A4XX_CP_PROTECT_REG_MASK_LEN__MASK;  in A4XX_CP_PROTECT_REG_MASK_LEN()
2293 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_VS_CTRL_REG0_THREADMODE()  argument
2295 	return ((val) << A4XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT) & A4XX_SP_VS_CTRL_REG0_THREADMODE__MASK;  in A4XX_SP_VS_CTRL_REG0_THREADMODE()
2301 static inline uint32_t A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()  argument
2303 …return ((val) << A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_VS_CTRL_REG0_HALFREGFOOTP…  in A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
2307 static inline uint32_t A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()  argument
2309 …return ((val) << A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A4XX_SP_VS_CTRL_REG0_FULLREGFOOTP…  in A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
2313 static inline uint32_t A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP()  argument
2315 …return ((val) << A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) & A4XX_SP_VS_CTRL_REG0_INOUTREGOVERL…  in A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP()
2319 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_VS_CTRL_REG0_THREADSIZE()  argument
2321 	return ((val) << A4XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A4XX_SP_VS_CTRL_REG0_THREADSIZE__MASK;  in A4XX_SP_VS_CTRL_REG0_THREADSIZE()
2329 static inline uint32_t A4XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_CONSTLENGTH()  argument
2331 	return ((val) << A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT) & A4XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK;  in A4XX_SP_VS_CTRL_REG1_CONSTLENGTH()
2335 static inline uint32_t A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()  argument
2337 …return ((val) << A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) & A4XX_SP_VS_CTRL_REG1_INITIALOUT…  in A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()
2343 static inline uint32_t A4XX_SP_VS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_POSREGID()  argument
2345 	return ((val) << A4XX_SP_VS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_VS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_VS_PARAM_REG_POSREGID()
2349 static inline uint32_t A4XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_PSIZEREGID()  argument
2351 	return ((val) << A4XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT) & A4XX_SP_VS_PARAM_REG_PSIZEREGID__MASK;  in A4XX_SP_VS_PARAM_REG_PSIZEREGID()
2355 static inline uint32_t A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val)  in A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()  argument
2357 …return ((val) << A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT) & A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__…  in A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()
2365 static inline uint32_t A4XX_SP_VS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_REGID()  argument
2367 	return ((val) << A4XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_VS_OUT_REG_A_REGID__MASK;  in A4XX_SP_VS_OUT_REG_A_REGID()
2371 static inline uint32_t A4XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_COMPMASK()  argument
2373 	return ((val) << A4XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_VS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_VS_OUT_REG_A_COMPMASK()
2377 static inline uint32_t A4XX_SP_VS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_REGID()  argument
2379 	return ((val) << A4XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_VS_OUT_REG_B_REGID__MASK;  in A4XX_SP_VS_OUT_REG_B_REGID()
2383 static inline uint32_t A4XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_COMPMASK()  argument
2385 	return ((val) << A4XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_VS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_VS_OUT_REG_B_COMPMASK()
2393 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC0()  argument
2395 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC0()
2399 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC1()  argument
2401 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC1()
2405 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC2()  argument
2407 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC2()
2411 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC3()  argument
2413 	return ((val) << A4XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_VS_VPC_DST_REG_OUTLOC3()
2419 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2421 …return ((val) << A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_VS_OBJ_OFFSET_REG_C…  in A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2425 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2427 …return ((val) << A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_VS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2441 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_FS_CTRL_REG0_THREADMODE()  argument
2443 	return ((val) << A4XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT) & A4XX_SP_FS_CTRL_REG0_THREADMODE__MASK;  in A4XX_SP_FS_CTRL_REG0_THREADMODE()
2449 static inline uint32_t A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()  argument
2451 …return ((val) << A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A4XX_SP_FS_CTRL_REG0_HALFREGFOOTP…  in A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
2455 static inline uint32_t A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()  argument
2457 …return ((val) << A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A4XX_SP_FS_CTRL_REG0_FULLREGFOOTP…  in A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
2461 static inline uint32_t A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP()  argument
2463 …return ((val) << A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP__SHIFT) & A4XX_SP_FS_CTRL_REG0_INOUTREGOVERL…  in A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP()
2467 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_FS_CTRL_REG0_THREADSIZE()  argument
2469 	return ((val) << A4XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A4XX_SP_FS_CTRL_REG0_THREADSIZE__MASK;  in A4XX_SP_FS_CTRL_REG0_THREADSIZE()
2477 static inline uint32_t A4XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_FS_CTRL_REG1_CONSTLENGTH()  argument
2479 	return ((val) << A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT) & A4XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK;  in A4XX_SP_FS_CTRL_REG1_CONSTLENGTH()
2488 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2490 …return ((val) << A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_FS_OBJ_OFFSET_REG_C…  in A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2494 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2496 …return ((val) << A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_FS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2510 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_MRT(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_MRT()  argument
2512 	return ((val) << A4XX_SP_FS_OUTPUT_REG_MRT__SHIFT) & A4XX_SP_FS_OUTPUT_REG_MRT__MASK;  in A4XX_SP_FS_OUTPUT_REG_MRT()
2517 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID()  argument
2519 …return ((val) << A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT) & A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MA…  in A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID()
2523 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID()  argument
2525 …return ((val) << A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID__SHIFT) & A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK…  in A4XX_SP_FS_OUTPUT_REG_SAMPLEMASK_REGID()
2533 static inline uint32_t A4XX_SP_FS_MRT_REG_REGID(uint32_t val)  in A4XX_SP_FS_MRT_REG_REGID()  argument
2535 	return ((val) << A4XX_SP_FS_MRT_REG_REGID__SHIFT) & A4XX_SP_FS_MRT_REG_REGID__MASK;  in A4XX_SP_FS_MRT_REG_REGID()
2540 static inline uint32_t A4XX_SP_FS_MRT_REG_MRTFORMAT(enum a4xx_color_fmt val)  in A4XX_SP_FS_MRT_REG_MRTFORMAT()  argument
2542 	return ((val) << A4XX_SP_FS_MRT_REG_MRTFORMAT__SHIFT) & A4XX_SP_FS_MRT_REG_MRTFORMAT__MASK;  in A4XX_SP_FS_MRT_REG_MRTFORMAT()
2563 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2565 …return ((val) << A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_HS_OBJ_OFFSET_REG_C…  in A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2569 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2571 …return ((val) << A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_HS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2585 static inline uint32_t A4XX_SP_DS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_DS_PARAM_REG_POSREGID()  argument
2587 	return ((val) << A4XX_SP_DS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_DS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_DS_PARAM_REG_POSREGID()
2591 static inline uint32_t A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)  in A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR()  argument
2593 …return ((val) << A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__SHIFT) & A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR__…  in A4XX_SP_DS_PARAM_REG_TOTALGSOUTVAR()
2601 static inline uint32_t A4XX_SP_DS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_DS_OUT_REG_A_REGID()  argument
2603 	return ((val) << A4XX_SP_DS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_DS_OUT_REG_A_REGID__MASK;  in A4XX_SP_DS_OUT_REG_A_REGID()
2607 static inline uint32_t A4XX_SP_DS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_DS_OUT_REG_A_COMPMASK()  argument
2609 	return ((val) << A4XX_SP_DS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_DS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_DS_OUT_REG_A_COMPMASK()
2613 static inline uint32_t A4XX_SP_DS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_DS_OUT_REG_B_REGID()  argument
2615 	return ((val) << A4XX_SP_DS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_DS_OUT_REG_B_REGID__MASK;  in A4XX_SP_DS_OUT_REG_B_REGID()
2619 static inline uint32_t A4XX_SP_DS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_DS_OUT_REG_B_COMPMASK()  argument
2621 	return ((val) << A4XX_SP_DS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_DS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_DS_OUT_REG_B_COMPMASK()
2629 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC0()  argument
2631 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC0()
2635 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC1()  argument
2637 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC1()
2641 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC2()  argument
2643 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC2()
2647 static inline uint32_t A4XX_SP_DS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_DS_VPC_DST_REG_OUTLOC3()  argument
2649 	return ((val) << A4XX_SP_DS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_DS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_DS_VPC_DST_REG_OUTLOC3()
2655 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2657 …return ((val) << A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_DS_OBJ_OFFSET_REG_C…  in A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2661 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2663 …return ((val) << A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_DS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2677 static inline uint32_t A4XX_SP_GS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_GS_PARAM_REG_POSREGID()  argument
2679 	return ((val) << A4XX_SP_GS_PARAM_REG_POSREGID__SHIFT) & A4XX_SP_GS_PARAM_REG_POSREGID__MASK;  in A4XX_SP_GS_PARAM_REG_POSREGID()
2683 static inline uint32_t A4XX_SP_GS_PARAM_REG_PRIMREGID(uint32_t val)  in A4XX_SP_GS_PARAM_REG_PRIMREGID()  argument
2685 	return ((val) << A4XX_SP_GS_PARAM_REG_PRIMREGID__SHIFT) & A4XX_SP_GS_PARAM_REG_PRIMREGID__MASK;  in A4XX_SP_GS_PARAM_REG_PRIMREGID()
2689 static inline uint32_t A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR(uint32_t val)  in A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR()  argument
2691 …return ((val) << A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__SHIFT) & A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR__…  in A4XX_SP_GS_PARAM_REG_TOTALGSOUTVAR()
2699 static inline uint32_t A4XX_SP_GS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_GS_OUT_REG_A_REGID()  argument
2701 	return ((val) << A4XX_SP_GS_OUT_REG_A_REGID__SHIFT) & A4XX_SP_GS_OUT_REG_A_REGID__MASK;  in A4XX_SP_GS_OUT_REG_A_REGID()
2705 static inline uint32_t A4XX_SP_GS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_GS_OUT_REG_A_COMPMASK()  argument
2707 	return ((val) << A4XX_SP_GS_OUT_REG_A_COMPMASK__SHIFT) & A4XX_SP_GS_OUT_REG_A_COMPMASK__MASK;  in A4XX_SP_GS_OUT_REG_A_COMPMASK()
2711 static inline uint32_t A4XX_SP_GS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_GS_OUT_REG_B_REGID()  argument
2713 	return ((val) << A4XX_SP_GS_OUT_REG_B_REGID__SHIFT) & A4XX_SP_GS_OUT_REG_B_REGID__MASK;  in A4XX_SP_GS_OUT_REG_B_REGID()
2717 static inline uint32_t A4XX_SP_GS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_GS_OUT_REG_B_COMPMASK()  argument
2719 	return ((val) << A4XX_SP_GS_OUT_REG_B_COMPMASK__SHIFT) & A4XX_SP_GS_OUT_REG_B_COMPMASK__MASK;  in A4XX_SP_GS_OUT_REG_B_COMPMASK()
2727 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC0()  argument
2729 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC0__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC0__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC0()
2733 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC1()  argument
2735 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC1__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC1__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC1()
2739 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC2()  argument
2741 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC2__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC2__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC2()
2745 static inline uint32_t A4XX_SP_GS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_GS_VPC_DST_REG_OUTLOC3()  argument
2747 	return ((val) << A4XX_SP_GS_VPC_DST_REG_OUTLOC3__SHIFT) & A4XX_SP_GS_VPC_DST_REG_OUTLOC3__MASK;  in A4XX_SP_GS_VPC_DST_REG_OUTLOC3()
2753 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()  argument
2755 …return ((val) << A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_SP_GS_OBJ_OFFSET_REG_C…  in A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2759 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET()  argument
2761 …return ((val) << A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A4XX_SP_GS_OBJ_OFFSET_REG_SHA…  in A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2789 static inline uint32_t A4XX_VPC_ATTR_TOTALATTR(uint32_t val)  in A4XX_VPC_ATTR_TOTALATTR()  argument
2791 	return ((val) << A4XX_VPC_ATTR_TOTALATTR__SHIFT) & A4XX_VPC_ATTR_TOTALATTR__MASK;  in A4XX_VPC_ATTR_TOTALATTR()
2796 static inline uint32_t A4XX_VPC_ATTR_THRDASSIGN(uint32_t val)  in A4XX_VPC_ATTR_THRDASSIGN()  argument
2798 	return ((val) << A4XX_VPC_ATTR_THRDASSIGN__SHIFT) & A4XX_VPC_ATTR_THRDASSIGN__MASK;  in A4XX_VPC_ATTR_THRDASSIGN()
2805 static inline uint32_t A4XX_VPC_PACK_NUMBYPASSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMBYPASSVAR()  argument
2807 	return ((val) << A4XX_VPC_PACK_NUMBYPASSVAR__SHIFT) & A4XX_VPC_PACK_NUMBYPASSVAR__MASK;  in A4XX_VPC_PACK_NUMBYPASSVAR()
2811 static inline uint32_t A4XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMFPNONPOSVAR()  argument
2813 	return ((val) << A4XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT) & A4XX_VPC_PACK_NUMFPNONPOSVAR__MASK;  in A4XX_VPC_PACK_NUMFPNONPOSVAR()
2817 static inline uint32_t A4XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMNONPOSVSVAR()  argument
2819 	return ((val) << A4XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT) & A4XX_VPC_PACK_NUMNONPOSVSVAR__MASK;  in A4XX_VPC_PACK_NUMNONPOSVSVAR()
2835 static inline uint32_t A4XX_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A4XX_VSC_BIN_SIZE_WIDTH()  argument
2837 	return ((val >> 5) << A4XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A4XX_VSC_BIN_SIZE_WIDTH__MASK;  in A4XX_VSC_BIN_SIZE_WIDTH()
2841 static inline uint32_t A4XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A4XX_VSC_BIN_SIZE_HEIGHT()  argument
2843 	return ((val >> 5) << A4XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A4XX_VSC_BIN_SIZE_HEIGHT__MASK;  in A4XX_VSC_BIN_SIZE_HEIGHT()
2857 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_X()  argument
2859 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_X__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_X__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_X()
2863 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_Y()  argument
2865 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_Y__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_Y__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_Y()
2869 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_W()  argument
2871 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_W__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_W__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_W()
2875 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_H()  argument
2877 	return ((val) << A4XX_VSC_PIPE_CONFIG_REG_H__SHIFT) & A4XX_VSC_PIPE_CONFIG_REG_H__MASK;  in A4XX_VSC_PIPE_CONFIG_REG_H()
2919 static inline uint32_t A4XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val)  in A4XX_VFD_CONTROL_0_TOTALATTRTOVS()  argument
2921 	return ((val) << A4XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT) & A4XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK;  in A4XX_VFD_CONTROL_0_TOTALATTRTOVS()
2925 static inline uint32_t A4XX_VFD_CONTROL_0_BYPASSATTROVS(uint32_t val)  in A4XX_VFD_CONTROL_0_BYPASSATTROVS()  argument
2927 	return ((val) << A4XX_VFD_CONTROL_0_BYPASSATTROVS__SHIFT) & A4XX_VFD_CONTROL_0_BYPASSATTROVS__MASK;  in A4XX_VFD_CONTROL_0_BYPASSATTROVS()
2931 static inline uint32_t A4XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMDECINSTRCNT()  argument
2933 …return ((val) << A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT) & A4XX_VFD_CONTROL_0_STRMDECINSTRCNT__…  in A4XX_VFD_CONTROL_0_STRMDECINSTRCNT()
2937 static inline uint32_t A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()  argument
2939 …return ((val) << A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT) & A4XX_VFD_CONTROL_0_STRMFETCHINSTRC…  in A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()
2945 static inline uint32_t A4XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val)  in A4XX_VFD_CONTROL_1_MAXSTORAGE()  argument
2947 	return ((val) << A4XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT) & A4XX_VFD_CONTROL_1_MAXSTORAGE__MASK;  in A4XX_VFD_CONTROL_1_MAXSTORAGE()
2951 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4VTX()  argument
2953 	return ((val) << A4XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A4XX_VFD_CONTROL_1_REGID4VTX__MASK;  in A4XX_VFD_CONTROL_1_REGID4VTX()
2957 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4INST(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4INST()  argument
2959 	return ((val) << A4XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A4XX_VFD_CONTROL_1_REGID4INST__MASK;  in A4XX_VFD_CONTROL_1_REGID4INST()
2967 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_VTXCNT(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_VTXCNT()  argument
2969 	return ((val) << A4XX_VFD_CONTROL_3_REGID_VTXCNT__SHIFT) & A4XX_VFD_CONTROL_3_REGID_VTXCNT__MASK;  in A4XX_VFD_CONTROL_3_REGID_VTXCNT()
2973 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSX(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_TESSX()  argument
2975 	return ((val) << A4XX_VFD_CONTROL_3_REGID_TESSX__SHIFT) & A4XX_VFD_CONTROL_3_REGID_TESSX__MASK;  in A4XX_VFD_CONTROL_3_REGID_TESSX()
2979 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_TESSY(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_TESSY()  argument
2981 	return ((val) << A4XX_VFD_CONTROL_3_REGID_TESSY__SHIFT) & A4XX_VFD_CONTROL_3_REGID_TESSY__MASK;  in A4XX_VFD_CONTROL_3_REGID_TESSY()
2993 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_FETCHSIZE()  argument
2995 	return ((val) << A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK;  in A4XX_VFD_FETCH_INSTR_0_FETCHSIZE()
2999 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE()  argument
3001 	return ((val) << A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT) & A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK;  in A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE()
3011 static inline uint32_t A4XX_VFD_FETCH_INSTR_2_SIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_2_SIZE()  argument
3013 	return ((val) << A4XX_VFD_FETCH_INSTR_2_SIZE__SHIFT) & A4XX_VFD_FETCH_INSTR_2_SIZE__MASK;  in A4XX_VFD_FETCH_INSTR_2_SIZE()
3019 static inline uint32_t A4XX_VFD_FETCH_INSTR_3_STEPRATE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_3_STEPRATE()  argument
3021 	return ((val) << A4XX_VFD_FETCH_INSTR_3_STEPRATE__SHIFT) & A4XX_VFD_FETCH_INSTR_3_STEPRATE__MASK;  in A4XX_VFD_FETCH_INSTR_3_STEPRATE()
3029 static inline uint32_t A4XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val)  in A4XX_VFD_DECODE_INSTR_WRITEMASK()  argument
3031 	return ((val) << A4XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT) & A4XX_VFD_DECODE_INSTR_WRITEMASK__MASK;  in A4XX_VFD_DECODE_INSTR_WRITEMASK()
3036 static inline uint32_t A4XX_VFD_DECODE_INSTR_FORMAT(enum a4xx_vtx_fmt val)  in A4XX_VFD_DECODE_INSTR_FORMAT()  argument
3038 	return ((val) << A4XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A4XX_VFD_DECODE_INSTR_FORMAT__MASK;  in A4XX_VFD_DECODE_INSTR_FORMAT()
3042 static inline uint32_t A4XX_VFD_DECODE_INSTR_REGID(uint32_t val)  in A4XX_VFD_DECODE_INSTR_REGID()  argument
3044 	return ((val) << A4XX_VFD_DECODE_INSTR_REGID__SHIFT) & A4XX_VFD_DECODE_INSTR_REGID__MASK;  in A4XX_VFD_DECODE_INSTR_REGID()
3049 static inline uint32_t A4XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)  in A4XX_VFD_DECODE_INSTR_SWAP()  argument
3051 	return ((val) << A4XX_VFD_DECODE_INSTR_SWAP__SHIFT) & A4XX_VFD_DECODE_INSTR_SWAP__MASK;  in A4XX_VFD_DECODE_INSTR_SWAP()
3055 static inline uint32_t A4XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val)  in A4XX_VFD_DECODE_INSTR_SHIFTCNT()  argument
3057 	return ((val) << A4XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT) & A4XX_VFD_DECODE_INSTR_SHIFTCNT__MASK;  in A4XX_VFD_DECODE_INSTR_SHIFTCNT()
3087 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_VS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_VS()  argument
3089 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_VS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_VS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_VS()
3093 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_HS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_HS()  argument
3095 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_HS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_HS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_HS()
3099 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_DS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_DS()  argument
3101 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_DS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_DS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_DS()
3105 static inline uint32_t A4XX_TPL1_TP_TEX_COUNT_GS(uint32_t val)  in A4XX_TPL1_TP_TEX_COUNT_GS()  argument
3107 	return ((val) << A4XX_TPL1_TP_TEX_COUNT_GS__SHIFT) & A4XX_TPL1_TP_TEX_COUNT_GS__MASK;  in A4XX_TPL1_TP_TEX_COUNT_GS()
3160 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ()  argument
3162 	return ((val) << A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT) & A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK;  in A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
3166 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_VERT()  argument
3168 	return ((val) << A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT) & A4XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK;  in A4XX_GRAS_CL_GB_CLIP_ADJ_VERT()
3174 static inline uint32_t A4XX_GRAS_CL_VPORT_XOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_XOFFSET_0()  argument
3176 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_XOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_XOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_XOFFSET_0()
3182 static inline uint32_t A4XX_GRAS_CL_VPORT_XSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_XSCALE_0()  argument
3184 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_XSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_XSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_XSCALE_0()
3190 static inline uint32_t A4XX_GRAS_CL_VPORT_YOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_YOFFSET_0()  argument
3192 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_YOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_YOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_YOFFSET_0()
3198 static inline uint32_t A4XX_GRAS_CL_VPORT_YSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_YSCALE_0()  argument
3200 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_YSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_YSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_YSCALE_0()
3206 static inline uint32_t A4XX_GRAS_CL_VPORT_ZOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_ZOFFSET_0()  argument
3208 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZOFFSET_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZOFFSET_0__MASK;  in A4XX_GRAS_CL_VPORT_ZOFFSET_0()
3214 static inline uint32_t A4XX_GRAS_CL_VPORT_ZSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_ZSCALE_0()  argument
3216 	return ((fui(val)) << A4XX_GRAS_CL_VPORT_ZSCALE_0__SHIFT) & A4XX_GRAS_CL_VPORT_ZSCALE_0__MASK;  in A4XX_GRAS_CL_VPORT_ZSCALE_0()
3222 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MIN(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MIN()  argument
3224 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MIN()
3228 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MAX(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MAX()  argument
3230 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MAX()
3236 static inline uint32_t A4XX_GRAS_SU_POINT_SIZE(float val)  in A4XX_GRAS_SU_POINT_SIZE()  argument
3238 …return ((((int32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_SIZE__SHIFT) & A4XX_GRAS_SU_POINT_SIZE__MA…  in A4XX_GRAS_SU_POINT_SIZE()
3248 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_SCALE(float val)  in A4XX_GRAS_SU_POLY_OFFSET_SCALE()  argument
3250 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_SCALE__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_SCALE__MAS…  in A4XX_GRAS_SU_POLY_OFFSET_SCALE()
3256 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)  in A4XX_GRAS_SU_POLY_OFFSET_OFFSET()  argument
3258 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_OFFSET__M…  in A4XX_GRAS_SU_POLY_OFFSET_OFFSET()
3264 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_CLAMP(float val)  in A4XX_GRAS_SU_POLY_OFFSET_CLAMP()  argument
3266 …return ((fui(val)) << A4XX_GRAS_SU_POLY_OFFSET_CLAMP__SHIFT) & A4XX_GRAS_SU_POLY_OFFSET_CLAMP__MAS…  in A4XX_GRAS_SU_POLY_OFFSET_CLAMP()
3272 static inline uint32_t A4XX_GRAS_DEPTH_CONTROL_FORMAT(enum a4xx_depth_format val)  in A4XX_GRAS_DEPTH_CONTROL_FORMAT()  argument
3274 	return ((val) << A4XX_GRAS_DEPTH_CONTROL_FORMAT__SHIFT) & A4XX_GRAS_DEPTH_CONTROL_FORMAT__MASK;  in A4XX_GRAS_DEPTH_CONTROL_FORMAT()
3283 static inline uint32_t A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val)  in A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()  argument
3285 …return ((((int32_t)(val * 4.0))) << A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT) & A4XX_GRAS_SU…  in A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()
3294 static inline uint32_t A4XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val)  in A4XX_GRAS_SC_CONTROL_RENDER_MODE()  argument
3296 	return ((val) << A4XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT) & A4XX_GRAS_SC_CONTROL_RENDER_MODE__MASK;  in A4XX_GRAS_SC_CONTROL_RENDER_MODE()
3300 static inline uint32_t A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(uint32_t val)  in A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES()  argument
3302 …return ((val) << A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT) & A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MA…  in A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES()
3307 static inline uint32_t A4XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val)  in A4XX_GRAS_SC_CONTROL_RASTER_MODE()  argument
3309 	return ((val) << A4XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT) & A4XX_GRAS_SC_CONTROL_RASTER_MODE__MASK;  in A4XX_GRAS_SC_CONTROL_RASTER_MODE()
3316 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X()  argument
3318 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X()
3322 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()  argument
3324 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()
3331 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X()  argument
3333 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X()
3337 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()  argument
3339 	return ((val) << A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT) & A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK;  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()
3346 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X()  argument
3348 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
3352 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()  argument
3354 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
3361 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X()  argument
3363 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
3367 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()  argument
3369 	return ((val) << A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK;  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
3376 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_X()  argument
3378 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_BR_X__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_X()
3382 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y()  argument
3384 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y()
3391 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_X()  argument
3393 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_TL_X__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_X()
3397 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y()  argument
3399 	return ((val) << A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__SHIFT) & A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y__MASK;  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y()
3459 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()  argument
3461 …return ((val) << A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A4XX_HLSQ_CONTROL_0_REG_FSTHREADSI…  in A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
3469 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val)  in A4XX_HLSQ_CONTROL_0_REG_CONSTMODE()  argument
3471 …return ((val) << A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT) & A4XX_HLSQ_CONTROL_0_REG_CONSTMODE__MA…  in A4XX_HLSQ_CONTROL_0_REG_CONSTMODE()
3481 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()  argument
3483 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_VSTHREADSI…  in A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()
3489 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_COORDREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_1_REG_COORDREGID()  argument
3491 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_COORDREGID__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_COORDREGID__…  in A4XX_HLSQ_CONTROL_1_REG_COORDREGID()
3495 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID()  argument
3497 …return ((val) << A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID__SHIFT) & A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREG…  in A4XX_HLSQ_CONTROL_1_REG_ZWCOORDREGID()
3503 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()  argument
3505 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_PRIM…  in A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()
3509 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_FACEREGID()  argument
3511 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_FACEREGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_FACEREGID__MA…  in A4XX_HLSQ_CONTROL_2_REG_FACEREGID()
3515 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID()  argument
3517 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_SAMPLEID…  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEID_REGID()
3521 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID()  argument
3523 …return ((val) << A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID__SHIFT) & A4XX_HLSQ_CONTROL_2_REG_SAMPLE…  in A4XX_HLSQ_CONTROL_2_REG_SAMPLEMASK_REGID()
3529 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_REGID()  argument
3531 	return ((val) << A4XX_HLSQ_CONTROL_3_REG_REGID__SHIFT) & A4XX_HLSQ_CONTROL_3_REG_REGID__MASK;  in A4XX_HLSQ_CONTROL_3_REG_REGID()
3539 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()  argument
3541 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()
3545 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3547 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_CON…  in A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()
3553 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()  argument
3555 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_SHADE…  in A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()
3559 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()  argument
3561 …return ((val) << A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_VS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()
3567 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()  argument
3569 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()
3573 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3575 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_CON…  in A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()
3581 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()  argument
3583 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_SHADE…  in A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()
3587 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()  argument
3589 …return ((val) << A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_FS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()
3595 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH()  argument
3597 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH()
3601 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3603 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_CON…  in A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()
3609 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()  argument
3611 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_SHADE…  in A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()
3615 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH()  argument
3617 …return ((val) << A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_HS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH()
3623 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH()  argument
3625 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH()
3629 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3631 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_CON…  in A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()
3637 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()  argument
3639 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_SHADE…  in A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()
3643 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH()  argument
3645 …return ((val) << A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_DS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH()
3651 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH()  argument
3653 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH()
3657 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3659 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_CON…  in A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()
3665 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()  argument
3667 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_SHADE…  in A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()
3671 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH()  argument
3673 …return ((val) << A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_GS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH()
3679 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH()  argument
3681 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_CONSTLENG…  in A4XX_HLSQ_CS_CONTROL_REG_CONSTLENGTH()
3685 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET()  argument
3687 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_CON…  in A4XX_HLSQ_CS_CONTROL_REG_CONSTOBJECTOFFSET()
3693 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET()  argument
3695 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_SHADE…  in A4XX_HLSQ_CS_CONTROL_REG_SHADEROBJOFFSET()
3699 static inline uint32_t A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH()  argument
3701 …return ((val) << A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH__SHIFT) & A4XX_HLSQ_CS_CONTROL_REG_INSTRLENG…  in A4XX_HLSQ_CS_CONTROL_REG_INSTRLENGTH()
3707 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM()  argument
3709 	return ((val) << A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM__MASK;  in A4XX_HLSQ_CL_NDRANGE_0_KERNELDIM()
3713 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX()  argument
3715 …return ((val) << A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX__MA…  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEX()
3719 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY()  argument
3721 …return ((val) << A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY__MA…  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEY()
3725 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ()  argument
3727 …return ((val) << A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__SHIFT) & A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ__MA…  in A4XX_HLSQ_CL_NDRANGE_0_LOCALSIZEZ()
3733 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_1_SIZE_X(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_1_SIZE_X()  argument
3735 	return ((val) << A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__SHIFT) & A4XX_HLSQ_CL_NDRANGE_1_SIZE_X__MASK;  in A4XX_HLSQ_CL_NDRANGE_1_SIZE_X()
3743 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y()  argument
3745 	return ((val) << A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__SHIFT) & A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y__MASK;  in A4XX_HLSQ_CL_NDRANGE_3_SIZE_Y()
3753 static inline uint32_t A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z(uint32_t val)  in A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z()  argument
3755 	return ((val) << A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__SHIFT) & A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z__MASK;  in A4XX_HLSQ_CL_NDRANGE_5_SIZE_Z()
3763 static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID(uint32_t val)  in A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID()  argument
3765 …return ((val) << A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__SHIFT) & A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID__…  in A4XX_HLSQ_CL_CONTROL_0_WGIDCONSTID()
3769 static inline uint32_t A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID(uint32_t val)  in A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID()  argument
3771 …return ((val) << A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID__SHIFT) & A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID…  in A4XX_HLSQ_CL_CONTROL_0_LOCALIDREGID()
3816 static inline uint32_t A4XX_PC_VSTREAM_CONTROL_SIZE(uint32_t val)  in A4XX_PC_VSTREAM_CONTROL_SIZE()  argument
3818 	return ((val) << A4XX_PC_VSTREAM_CONTROL_SIZE__SHIFT) & A4XX_PC_VSTREAM_CONTROL_SIZE__MASK;  in A4XX_PC_VSTREAM_CONTROL_SIZE()
3822 static inline uint32_t A4XX_PC_VSTREAM_CONTROL_N(uint32_t val)  in A4XX_PC_VSTREAM_CONTROL_N()  argument
3824 	return ((val) << A4XX_PC_VSTREAM_CONTROL_N__SHIFT) & A4XX_PC_VSTREAM_CONTROL_N__MASK;  in A4XX_PC_VSTREAM_CONTROL_N()
3830 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL_VAROUT(uint32_t val)  in A4XX_PC_PRIM_VTX_CNTL_VAROUT()  argument
3832 	return ((val) << A4XX_PC_PRIM_VTX_CNTL_VAROUT__SHIFT) & A4XX_PC_PRIM_VTX_CNTL_VAROUT__MASK;  in A4XX_PC_PRIM_VTX_CNTL_VAROUT()
3841 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE()  argument
3843 …return ((val) << A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE__SHIFT) & A4XX_PC_PRIM_VTX_CNTL2_POLY…  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_FRONT_PTYPE()
3847 static inline uint32_t A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE()  argument
3849 …return ((val) << A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE__SHIFT) & A4XX_PC_PRIM_VTX_CNTL2_POLYM…  in A4XX_PC_PRIM_VTX_CNTL2_POLYMODE_BACK_PTYPE()
3858 static inline uint32_t A4XX_PC_GS_PARAM_MAX_VERTICES(uint32_t val)  in A4XX_PC_GS_PARAM_MAX_VERTICES()  argument
3860 	return ((val) << A4XX_PC_GS_PARAM_MAX_VERTICES__SHIFT) & A4XX_PC_GS_PARAM_MAX_VERTICES__MASK;  in A4XX_PC_GS_PARAM_MAX_VERTICES()
3864 static inline uint32_t A4XX_PC_GS_PARAM_INVOCATIONS(uint32_t val)  in A4XX_PC_GS_PARAM_INVOCATIONS()  argument
3866 	return ((val) << A4XX_PC_GS_PARAM_INVOCATIONS__SHIFT) & A4XX_PC_GS_PARAM_INVOCATIONS__MASK;  in A4XX_PC_GS_PARAM_INVOCATIONS()
3870 static inline uint32_t A4XX_PC_GS_PARAM_PRIMTYPE(enum adreno_pa_su_sc_draw val)  in A4XX_PC_GS_PARAM_PRIMTYPE()  argument
3872 	return ((val) << A4XX_PC_GS_PARAM_PRIMTYPE__SHIFT) & A4XX_PC_GS_PARAM_PRIMTYPE__MASK;  in A4XX_PC_GS_PARAM_PRIMTYPE()
3879 static inline uint32_t A4XX_PC_HS_PARAM_VERTICES_OUT(uint32_t val)  in A4XX_PC_HS_PARAM_VERTICES_OUT()  argument
3881 	return ((val) << A4XX_PC_HS_PARAM_VERTICES_OUT__SHIFT) & A4XX_PC_HS_PARAM_VERTICES_OUT__MASK;  in A4XX_PC_HS_PARAM_VERTICES_OUT()
3885 static inline uint32_t A4XX_PC_HS_PARAM_SPACING(enum a4xx_tess_spacing val)  in A4XX_PC_HS_PARAM_SPACING()  argument
3887 	return ((val) << A4XX_PC_HS_PARAM_SPACING__SHIFT) & A4XX_PC_HS_PARAM_SPACING__MASK;  in A4XX_PC_HS_PARAM_SPACING()
3993 static inline uint32_t A4XX_TEX_SAMP_0_XY_MAG(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MAG()  argument
3995 	return ((val) << A4XX_TEX_SAMP_0_XY_MAG__SHIFT) & A4XX_TEX_SAMP_0_XY_MAG__MASK;  in A4XX_TEX_SAMP_0_XY_MAG()
3999 static inline uint32_t A4XX_TEX_SAMP_0_XY_MIN(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MIN()  argument
4001 	return ((val) << A4XX_TEX_SAMP_0_XY_MIN__SHIFT) & A4XX_TEX_SAMP_0_XY_MIN__MASK;  in A4XX_TEX_SAMP_0_XY_MIN()
4005 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_S(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_S()  argument
4007 	return ((val) << A4XX_TEX_SAMP_0_WRAP_S__SHIFT) & A4XX_TEX_SAMP_0_WRAP_S__MASK;  in A4XX_TEX_SAMP_0_WRAP_S()
4011 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_T(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_T()  argument
4013 	return ((val) << A4XX_TEX_SAMP_0_WRAP_T__SHIFT) & A4XX_TEX_SAMP_0_WRAP_T__MASK;  in A4XX_TEX_SAMP_0_WRAP_T()
4017 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_R(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_R()  argument
4019 	return ((val) << A4XX_TEX_SAMP_0_WRAP_R__SHIFT) & A4XX_TEX_SAMP_0_WRAP_R__MASK;  in A4XX_TEX_SAMP_0_WRAP_R()
4023 static inline uint32_t A4XX_TEX_SAMP_0_ANISO(enum a4xx_tex_aniso val)  in A4XX_TEX_SAMP_0_ANISO()  argument
4025 	return ((val) << A4XX_TEX_SAMP_0_ANISO__SHIFT) & A4XX_TEX_SAMP_0_ANISO__MASK;  in A4XX_TEX_SAMP_0_ANISO()
4029 static inline uint32_t A4XX_TEX_SAMP_0_LOD_BIAS(float val)  in A4XX_TEX_SAMP_0_LOD_BIAS()  argument
4031 …return ((((int32_t)(val * 256.0))) << A4XX_TEX_SAMP_0_LOD_BIAS__SHIFT) & A4XX_TEX_SAMP_0_LOD_BIAS_…  in A4XX_TEX_SAMP_0_LOD_BIAS()
4037 static inline uint32_t A4XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val)  in A4XX_TEX_SAMP_1_COMPARE_FUNC()  argument
4039 	return ((val) << A4XX_TEX_SAMP_1_COMPARE_FUNC__SHIFT) & A4XX_TEX_SAMP_1_COMPARE_FUNC__MASK;  in A4XX_TEX_SAMP_1_COMPARE_FUNC()
4046 static inline uint32_t A4XX_TEX_SAMP_1_MAX_LOD(float val)  in A4XX_TEX_SAMP_1_MAX_LOD()  argument
4048 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A4XX_TEX_SAMP_1_MAX_LOD__…  in A4XX_TEX_SAMP_1_MAX_LOD()
4052 static inline uint32_t A4XX_TEX_SAMP_1_MIN_LOD(float val)  in A4XX_TEX_SAMP_1_MIN_LOD()  argument
4054 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A4XX_TEX_SAMP_1_MIN_LOD__…  in A4XX_TEX_SAMP_1_MIN_LOD()
4062 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_X(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_X()  argument
4064 	return ((val) << A4XX_TEX_CONST_0_SWIZ_X__SHIFT) & A4XX_TEX_CONST_0_SWIZ_X__MASK;  in A4XX_TEX_CONST_0_SWIZ_X()
4068 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Y(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Y()  argument
4070 	return ((val) << A4XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A4XX_TEX_CONST_0_SWIZ_Y__MASK;  in A4XX_TEX_CONST_0_SWIZ_Y()
4074 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Z(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Z()  argument
4076 	return ((val) << A4XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A4XX_TEX_CONST_0_SWIZ_Z__MASK;  in A4XX_TEX_CONST_0_SWIZ_Z()
4080 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_W(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_W()  argument
4082 	return ((val) << A4XX_TEX_CONST_0_SWIZ_W__SHIFT) & A4XX_TEX_CONST_0_SWIZ_W__MASK;  in A4XX_TEX_CONST_0_SWIZ_W()
4086 static inline uint32_t A4XX_TEX_CONST_0_MIPLVLS(uint32_t val)  in A4XX_TEX_CONST_0_MIPLVLS()  argument
4088 	return ((val) << A4XX_TEX_CONST_0_MIPLVLS__SHIFT) & A4XX_TEX_CONST_0_MIPLVLS__MASK;  in A4XX_TEX_CONST_0_MIPLVLS()
4092 static inline uint32_t A4XX_TEX_CONST_0_FMT(enum a4xx_tex_fmt val)  in A4XX_TEX_CONST_0_FMT()  argument
4094 	return ((val) << A4XX_TEX_CONST_0_FMT__SHIFT) & A4XX_TEX_CONST_0_FMT__MASK;  in A4XX_TEX_CONST_0_FMT()
4098 static inline uint32_t A4XX_TEX_CONST_0_TYPE(enum a4xx_tex_type val)  in A4XX_TEX_CONST_0_TYPE()  argument
4100 	return ((val) << A4XX_TEX_CONST_0_TYPE__SHIFT) & A4XX_TEX_CONST_0_TYPE__MASK;  in A4XX_TEX_CONST_0_TYPE()
4106 static inline uint32_t A4XX_TEX_CONST_1_HEIGHT(uint32_t val)  in A4XX_TEX_CONST_1_HEIGHT()  argument
4108 	return ((val) << A4XX_TEX_CONST_1_HEIGHT__SHIFT) & A4XX_TEX_CONST_1_HEIGHT__MASK;  in A4XX_TEX_CONST_1_HEIGHT()
4112 static inline uint32_t A4XX_TEX_CONST_1_WIDTH(uint32_t val)  in A4XX_TEX_CONST_1_WIDTH()  argument
4114 	return ((val) << A4XX_TEX_CONST_1_WIDTH__SHIFT) & A4XX_TEX_CONST_1_WIDTH__MASK;  in A4XX_TEX_CONST_1_WIDTH()
4120 static inline uint32_t A4XX_TEX_CONST_2_FETCHSIZE(enum a4xx_tex_fetchsize val)  in A4XX_TEX_CONST_2_FETCHSIZE()  argument
4122 	return ((val) << A4XX_TEX_CONST_2_FETCHSIZE__SHIFT) & A4XX_TEX_CONST_2_FETCHSIZE__MASK;  in A4XX_TEX_CONST_2_FETCHSIZE()
4126 static inline uint32_t A4XX_TEX_CONST_2_PITCH(uint32_t val)  in A4XX_TEX_CONST_2_PITCH()  argument
4128 	return ((val) << A4XX_TEX_CONST_2_PITCH__SHIFT) & A4XX_TEX_CONST_2_PITCH__MASK;  in A4XX_TEX_CONST_2_PITCH()
4132 static inline uint32_t A4XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val)  in A4XX_TEX_CONST_2_SWAP()  argument
4134 	return ((val) << A4XX_TEX_CONST_2_SWAP__SHIFT) & A4XX_TEX_CONST_2_SWAP__MASK;  in A4XX_TEX_CONST_2_SWAP()
4140 static inline uint32_t A4XX_TEX_CONST_3_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_3_LAYERSZ()  argument
4142 	return ((val >> 12) << A4XX_TEX_CONST_3_LAYERSZ__SHIFT) & A4XX_TEX_CONST_3_LAYERSZ__MASK;  in A4XX_TEX_CONST_3_LAYERSZ()
4146 static inline uint32_t A4XX_TEX_CONST_3_DEPTH(uint32_t val)  in A4XX_TEX_CONST_3_DEPTH()  argument
4148 	return ((val) << A4XX_TEX_CONST_3_DEPTH__SHIFT) & A4XX_TEX_CONST_3_DEPTH__MASK;  in A4XX_TEX_CONST_3_DEPTH()
4154 static inline uint32_t A4XX_TEX_CONST_4_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_4_LAYERSZ()  argument
4156 	return ((val >> 12) << A4XX_TEX_CONST_4_LAYERSZ__SHIFT) & A4XX_TEX_CONST_4_LAYERSZ__MASK;  in A4XX_TEX_CONST_4_LAYERSZ()
4160 static inline uint32_t A4XX_TEX_CONST_4_BASE(uint32_t val)  in A4XX_TEX_CONST_4_BASE()  argument
4162 	return ((val >> 5) << A4XX_TEX_CONST_4_BASE__SHIFT) & A4XX_TEX_CONST_4_BASE__MASK;  in A4XX_TEX_CONST_4_BASE()
4174 static inline uint32_t A4XX_SSBO_0_0_BASE(uint32_t val)  in A4XX_SSBO_0_0_BASE()  argument
4176 	return ((val >> 5) << A4XX_SSBO_0_0_BASE__SHIFT) & A4XX_SSBO_0_0_BASE__MASK;  in A4XX_SSBO_0_0_BASE()
4182 static inline uint32_t A4XX_SSBO_0_1_PITCH(uint32_t val)  in A4XX_SSBO_0_1_PITCH()  argument
4184 	return ((val) << A4XX_SSBO_0_1_PITCH__SHIFT) & A4XX_SSBO_0_1_PITCH__MASK;  in A4XX_SSBO_0_1_PITCH()
4190 static inline uint32_t A4XX_SSBO_0_2_ARRAY_PITCH(uint32_t val)  in A4XX_SSBO_0_2_ARRAY_PITCH()  argument
4192 	return ((val >> 12) << A4XX_SSBO_0_2_ARRAY_PITCH__SHIFT) & A4XX_SSBO_0_2_ARRAY_PITCH__MASK;  in A4XX_SSBO_0_2_ARRAY_PITCH()
4198 static inline uint32_t A4XX_SSBO_0_3_CPP(uint32_t val)  in A4XX_SSBO_0_3_CPP()  argument
4200 	return ((val) << A4XX_SSBO_0_3_CPP__SHIFT) & A4XX_SSBO_0_3_CPP__MASK;  in A4XX_SSBO_0_3_CPP()
4206 static inline uint32_t A4XX_SSBO_1_0_CPP(uint32_t val)  in A4XX_SSBO_1_0_CPP()  argument
4208 	return ((val) << A4XX_SSBO_1_0_CPP__SHIFT) & A4XX_SSBO_1_0_CPP__MASK;  in A4XX_SSBO_1_0_CPP()
4212 static inline uint32_t A4XX_SSBO_1_0_FMT(enum a4xx_color_fmt val)  in A4XX_SSBO_1_0_FMT()  argument
4214 	return ((val) << A4XX_SSBO_1_0_FMT__SHIFT) & A4XX_SSBO_1_0_FMT__MASK;  in A4XX_SSBO_1_0_FMT()
4218 static inline uint32_t A4XX_SSBO_1_0_WIDTH(uint32_t val)  in A4XX_SSBO_1_0_WIDTH()  argument
4220 	return ((val) << A4XX_SSBO_1_0_WIDTH__SHIFT) & A4XX_SSBO_1_0_WIDTH__MASK;  in A4XX_SSBO_1_0_WIDTH()
4226 static inline uint32_t A4XX_SSBO_1_1_HEIGHT(uint32_t val)  in A4XX_SSBO_1_1_HEIGHT()  argument
4228 	return ((val) << A4XX_SSBO_1_1_HEIGHT__SHIFT) & A4XX_SSBO_1_1_HEIGHT__MASK;  in A4XX_SSBO_1_1_HEIGHT()
4232 static inline uint32_t A4XX_SSBO_1_1_DEPTH(uint32_t val)  in A4XX_SSBO_1_1_DEPTH()  argument
4234 	return ((val) << A4XX_SSBO_1_1_DEPTH__SHIFT) & A4XX_SSBO_1_1_DEPTH__MASK;  in A4XX_SSBO_1_1_DEPTH()