Lines Matching refs:val
946 static inline uint32_t A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES(uint32_t val) in A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES() argument
948 …return ((val) << A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES__SHIFT) & A3XX_GRAS_CL_CLIP_CNTL_NUM_… in A3XX_GRAS_CL_CLIP_CNTL_NUM_USER_CLIP_PLANES()
954 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ() argument
956 return ((val) << A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__SHIFT) & A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ__MASK; in A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
960 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_VERT() argument
962 return ((val) << A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__SHIFT) & A3XX_GRAS_CL_GB_CLIP_ADJ_VERT__MASK; in A3XX_GRAS_CL_GB_CLIP_ADJ_VERT()
968 static inline uint32_t A3XX_GRAS_CL_VPORT_XOFFSET(float val) in A3XX_GRAS_CL_VPORT_XOFFSET() argument
970 return ((fui(val)) << A3XX_GRAS_CL_VPORT_XOFFSET__SHIFT) & A3XX_GRAS_CL_VPORT_XOFFSET__MASK; in A3XX_GRAS_CL_VPORT_XOFFSET()
976 static inline uint32_t A3XX_GRAS_CL_VPORT_XSCALE(float val) in A3XX_GRAS_CL_VPORT_XSCALE() argument
978 return ((fui(val)) << A3XX_GRAS_CL_VPORT_XSCALE__SHIFT) & A3XX_GRAS_CL_VPORT_XSCALE__MASK; in A3XX_GRAS_CL_VPORT_XSCALE()
984 static inline uint32_t A3XX_GRAS_CL_VPORT_YOFFSET(float val) in A3XX_GRAS_CL_VPORT_YOFFSET() argument
986 return ((fui(val)) << A3XX_GRAS_CL_VPORT_YOFFSET__SHIFT) & A3XX_GRAS_CL_VPORT_YOFFSET__MASK; in A3XX_GRAS_CL_VPORT_YOFFSET()
992 static inline uint32_t A3XX_GRAS_CL_VPORT_YSCALE(float val) in A3XX_GRAS_CL_VPORT_YSCALE() argument
994 return ((fui(val)) << A3XX_GRAS_CL_VPORT_YSCALE__SHIFT) & A3XX_GRAS_CL_VPORT_YSCALE__MASK; in A3XX_GRAS_CL_VPORT_YSCALE()
1000 static inline uint32_t A3XX_GRAS_CL_VPORT_ZOFFSET(float val) in A3XX_GRAS_CL_VPORT_ZOFFSET() argument
1002 return ((fui(val)) << A3XX_GRAS_CL_VPORT_ZOFFSET__SHIFT) & A3XX_GRAS_CL_VPORT_ZOFFSET__MASK; in A3XX_GRAS_CL_VPORT_ZOFFSET()
1008 static inline uint32_t A3XX_GRAS_CL_VPORT_ZSCALE(float val) in A3XX_GRAS_CL_VPORT_ZSCALE() argument
1010 return ((fui(val)) << A3XX_GRAS_CL_VPORT_ZSCALE__SHIFT) & A3XX_GRAS_CL_VPORT_ZSCALE__MASK; in A3XX_GRAS_CL_VPORT_ZSCALE()
1016 static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MIN(float val) in A3XX_GRAS_SU_POINT_MINMAX_MIN() argument
1018 …return ((((uint32_t)(val * 16.0))) << A3XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A3XX_GRAS_SU_POINT_M… in A3XX_GRAS_SU_POINT_MINMAX_MIN()
1022 static inline uint32_t A3XX_GRAS_SU_POINT_MINMAX_MAX(float val) in A3XX_GRAS_SU_POINT_MINMAX_MAX() argument
1024 …return ((((uint32_t)(val * 16.0))) << A3XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A3XX_GRAS_SU_POINT_M… in A3XX_GRAS_SU_POINT_MINMAX_MAX()
1030 static inline uint32_t A3XX_GRAS_SU_POINT_SIZE(float val) in A3XX_GRAS_SU_POINT_SIZE() argument
1032 …return ((((int32_t)(val * 16.0))) << A3XX_GRAS_SU_POINT_SIZE__SHIFT) & A3XX_GRAS_SU_POINT_SIZE__MA… in A3XX_GRAS_SU_POINT_SIZE()
1038 static inline uint32_t A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL(float val) in A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL() argument
1040 …return ((((int32_t)(val * 1048576.0))) << A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL__SHIFT) & A3XX_GRAS_S… in A3XX_GRAS_SU_POLY_OFFSET_SCALE_VAL()
1046 static inline uint32_t A3XX_GRAS_SU_POLY_OFFSET_OFFSET(float val) in A3XX_GRAS_SU_POLY_OFFSET_OFFSET() argument
1048 …return ((((int32_t)(val * 64.0))) << A3XX_GRAS_SU_POLY_OFFSET_OFFSET__SHIFT) & A3XX_GRAS_SU_POLY_O… in A3XX_GRAS_SU_POLY_OFFSET_OFFSET()
1057 static inline uint32_t A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val) in A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH() argument
1059 …return ((((int32_t)(val * 4.0))) << A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH__SHIFT) & A3XX_GRAS_SU… in A3XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()
1066 static inline uint32_t A3XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val) in A3XX_GRAS_SC_CONTROL_RENDER_MODE() argument
1068 return ((val) << A3XX_GRAS_SC_CONTROL_RENDER_MODE__SHIFT) & A3XX_GRAS_SC_CONTROL_RENDER_MODE__MASK; in A3XX_GRAS_SC_CONTROL_RENDER_MODE()
1072 static inline uint32_t A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES(enum a3xx_msaa_samples val) in A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES() argument
1074 …return ((val) << A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES__SHIFT) & A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES__MA… in A3XX_GRAS_SC_CONTROL_MSAA_SAMPLES()
1078 static inline uint32_t A3XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val) in A3XX_GRAS_SC_CONTROL_RASTER_MODE() argument
1080 return ((val) << A3XX_GRAS_SC_CONTROL_RASTER_MODE__SHIFT) & A3XX_GRAS_SC_CONTROL_RASTER_MODE__MASK; in A3XX_GRAS_SC_CONTROL_RASTER_MODE()
1087 static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val) in A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X() argument
1089 return ((val) << A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X__SHIFT) & A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X__MASK; in A3XX_GRAS_SC_SCREEN_SCISSOR_TL_X()
1093 static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val) in A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y() argument
1095 return ((val) << A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__SHIFT) & A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y__MASK; in A3XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()
1102 static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val) in A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X() argument
1104 return ((val) << A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X__SHIFT) & A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X__MASK; in A3XX_GRAS_SC_SCREEN_SCISSOR_BR_X()
1108 static inline uint32_t A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val) in A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y() argument
1110 return ((val) << A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__SHIFT) & A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y__MASK; in A3XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()
1117 static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val) in A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X() argument
1119 return ((val) << A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X__MASK; in A3XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
1123 static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val) in A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y() argument
1125 return ((val) << A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y__MASK; in A3XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
1132 static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val) in A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X() argument
1134 return ((val) << A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X__MASK; in A3XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
1138 static inline uint32_t A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val) in A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y() argument
1140 return ((val) << A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y__MASK; in A3XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
1147 static inline uint32_t A3XX_RB_MODE_CONTROL_RENDER_MODE(enum a3xx_render_mode val) in A3XX_RB_MODE_CONTROL_RENDER_MODE() argument
1149 return ((val) << A3XX_RB_MODE_CONTROL_RENDER_MODE__SHIFT) & A3XX_RB_MODE_CONTROL_RENDER_MODE__MASK; in A3XX_RB_MODE_CONTROL_RENDER_MODE()
1153 static inline uint32_t A3XX_RB_MODE_CONTROL_MRT(uint32_t val) in A3XX_RB_MODE_CONTROL_MRT() argument
1155 return ((val) << A3XX_RB_MODE_CONTROL_MRT__SHIFT) & A3XX_RB_MODE_CONTROL_MRT__MASK; in A3XX_RB_MODE_CONTROL_MRT()
1167 static inline uint32_t A3XX_RB_RENDER_CONTROL_BIN_WIDTH(uint32_t val) in A3XX_RB_RENDER_CONTROL_BIN_WIDTH() argument
1169 …return ((val >> 5) << A3XX_RB_RENDER_CONTROL_BIN_WIDTH__SHIFT) & A3XX_RB_RENDER_CONTROL_BIN_WIDTH_… in A3XX_RB_RENDER_CONTROL_BIN_WIDTH()
1182 static inline uint32_t A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val) in A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC() argument
1184 …return ((val) << A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC__SHIFT) & A3XX_RB_RENDER_CONTROL_ALPHA_TES… in A3XX_RB_RENDER_CONTROL_ALPHA_TEST_FUNC()
1193 static inline uint32_t A3XX_RB_MSAA_CONTROL_SAMPLES(enum a3xx_msaa_samples val) in A3XX_RB_MSAA_CONTROL_SAMPLES() argument
1195 return ((val) << A3XX_RB_MSAA_CONTROL_SAMPLES__SHIFT) & A3XX_RB_MSAA_CONTROL_SAMPLES__MASK; in A3XX_RB_MSAA_CONTROL_SAMPLES()
1199 static inline uint32_t A3XX_RB_MSAA_CONTROL_SAMPLE_MASK(uint32_t val) in A3XX_RB_MSAA_CONTROL_SAMPLE_MASK() argument
1201 return ((val) << A3XX_RB_MSAA_CONTROL_SAMPLE_MASK__SHIFT) & A3XX_RB_MSAA_CONTROL_SAMPLE_MASK__MASK; in A3XX_RB_MSAA_CONTROL_SAMPLE_MASK()
1207 static inline uint32_t A3XX_RB_ALPHA_REF_UINT(uint32_t val) in A3XX_RB_ALPHA_REF_UINT() argument
1209 return ((val) << A3XX_RB_ALPHA_REF_UINT__SHIFT) & A3XX_RB_ALPHA_REF_UINT__MASK; in A3XX_RB_ALPHA_REF_UINT()
1213 static inline uint32_t A3XX_RB_ALPHA_REF_FLOAT(float val) in A3XX_RB_ALPHA_REF_FLOAT() argument
1215 …return ((util_float_to_half(val)) << A3XX_RB_ALPHA_REF_FLOAT__SHIFT) & A3XX_RB_ALPHA_REF_FLOAT__MA… in A3XX_RB_ALPHA_REF_FLOAT()
1226 static inline uint32_t A3XX_RB_MRT_CONTROL_ROP_CODE(enum a3xx_rop_code val) in A3XX_RB_MRT_CONTROL_ROP_CODE() argument
1228 return ((val) << A3XX_RB_MRT_CONTROL_ROP_CODE__SHIFT) & A3XX_RB_MRT_CONTROL_ROP_CODE__MASK; in A3XX_RB_MRT_CONTROL_ROP_CODE()
1232 static inline uint32_t A3XX_RB_MRT_CONTROL_DITHER_MODE(enum adreno_rb_dither_mode val) in A3XX_RB_MRT_CONTROL_DITHER_MODE() argument
1234 return ((val) << A3XX_RB_MRT_CONTROL_DITHER_MODE__SHIFT) & A3XX_RB_MRT_CONTROL_DITHER_MODE__MASK; in A3XX_RB_MRT_CONTROL_DITHER_MODE()
1238 static inline uint32_t A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) in A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE() argument
1240 …return ((val) << A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE__SHIFT) & A3XX_RB_MRT_CONTROL_COMPONENT_ENAB… in A3XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
1246 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a3xx_color_fmt val) in A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT() argument
1248 …return ((val) << A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT__MA… in A3XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
1252 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE(enum a3xx_tile_mode val) in A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE() argument
1254 …return ((val) << A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MO… in A3XX_RB_MRT_BUF_INFO_COLOR_TILE_MODE()
1258 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val) in A3XX_RB_MRT_BUF_INFO_COLOR_SWAP() argument
1260 return ((val) << A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_SWAP__MASK; in A3XX_RB_MRT_BUF_INFO_COLOR_SWAP()
1265 static inline uint32_t A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val) in A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH() argument
1267 …return ((val >> 5) << A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH__SHIFT) & A3XX_RB_MRT_BUF_INFO_COLOR_BU… in A3XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()
1273 static inline uint32_t A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE(uint32_t val) in A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE() argument
1275 …return ((val >> 5) << A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE__SHIFT) & A3XX_RB_MRT_BUF_BASE_COLOR_BUF… in A3XX_RB_MRT_BUF_BASE_COLOR_BUF_BASE()
1281 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val) in A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR() argument
1283 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_RGB_… in A3XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
1287 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) in A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE() argument
1289 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_RG… in A3XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
1293 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val) in A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR() argument
1295 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_RGB… in A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
1299 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val) in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR() argument
1301 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_AL… in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
1305 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a3xx_rb_blend_opcode val) in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE() argument
1307 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_… in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
1311 static inline uint32_t A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val) in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR() argument
1313 …return ((val) << A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR__SHIFT) & A3XX_RB_MRT_BLEND_CONTROL_A… in A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
1320 static inline uint32_t A3XX_RB_BLEND_RED_UINT(uint32_t val) in A3XX_RB_BLEND_RED_UINT() argument
1322 return ((val) << A3XX_RB_BLEND_RED_UINT__SHIFT) & A3XX_RB_BLEND_RED_UINT__MASK; in A3XX_RB_BLEND_RED_UINT()
1326 static inline uint32_t A3XX_RB_BLEND_RED_FLOAT(float val) in A3XX_RB_BLEND_RED_FLOAT() argument
1328 …return ((util_float_to_half(val)) << A3XX_RB_BLEND_RED_FLOAT__SHIFT) & A3XX_RB_BLEND_RED_FLOAT__MA… in A3XX_RB_BLEND_RED_FLOAT()
1334 static inline uint32_t A3XX_RB_BLEND_GREEN_UINT(uint32_t val) in A3XX_RB_BLEND_GREEN_UINT() argument
1336 return ((val) << A3XX_RB_BLEND_GREEN_UINT__SHIFT) & A3XX_RB_BLEND_GREEN_UINT__MASK; in A3XX_RB_BLEND_GREEN_UINT()
1340 static inline uint32_t A3XX_RB_BLEND_GREEN_FLOAT(float val) in A3XX_RB_BLEND_GREEN_FLOAT() argument
1342 …return ((util_float_to_half(val)) << A3XX_RB_BLEND_GREEN_FLOAT__SHIFT) & A3XX_RB_BLEND_GREEN_FLOAT… in A3XX_RB_BLEND_GREEN_FLOAT()
1348 static inline uint32_t A3XX_RB_BLEND_BLUE_UINT(uint32_t val) in A3XX_RB_BLEND_BLUE_UINT() argument
1350 return ((val) << A3XX_RB_BLEND_BLUE_UINT__SHIFT) & A3XX_RB_BLEND_BLUE_UINT__MASK; in A3XX_RB_BLEND_BLUE_UINT()
1354 static inline uint32_t A3XX_RB_BLEND_BLUE_FLOAT(float val) in A3XX_RB_BLEND_BLUE_FLOAT() argument
1356 …return ((util_float_to_half(val)) << A3XX_RB_BLEND_BLUE_FLOAT__SHIFT) & A3XX_RB_BLEND_BLUE_FLOAT__… in A3XX_RB_BLEND_BLUE_FLOAT()
1362 static inline uint32_t A3XX_RB_BLEND_ALPHA_UINT(uint32_t val) in A3XX_RB_BLEND_ALPHA_UINT() argument
1364 return ((val) << A3XX_RB_BLEND_ALPHA_UINT__SHIFT) & A3XX_RB_BLEND_ALPHA_UINT__MASK; in A3XX_RB_BLEND_ALPHA_UINT()
1368 static inline uint32_t A3XX_RB_BLEND_ALPHA_FLOAT(float val) in A3XX_RB_BLEND_ALPHA_FLOAT() argument
1370 …return ((util_float_to_half(val)) << A3XX_RB_BLEND_ALPHA_FLOAT__SHIFT) & A3XX_RB_BLEND_ALPHA_FLOAT… in A3XX_RB_BLEND_ALPHA_FLOAT()
1384 static inline uint32_t A3XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val) in A3XX_RB_COPY_CONTROL_MSAA_RESOLVE() argument
1386 …return ((val) << A3XX_RB_COPY_CONTROL_MSAA_RESOLVE__SHIFT) & A3XX_RB_COPY_CONTROL_MSAA_RESOLVE__MA… in A3XX_RB_COPY_CONTROL_MSAA_RESOLVE()
1391 static inline uint32_t A3XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val) in A3XX_RB_COPY_CONTROL_MODE() argument
1393 return ((val) << A3XX_RB_COPY_CONTROL_MODE__SHIFT) & A3XX_RB_COPY_CONTROL_MODE__MASK; in A3XX_RB_COPY_CONTROL_MODE()
1398 static inline uint32_t A3XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val) in A3XX_RB_COPY_CONTROL_FASTCLEAR() argument
1400 return ((val) << A3XX_RB_COPY_CONTROL_FASTCLEAR__SHIFT) & A3XX_RB_COPY_CONTROL_FASTCLEAR__MASK; in A3XX_RB_COPY_CONTROL_FASTCLEAR()
1405 static inline uint32_t A3XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val) in A3XX_RB_COPY_CONTROL_GMEM_BASE() argument
1407 …return ((val >> 14) << A3XX_RB_COPY_CONTROL_GMEM_BASE__SHIFT) & A3XX_RB_COPY_CONTROL_GMEM_BASE__MA… in A3XX_RB_COPY_CONTROL_GMEM_BASE()
1413 static inline uint32_t A3XX_RB_COPY_DEST_BASE_BASE(uint32_t val) in A3XX_RB_COPY_DEST_BASE_BASE() argument
1415 return ((val >> 5) << A3XX_RB_COPY_DEST_BASE_BASE__SHIFT) & A3XX_RB_COPY_DEST_BASE_BASE__MASK; in A3XX_RB_COPY_DEST_BASE_BASE()
1421 static inline uint32_t A3XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val) in A3XX_RB_COPY_DEST_PITCH_PITCH() argument
1423 return ((val >> 5) << A3XX_RB_COPY_DEST_PITCH_PITCH__SHIFT) & A3XX_RB_COPY_DEST_PITCH_PITCH__MASK; in A3XX_RB_COPY_DEST_PITCH_PITCH()
1429 static inline uint32_t A3XX_RB_COPY_DEST_INFO_TILE(enum a3xx_tile_mode val) in A3XX_RB_COPY_DEST_INFO_TILE() argument
1431 return ((val) << A3XX_RB_COPY_DEST_INFO_TILE__SHIFT) & A3XX_RB_COPY_DEST_INFO_TILE__MASK; in A3XX_RB_COPY_DEST_INFO_TILE()
1435 static inline uint32_t A3XX_RB_COPY_DEST_INFO_FORMAT(enum a3xx_color_fmt val) in A3XX_RB_COPY_DEST_INFO_FORMAT() argument
1437 return ((val) << A3XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) & A3XX_RB_COPY_DEST_INFO_FORMAT__MASK; in A3XX_RB_COPY_DEST_INFO_FORMAT()
1441 static inline uint32_t A3XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val) in A3XX_RB_COPY_DEST_INFO_SWAP() argument
1443 return ((val) << A3XX_RB_COPY_DEST_INFO_SWAP__SHIFT) & A3XX_RB_COPY_DEST_INFO_SWAP__MASK; in A3XX_RB_COPY_DEST_INFO_SWAP()
1447 static inline uint32_t A3XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val) in A3XX_RB_COPY_DEST_INFO_DITHER_MODE() argument
1449 …return ((val) << A3XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) & A3XX_RB_COPY_DEST_INFO_DITHER_MODE__… in A3XX_RB_COPY_DEST_INFO_DITHER_MODE()
1453 static inline uint32_t A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val) in A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE() argument
1455 …return ((val) << A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE__SHIFT) & A3XX_RB_COPY_DEST_INFO_COMPONEN… in A3XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()
1459 static inline uint32_t A3XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val) in A3XX_RB_COPY_DEST_INFO_ENDIAN() argument
1461 return ((val) << A3XX_RB_COPY_DEST_INFO_ENDIAN__SHIFT) & A3XX_RB_COPY_DEST_INFO_ENDIAN__MASK; in A3XX_RB_COPY_DEST_INFO_ENDIAN()
1471 static inline uint32_t A3XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val) in A3XX_RB_DEPTH_CONTROL_ZFUNC() argument
1473 return ((val) << A3XX_RB_DEPTH_CONTROL_ZFUNC__SHIFT) & A3XX_RB_DEPTH_CONTROL_ZFUNC__MASK; in A3XX_RB_DEPTH_CONTROL_ZFUNC()
1483 static inline uint32_t A3XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum adreno_rb_depth_format val) in A3XX_RB_DEPTH_INFO_DEPTH_FORMAT() argument
1485 return ((val) << A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) & A3XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK; in A3XX_RB_DEPTH_INFO_DEPTH_FORMAT()
1489 static inline uint32_t A3XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val) in A3XX_RB_DEPTH_INFO_DEPTH_BASE() argument
1491 return ((val >> 12) << A3XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A3XX_RB_DEPTH_INFO_DEPTH_BASE__MASK; in A3XX_RB_DEPTH_INFO_DEPTH_BASE()
1497 static inline uint32_t A3XX_RB_DEPTH_PITCH(uint32_t val) in A3XX_RB_DEPTH_PITCH() argument
1499 return ((val >> 3) << A3XX_RB_DEPTH_PITCH__SHIFT) & A3XX_RB_DEPTH_PITCH__MASK; in A3XX_RB_DEPTH_PITCH()
1508 static inline uint32_t A3XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val) in A3XX_RB_STENCIL_CONTROL_FUNC() argument
1510 return ((val) << A3XX_RB_STENCIL_CONTROL_FUNC__SHIFT) & A3XX_RB_STENCIL_CONTROL_FUNC__MASK; in A3XX_RB_STENCIL_CONTROL_FUNC()
1514 static inline uint32_t A3XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_FAIL() argument
1516 return ((val) << A3XX_RB_STENCIL_CONTROL_FAIL__SHIFT) & A3XX_RB_STENCIL_CONTROL_FAIL__MASK; in A3XX_RB_STENCIL_CONTROL_FAIL()
1520 static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_ZPASS() argument
1522 return ((val) << A3XX_RB_STENCIL_CONTROL_ZPASS__SHIFT) & A3XX_RB_STENCIL_CONTROL_ZPASS__MASK; in A3XX_RB_STENCIL_CONTROL_ZPASS()
1526 static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_ZFAIL() argument
1528 return ((val) << A3XX_RB_STENCIL_CONTROL_ZFAIL__SHIFT) & A3XX_RB_STENCIL_CONTROL_ZFAIL__MASK; in A3XX_RB_STENCIL_CONTROL_ZFAIL()
1532 static inline uint32_t A3XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val) in A3XX_RB_STENCIL_CONTROL_FUNC_BF() argument
1534 return ((val) << A3XX_RB_STENCIL_CONTROL_FUNC_BF__SHIFT) & A3XX_RB_STENCIL_CONTROL_FUNC_BF__MASK; in A3XX_RB_STENCIL_CONTROL_FUNC_BF()
1538 static inline uint32_t A3XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_FAIL_BF() argument
1540 return ((val) << A3XX_RB_STENCIL_CONTROL_FAIL_BF__SHIFT) & A3XX_RB_STENCIL_CONTROL_FAIL_BF__MASK; in A3XX_RB_STENCIL_CONTROL_FAIL_BF()
1544 static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_ZPASS_BF() argument
1546 return ((val) << A3XX_RB_STENCIL_CONTROL_ZPASS_BF__SHIFT) & A3XX_RB_STENCIL_CONTROL_ZPASS_BF__MASK; in A3XX_RB_STENCIL_CONTROL_ZPASS_BF()
1550 static inline uint32_t A3XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val) in A3XX_RB_STENCIL_CONTROL_ZFAIL_BF() argument
1552 return ((val) << A3XX_RB_STENCIL_CONTROL_ZFAIL_BF__SHIFT) & A3XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK; in A3XX_RB_STENCIL_CONTROL_ZFAIL_BF()
1560 static inline uint32_t A3XX_RB_STENCIL_INFO_STENCIL_BASE(uint32_t val) in A3XX_RB_STENCIL_INFO_STENCIL_BASE() argument
1562 …return ((val >> 12) << A3XX_RB_STENCIL_INFO_STENCIL_BASE__SHIFT) & A3XX_RB_STENCIL_INFO_STENCIL_BA… in A3XX_RB_STENCIL_INFO_STENCIL_BASE()
1568 static inline uint32_t A3XX_RB_STENCIL_PITCH(uint32_t val) in A3XX_RB_STENCIL_PITCH() argument
1570 return ((val >> 3) << A3XX_RB_STENCIL_PITCH__SHIFT) & A3XX_RB_STENCIL_PITCH__MASK; in A3XX_RB_STENCIL_PITCH()
1576 static inline uint32_t A3XX_RB_STENCILREFMASK_STENCILREF(uint32_t val) in A3XX_RB_STENCILREFMASK_STENCILREF() argument
1578 …return ((val) << A3XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A3XX_RB_STENCILREFMASK_STENCILREF__MA… in A3XX_RB_STENCILREFMASK_STENCILREF()
1582 static inline uint32_t A3XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val) in A3XX_RB_STENCILREFMASK_STENCILMASK() argument
1584 …return ((val) << A3XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A3XX_RB_STENCILREFMASK_STENCILMASK__… in A3XX_RB_STENCILREFMASK_STENCILMASK()
1588 static inline uint32_t A3XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val) in A3XX_RB_STENCILREFMASK_STENCILWRITEMASK() argument
1590 …return ((val) << A3XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A3XX_RB_STENCILREFMASK_STENCILW… in A3XX_RB_STENCILREFMASK_STENCILWRITEMASK()
1596 static inline uint32_t A3XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val) in A3XX_RB_STENCILREFMASK_BF_STENCILREF() argument
1598 …return ((val) << A3XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A3XX_RB_STENCILREFMASK_BF_STENCILR… in A3XX_RB_STENCILREFMASK_BF_STENCILREF()
1602 static inline uint32_t A3XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val) in A3XX_RB_STENCILREFMASK_BF_STENCILMASK() argument
1604 …return ((val) << A3XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A3XX_RB_STENCILREFMASK_BF_STENCIL… in A3XX_RB_STENCILREFMASK_BF_STENCILMASK()
1608 static inline uint32_t A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val) in A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK() argument
1610 …return ((val) << A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A3XX_RB_STENCILREFMASK_BF_ST… in A3XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
1619 static inline uint32_t A3XX_RB_WINDOW_OFFSET_X(uint32_t val) in A3XX_RB_WINDOW_OFFSET_X() argument
1621 return ((val) << A3XX_RB_WINDOW_OFFSET_X__SHIFT) & A3XX_RB_WINDOW_OFFSET_X__MASK; in A3XX_RB_WINDOW_OFFSET_X()
1625 static inline uint32_t A3XX_RB_WINDOW_OFFSET_Y(uint32_t val) in A3XX_RB_WINDOW_OFFSET_Y() argument
1627 return ((val) << A3XX_RB_WINDOW_OFFSET_Y__SHIFT) & A3XX_RB_WINDOW_OFFSET_Y__MASK; in A3XX_RB_WINDOW_OFFSET_Y()
1647 static inline uint32_t A3XX_PC_VSTREAM_CONTROL_SIZE(uint32_t val) in A3XX_PC_VSTREAM_CONTROL_SIZE() argument
1649 return ((val) << A3XX_PC_VSTREAM_CONTROL_SIZE__SHIFT) & A3XX_PC_VSTREAM_CONTROL_SIZE__MASK; in A3XX_PC_VSTREAM_CONTROL_SIZE()
1653 static inline uint32_t A3XX_PC_VSTREAM_CONTROL_N(uint32_t val) in A3XX_PC_VSTREAM_CONTROL_N() argument
1655 return ((val) << A3XX_PC_VSTREAM_CONTROL_N__SHIFT) & A3XX_PC_VSTREAM_CONTROL_N__MASK; in A3XX_PC_VSTREAM_CONTROL_N()
1663 static inline uint32_t A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC(uint32_t val) in A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC() argument
1665 …return ((val) << A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC__SHIFT) & A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC… in A3XX_PC_PRIM_VTX_CNTL_STRIDE_IN_VPC()
1669 static inline uint32_t A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE(enum adreno_pa_su_sc_draw val) in A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE() argument
1671 …return ((val) << A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE__SHIFT) & A3XX_PC_PRIM_VTX_CNTL_POLYMO… in A3XX_PC_PRIM_VTX_CNTL_POLYMODE_FRONT_PTYPE()
1675 static inline uint32_t A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE(enum adreno_pa_su_sc_draw val) in A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE() argument
1677 …return ((val) << A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE__SHIFT) & A3XX_PC_PRIM_VTX_CNTL_POLYMOD… in A3XX_PC_PRIM_VTX_CNTL_POLYMODE_BACK_PTYPE()
1689 static inline uint32_t A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val) in A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE() argument
1691 …return ((val) << A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE__SHIFT) & A3XX_HLSQ_CONTROL_0_REG_FSTHREADSI… in A3XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
1699 static inline uint32_t A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC(uint32_t val) in A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC() argument
1701 …return ((val) << A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC__SHIFT) & A3XX_HLSQ_CONTROL_0_REG_CY… in A3XX_HLSQ_CONTROL_0_REG_CYCLETIMEOUTLIMITVPC()
1707 static inline uint32_t A3XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val) in A3XX_HLSQ_CONTROL_0_REG_CONSTMODE() argument
1709 …return ((val) << A3XX_HLSQ_CONTROL_0_REG_CONSTMODE__SHIFT) & A3XX_HLSQ_CONTROL_0_REG_CONSTMODE__MA… in A3XX_HLSQ_CONTROL_0_REG_CONSTMODE()
1719 static inline uint32_t A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val) in A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE() argument
1721 …return ((val) << A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE__SHIFT) & A3XX_HLSQ_CONTROL_1_REG_VSTHREADSI… in A3XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()
1726 static inline uint32_t A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID(uint32_t val) in A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID() argument
1728 …return ((val) << A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID__SHIFT) & A3XX_HLSQ_CONTROL_1_REG_FRAGCO… in A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDXYREGID()
1732 static inline uint32_t A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID(uint32_t val) in A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID() argument
1734 …return ((val) << A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID__SHIFT) & A3XX_HLSQ_CONTROL_1_REG_FRAGCO… in A3XX_HLSQ_CONTROL_1_REG_FRAGCOORDZWREGID()
1740 static inline uint32_t A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID(uint32_t val) in A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID() argument
1742 …return ((val) << A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID__SHIFT) & A3XX_HLSQ_CONTROL_2_REG_FACENESSR… in A3XX_HLSQ_CONTROL_2_REG_FACENESSREGID()
1746 static inline uint32_t A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID(uint32_t val) in A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID() argument
1748 …return ((val) << A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID__SHIFT) & A3XX_HLSQ_CONTROL_2_REG_COVVALUER… in A3XX_HLSQ_CONTROL_2_REG_COVVALUEREGID()
1752 static inline uint32_t A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val) in A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD() argument
1754 …return ((val) << A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD__SHIFT) & A3XX_HLSQ_CONTROL_2_REG_PRIM… in A3XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()
1760 static inline uint32_t A3XX_HLSQ_CONTROL_3_REG_REGID(uint32_t val) in A3XX_HLSQ_CONTROL_3_REG_REGID() argument
1762 return ((val) << A3XX_HLSQ_CONTROL_3_REG_REGID__SHIFT) & A3XX_HLSQ_CONTROL_3_REG_REGID__MASK; in A3XX_HLSQ_CONTROL_3_REG_REGID()
1768 static inline uint32_t A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val) in A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH() argument
1770 …return ((val) << A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH__SHIFT) & A3XX_HLSQ_VS_CONTROL_REG_CONSTLENG… in A3XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()
1774 static inline uint32_t A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET(uint32_t val) in A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET() argument
1776 …return ((val) << A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET__SHIFT) & A3XX_HLSQ_VS_CONTROL_REG_CONS… in A3XX_HLSQ_VS_CONTROL_REG_CONSTSTARTOFFSET()
1780 static inline uint32_t A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val) in A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH() argument
1782 …return ((val) << A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH__SHIFT) & A3XX_HLSQ_VS_CONTROL_REG_INSTRLENG… in A3XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()
1788 static inline uint32_t A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val) in A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH() argument
1790 …return ((val) << A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH__SHIFT) & A3XX_HLSQ_FS_CONTROL_REG_CONSTLENG… in A3XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()
1794 static inline uint32_t A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET(uint32_t val) in A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET() argument
1796 …return ((val) << A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET__SHIFT) & A3XX_HLSQ_FS_CONTROL_REG_CONS… in A3XX_HLSQ_FS_CONTROL_REG_CONSTSTARTOFFSET()
1800 static inline uint32_t A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val) in A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH() argument
1802 …return ((val) << A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH__SHIFT) & A3XX_HLSQ_FS_CONTROL_REG_INSTRLENG… in A3XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()
1808 static inline uint32_t A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY(uint32_t val) in A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY() argument
1810 …return ((val) << A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY__SHIFT) & A3XX_HLSQ_CONST_VSPRESV_RA… in A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_STARTENTRY()
1814 static inline uint32_t A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY(uint32_t val) in A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY() argument
1816 …return ((val) << A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY__SHIFT) & A3XX_HLSQ_CONST_VSPRESV_RANG… in A3XX_HLSQ_CONST_VSPRESV_RANGE_REG_ENDENTRY()
1822 static inline uint32_t A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY(uint32_t val) in A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY() argument
1824 …return ((val) << A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY__SHIFT) & A3XX_HLSQ_CONST_FSPRESV_RA… in A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_STARTENTRY()
1828 static inline uint32_t A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY(uint32_t val) in A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY() argument
1830 …return ((val) << A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY__SHIFT) & A3XX_HLSQ_CONST_FSPRESV_RANG… in A3XX_HLSQ_CONST_FSPRESV_RANGE_REG_ENDENTRY()
1836 static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM(uint32_t val) in A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM() argument
1838 …return ((val) << A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM__SHIFT) & A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM__… in A3XX_HLSQ_CL_NDRANGE_0_REG_WORKDIM()
1842 static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0(uint32_t val) in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0() argument
1844 …return ((val) << A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0__SHIFT) & A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALS… in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE0()
1848 static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1(uint32_t val) in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1() argument
1850 …return ((val) << A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1__SHIFT) & A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALS… in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE1()
1854 static inline uint32_t A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2(uint32_t val) in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2() argument
1856 …return ((val) << A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2__SHIFT) & A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALS… in A3XX_HLSQ_CL_NDRANGE_0_REG_LOCALSIZE2()
1884 static inline uint32_t A3XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val) in A3XX_VFD_CONTROL_0_TOTALATTRTOVS() argument
1886 return ((val) << A3XX_VFD_CONTROL_0_TOTALATTRTOVS__SHIFT) & A3XX_VFD_CONTROL_0_TOTALATTRTOVS__MASK; in A3XX_VFD_CONTROL_0_TOTALATTRTOVS()
1890 static inline uint32_t A3XX_VFD_CONTROL_0_PACKETSIZE(uint32_t val) in A3XX_VFD_CONTROL_0_PACKETSIZE() argument
1892 return ((val) << A3XX_VFD_CONTROL_0_PACKETSIZE__SHIFT) & A3XX_VFD_CONTROL_0_PACKETSIZE__MASK; in A3XX_VFD_CONTROL_0_PACKETSIZE()
1896 static inline uint32_t A3XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val) in A3XX_VFD_CONTROL_0_STRMDECINSTRCNT() argument
1898 …return ((val) << A3XX_VFD_CONTROL_0_STRMDECINSTRCNT__SHIFT) & A3XX_VFD_CONTROL_0_STRMDECINSTRCNT__… in A3XX_VFD_CONTROL_0_STRMDECINSTRCNT()
1902 static inline uint32_t A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val) in A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT() argument
1904 …return ((val) << A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT__SHIFT) & A3XX_VFD_CONTROL_0_STRMFETCHINSTRC… in A3XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()
1910 static inline uint32_t A3XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val) in A3XX_VFD_CONTROL_1_MAXSTORAGE() argument
1912 return ((val) << A3XX_VFD_CONTROL_1_MAXSTORAGE__SHIFT) & A3XX_VFD_CONTROL_1_MAXSTORAGE__MASK; in A3XX_VFD_CONTROL_1_MAXSTORAGE()
1916 static inline uint32_t A3XX_VFD_CONTROL_1_MAXTHRESHOLD(uint32_t val) in A3XX_VFD_CONTROL_1_MAXTHRESHOLD() argument
1918 return ((val) << A3XX_VFD_CONTROL_1_MAXTHRESHOLD__SHIFT) & A3XX_VFD_CONTROL_1_MAXTHRESHOLD__MASK; in A3XX_VFD_CONTROL_1_MAXTHRESHOLD()
1922 static inline uint32_t A3XX_VFD_CONTROL_1_MINTHRESHOLD(uint32_t val) in A3XX_VFD_CONTROL_1_MINTHRESHOLD() argument
1924 return ((val) << A3XX_VFD_CONTROL_1_MINTHRESHOLD__SHIFT) & A3XX_VFD_CONTROL_1_MINTHRESHOLD__MASK; in A3XX_VFD_CONTROL_1_MINTHRESHOLD()
1928 static inline uint32_t A3XX_VFD_CONTROL_1_REGID4VTX(uint32_t val) in A3XX_VFD_CONTROL_1_REGID4VTX() argument
1930 return ((val) << A3XX_VFD_CONTROL_1_REGID4VTX__SHIFT) & A3XX_VFD_CONTROL_1_REGID4VTX__MASK; in A3XX_VFD_CONTROL_1_REGID4VTX()
1934 static inline uint32_t A3XX_VFD_CONTROL_1_REGID4INST(uint32_t val) in A3XX_VFD_CONTROL_1_REGID4INST() argument
1936 return ((val) << A3XX_VFD_CONTROL_1_REGID4INST__SHIFT) & A3XX_VFD_CONTROL_1_REGID4INST__MASK; in A3XX_VFD_CONTROL_1_REGID4INST()
1954 static inline uint32_t A3XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val) in A3XX_VFD_FETCH_INSTR_0_FETCHSIZE() argument
1956 return ((val) << A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_FETCHSIZE__MASK; in A3XX_VFD_FETCH_INSTR_0_FETCHSIZE()
1960 static inline uint32_t A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val) in A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE() argument
1962 return ((val) << A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE__MASK; in A3XX_VFD_FETCH_INSTR_0_BUFSTRIDE()
1968 static inline uint32_t A3XX_VFD_FETCH_INSTR_0_INDEXCODE(uint32_t val) in A3XX_VFD_FETCH_INSTR_0_INDEXCODE() argument
1970 return ((val) << A3XX_VFD_FETCH_INSTR_0_INDEXCODE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_INDEXCODE__MASK; in A3XX_VFD_FETCH_INSTR_0_INDEXCODE()
1974 static inline uint32_t A3XX_VFD_FETCH_INSTR_0_STEPRATE(uint32_t val) in A3XX_VFD_FETCH_INSTR_0_STEPRATE() argument
1976 return ((val) << A3XX_VFD_FETCH_INSTR_0_STEPRATE__SHIFT) & A3XX_VFD_FETCH_INSTR_0_STEPRATE__MASK; in A3XX_VFD_FETCH_INSTR_0_STEPRATE()
1986 static inline uint32_t A3XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val) in A3XX_VFD_DECODE_INSTR_WRITEMASK() argument
1988 return ((val) << A3XX_VFD_DECODE_INSTR_WRITEMASK__SHIFT) & A3XX_VFD_DECODE_INSTR_WRITEMASK__MASK; in A3XX_VFD_DECODE_INSTR_WRITEMASK()
1993 static inline uint32_t A3XX_VFD_DECODE_INSTR_FORMAT(enum a3xx_vtx_fmt val) in A3XX_VFD_DECODE_INSTR_FORMAT() argument
1995 return ((val) << A3XX_VFD_DECODE_INSTR_FORMAT__SHIFT) & A3XX_VFD_DECODE_INSTR_FORMAT__MASK; in A3XX_VFD_DECODE_INSTR_FORMAT()
1999 static inline uint32_t A3XX_VFD_DECODE_INSTR_REGID(uint32_t val) in A3XX_VFD_DECODE_INSTR_REGID() argument
2001 return ((val) << A3XX_VFD_DECODE_INSTR_REGID__SHIFT) & A3XX_VFD_DECODE_INSTR_REGID__MASK; in A3XX_VFD_DECODE_INSTR_REGID()
2006 static inline uint32_t A3XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val) in A3XX_VFD_DECODE_INSTR_SWAP() argument
2008 return ((val) << A3XX_VFD_DECODE_INSTR_SWAP__SHIFT) & A3XX_VFD_DECODE_INSTR_SWAP__MASK; in A3XX_VFD_DECODE_INSTR_SWAP()
2012 static inline uint32_t A3XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val) in A3XX_VFD_DECODE_INSTR_SHIFTCNT() argument
2014 return ((val) << A3XX_VFD_DECODE_INSTR_SHIFTCNT__SHIFT) & A3XX_VFD_DECODE_INSTR_SHIFTCNT__MASK; in A3XX_VFD_DECODE_INSTR_SHIFTCNT()
2022 static inline uint32_t A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD(uint32_t val) in A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD() argument
2024 …return ((val) << A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD__SHIFT) & A3XX_VFD_VS_THREADING_T… in A3XX_VFD_VS_THREADING_THRESHOLD_REGID_THRESHOLD()
2028 static inline uint32_t A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT(uint32_t val) in A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT() argument
2030 …return ((val) << A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT__SHIFT) & A3XX_VFD_VS_THREADING_THRE… in A3XX_VFD_VS_THREADING_THRESHOLD_REGID_VTXCNT()
2036 static inline uint32_t A3XX_VPC_ATTR_TOTALATTR(uint32_t val) in A3XX_VPC_ATTR_TOTALATTR() argument
2038 return ((val) << A3XX_VPC_ATTR_TOTALATTR__SHIFT) & A3XX_VPC_ATTR_TOTALATTR__MASK; in A3XX_VPC_ATTR_TOTALATTR()
2043 static inline uint32_t A3XX_VPC_ATTR_THRDASSIGN(uint32_t val) in A3XX_VPC_ATTR_THRDASSIGN() argument
2045 return ((val) << A3XX_VPC_ATTR_THRDASSIGN__SHIFT) & A3XX_VPC_ATTR_THRDASSIGN__MASK; in A3XX_VPC_ATTR_THRDASSIGN()
2049 static inline uint32_t A3XX_VPC_ATTR_LMSIZE(uint32_t val) in A3XX_VPC_ATTR_LMSIZE() argument
2051 return ((val) << A3XX_VPC_ATTR_LMSIZE__SHIFT) & A3XX_VPC_ATTR_LMSIZE__MASK; in A3XX_VPC_ATTR_LMSIZE()
2057 static inline uint32_t A3XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val) in A3XX_VPC_PACK_NUMFPNONPOSVAR() argument
2059 return ((val) << A3XX_VPC_PACK_NUMFPNONPOSVAR__SHIFT) & A3XX_VPC_PACK_NUMFPNONPOSVAR__MASK; in A3XX_VPC_PACK_NUMFPNONPOSVAR()
2063 static inline uint32_t A3XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val) in A3XX_VPC_PACK_NUMNONPOSVSVAR() argument
2065 return ((val) << A3XX_VPC_PACK_NUMNONPOSVSVAR__SHIFT) & A3XX_VPC_PACK_NUMNONPOSVSVAR__MASK; in A3XX_VPC_PACK_NUMNONPOSVSVAR()
2073 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C0(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C0() argument
2075 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C0__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C0__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C0()
2079 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C1(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C1() argument
2081 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C1__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C1__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C1()
2085 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C2(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C2() argument
2087 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C2__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C2__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C2()
2091 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C3(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C3() argument
2093 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C3__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C3__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C3()
2097 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C4(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C4() argument
2099 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C4__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C4__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C4()
2103 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C5(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C5() argument
2105 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C5__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C5__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C5()
2109 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C6(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C6() argument
2111 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C6__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C6__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C6()
2115 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C7(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C7() argument
2117 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C7__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C7__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C7()
2121 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C8(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C8() argument
2123 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C8__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C8__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C8()
2127 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_C9(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_C9() argument
2129 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_C9__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_C9__MASK; in A3XX_VPC_VARYING_INTERP_MODE_C9()
2133 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CA(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CA() argument
2135 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CA__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CA__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CA()
2139 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CB(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CB() argument
2141 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CB__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CB__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CB()
2145 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CC(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CC() argument
2147 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CC__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CC__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CC()
2151 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CD(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CD() argument
2153 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CD__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CD__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CD()
2157 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CE(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CE() argument
2159 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CE__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CE__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CE()
2163 static inline uint32_t A3XX_VPC_VARYING_INTERP_MODE_CF(enum a3xx_intp_mode val) in A3XX_VPC_VARYING_INTERP_MODE_CF() argument
2165 return ((val) << A3XX_VPC_VARYING_INTERP_MODE_CF__SHIFT) & A3XX_VPC_VARYING_INTERP_MODE_CF__MASK; in A3XX_VPC_VARYING_INTERP_MODE_CF()
2173 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C0(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C0() argument
2175 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C0__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C0__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C0()
2179 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C1(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C1() argument
2181 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C1__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C1__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C1()
2185 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C2(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C2() argument
2187 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C2__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C2__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C2()
2191 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C3(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C3() argument
2193 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C3__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C3__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C3()
2197 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C4(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C4() argument
2199 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C4__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C4__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C4()
2203 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C5(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C5() argument
2205 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C5__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C5__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C5()
2209 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C6(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C6() argument
2211 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C6__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C6__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C6()
2215 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C7(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C7() argument
2217 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C7__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C7__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C7()
2221 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C8(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C8() argument
2223 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C8__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C8__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C8()
2227 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_C9(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_C9() argument
2229 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_C9__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_C9__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_C9()
2233 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CA(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CA() argument
2235 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CA__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CA__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CA()
2239 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CB(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CB() argument
2241 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CB__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CB__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CB()
2245 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CC(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CC() argument
2247 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CC__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CC__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CC()
2251 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CD(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CD() argument
2253 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CD__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CD__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CD()
2257 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CE(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CE() argument
2259 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CE__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CE__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CE()
2263 static inline uint32_t A3XX_VPC_VARYING_PS_REPL_MODE_CF(enum a3xx_repl_mode val) in A3XX_VPC_VARYING_PS_REPL_MODE_CF() argument
2265 return ((val) << A3XX_VPC_VARYING_PS_REPL_MODE_CF__SHIFT) & A3XX_VPC_VARYING_PS_REPL_MODE_CF__MASK; in A3XX_VPC_VARYING_PS_REPL_MODE_CF()
2276 static inline uint32_t A3XX_SP_SP_CTRL_REG_CONSTMODE(uint32_t val) in A3XX_SP_SP_CTRL_REG_CONSTMODE() argument
2278 return ((val) << A3XX_SP_SP_CTRL_REG_CONSTMODE__SHIFT) & A3XX_SP_SP_CTRL_REG_CONSTMODE__MASK; in A3XX_SP_SP_CTRL_REG_CONSTMODE()
2283 static inline uint32_t A3XX_SP_SP_CTRL_REG_SLEEPMODE(uint32_t val) in A3XX_SP_SP_CTRL_REG_SLEEPMODE() argument
2285 return ((val) << A3XX_SP_SP_CTRL_REG_SLEEPMODE__SHIFT) & A3XX_SP_SP_CTRL_REG_SLEEPMODE__MASK; in A3XX_SP_SP_CTRL_REG_SLEEPMODE()
2289 static inline uint32_t A3XX_SP_SP_CTRL_REG_L0MODE(uint32_t val) in A3XX_SP_SP_CTRL_REG_L0MODE() argument
2291 return ((val) << A3XX_SP_SP_CTRL_REG_L0MODE__SHIFT) & A3XX_SP_SP_CTRL_REG_L0MODE__MASK; in A3XX_SP_SP_CTRL_REG_L0MODE()
2297 static inline uint32_t A3XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val) in A3XX_SP_VS_CTRL_REG0_THREADMODE() argument
2299 return ((val) << A3XX_SP_VS_CTRL_REG0_THREADMODE__SHIFT) & A3XX_SP_VS_CTRL_REG0_THREADMODE__MASK; in A3XX_SP_VS_CTRL_REG0_THREADMODE()
2303 static inline uint32_t A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE(enum a3xx_instrbuffermode val) in A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE() argument
2305 …return ((val) << A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE__SHIFT) & A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMO… in A3XX_SP_VS_CTRL_REG0_INSTRBUFFERMODE()
2311 static inline uint32_t A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) in A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT() argument
2313 …return ((val) << A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A3XX_SP_VS_CTRL_REG0_HALFREGFOOTP… in A3XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
2317 static inline uint32_t A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) in A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT() argument
2319 …return ((val) << A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A3XX_SP_VS_CTRL_REG0_FULLREGFOOTP… in A3XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
2323 static inline uint32_t A3XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) in A3XX_SP_VS_CTRL_REG0_THREADSIZE() argument
2325 return ((val) << A3XX_SP_VS_CTRL_REG0_THREADSIZE__SHIFT) & A3XX_SP_VS_CTRL_REG0_THREADSIZE__MASK; in A3XX_SP_VS_CTRL_REG0_THREADSIZE()
2330 static inline uint32_t A3XX_SP_VS_CTRL_REG0_LENGTH(uint32_t val) in A3XX_SP_VS_CTRL_REG0_LENGTH() argument
2332 return ((val) << A3XX_SP_VS_CTRL_REG0_LENGTH__SHIFT) & A3XX_SP_VS_CTRL_REG0_LENGTH__MASK; in A3XX_SP_VS_CTRL_REG0_LENGTH()
2338 static inline uint32_t A3XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val) in A3XX_SP_VS_CTRL_REG1_CONSTLENGTH() argument
2340 return ((val) << A3XX_SP_VS_CTRL_REG1_CONSTLENGTH__SHIFT) & A3XX_SP_VS_CTRL_REG1_CONSTLENGTH__MASK; in A3XX_SP_VS_CTRL_REG1_CONSTLENGTH()
2344 static inline uint32_t A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT(uint32_t val) in A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT() argument
2346 …return ((val) << A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT__SHIFT) & A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT… in A3XX_SP_VS_CTRL_REG1_CONSTFOOTPRINT()
2350 static inline uint32_t A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val) in A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING() argument
2352 …return ((val) << A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) & A3XX_SP_VS_CTRL_REG1_INITIALOUT… in A3XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()
2358 static inline uint32_t A3XX_SP_VS_PARAM_REG_POSREGID(uint32_t val) in A3XX_SP_VS_PARAM_REG_POSREGID() argument
2360 return ((val) << A3XX_SP_VS_PARAM_REG_POSREGID__SHIFT) & A3XX_SP_VS_PARAM_REG_POSREGID__MASK; in A3XX_SP_VS_PARAM_REG_POSREGID()
2364 static inline uint32_t A3XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val) in A3XX_SP_VS_PARAM_REG_PSIZEREGID() argument
2366 return ((val) << A3XX_SP_VS_PARAM_REG_PSIZEREGID__SHIFT) & A3XX_SP_VS_PARAM_REG_PSIZEREGID__MASK; in A3XX_SP_VS_PARAM_REG_PSIZEREGID()
2371 static inline uint32_t A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val) in A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR() argument
2373 …return ((val) << A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__SHIFT) & A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR__… in A3XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()
2381 static inline uint32_t A3XX_SP_VS_OUT_REG_A_REGID(uint32_t val) in A3XX_SP_VS_OUT_REG_A_REGID() argument
2383 return ((val) << A3XX_SP_VS_OUT_REG_A_REGID__SHIFT) & A3XX_SP_VS_OUT_REG_A_REGID__MASK; in A3XX_SP_VS_OUT_REG_A_REGID()
2388 static inline uint32_t A3XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val) in A3XX_SP_VS_OUT_REG_A_COMPMASK() argument
2390 return ((val) << A3XX_SP_VS_OUT_REG_A_COMPMASK__SHIFT) & A3XX_SP_VS_OUT_REG_A_COMPMASK__MASK; in A3XX_SP_VS_OUT_REG_A_COMPMASK()
2394 static inline uint32_t A3XX_SP_VS_OUT_REG_B_REGID(uint32_t val) in A3XX_SP_VS_OUT_REG_B_REGID() argument
2396 return ((val) << A3XX_SP_VS_OUT_REG_B_REGID__SHIFT) & A3XX_SP_VS_OUT_REG_B_REGID__MASK; in A3XX_SP_VS_OUT_REG_B_REGID()
2401 static inline uint32_t A3XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val) in A3XX_SP_VS_OUT_REG_B_COMPMASK() argument
2403 return ((val) << A3XX_SP_VS_OUT_REG_B_COMPMASK__SHIFT) & A3XX_SP_VS_OUT_REG_B_COMPMASK__MASK; in A3XX_SP_VS_OUT_REG_B_COMPMASK()
2411 static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val) in A3XX_SP_VS_VPC_DST_REG_OUTLOC0() argument
2413 return ((val) << A3XX_SP_VS_VPC_DST_REG_OUTLOC0__SHIFT) & A3XX_SP_VS_VPC_DST_REG_OUTLOC0__MASK; in A3XX_SP_VS_VPC_DST_REG_OUTLOC0()
2417 static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val) in A3XX_SP_VS_VPC_DST_REG_OUTLOC1() argument
2419 return ((val) << A3XX_SP_VS_VPC_DST_REG_OUTLOC1__SHIFT) & A3XX_SP_VS_VPC_DST_REG_OUTLOC1__MASK; in A3XX_SP_VS_VPC_DST_REG_OUTLOC1()
2423 static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val) in A3XX_SP_VS_VPC_DST_REG_OUTLOC2() argument
2425 return ((val) << A3XX_SP_VS_VPC_DST_REG_OUTLOC2__SHIFT) & A3XX_SP_VS_VPC_DST_REG_OUTLOC2__MASK; in A3XX_SP_VS_VPC_DST_REG_OUTLOC2()
2429 static inline uint32_t A3XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val) in A3XX_SP_VS_VPC_DST_REG_OUTLOC3() argument
2431 return ((val) << A3XX_SP_VS_VPC_DST_REG_OUTLOC3__SHIFT) & A3XX_SP_VS_VPC_DST_REG_OUTLOC3__MASK; in A3XX_SP_VS_VPC_DST_REG_OUTLOC3()
2437 static inline uint32_t A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET(uint32_t val) in A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET() argument
2439 …return ((val) << A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__SHIFT) & A3XX_SP_VS_OBJ_OFFSET_RE… in A3XX_SP_VS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET()
2443 static inline uint32_t A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val) in A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET() argument
2445 …return ((val) << A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A3XX_SP_VS_OBJ_OFFSET_REG_C… in A3XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2449 static inline uint32_t A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val) in A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET() argument
2451 …return ((val) << A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A3XX_SP_VS_OBJ_OFFSET_REG_SHA… in A3XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2459 static inline uint32_t A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM(uint32_t val) in A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM() argument
2461 …return ((val) << A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__SHIFT) & A3XX_SP_VS_PVT_MEM_PARAM_RE… in A3XX_SP_VS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM()
2465 static inline uint32_t A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET(uint32_t val) in A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET() argument
2467 …return ((val) << A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__SHIFT) & A3XX_SP_VS_PVT_MEM_PARAM_REG… in A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKOFFSET()
2471 static inline uint32_t A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD(uint32_t val) in A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD() argument
2473 …return ((val) << A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__SHIFT) & A3XX_SP_VS_PVT_MEM_PA… in A3XX_SP_VS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD()
2479 static inline uint32_t A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN(uint32_t val) in A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN() argument
2481 …return ((val) << A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN__SHIFT) & A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTL… in A3XX_SP_VS_PVT_MEM_ADDR_REG_BURSTLEN()
2485 static inline uint32_t A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val) in A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS() argument
2487 …return ((val >> 5) << A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT) & A3XX_SP_VS_PVT_MEM_… in A3XX_SP_VS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS()
2495 static inline uint32_t A3XX_SP_VS_LENGTH_REG_SHADERLENGTH(uint32_t val) in A3XX_SP_VS_LENGTH_REG_SHADERLENGTH() argument
2497 …return ((val) << A3XX_SP_VS_LENGTH_REG_SHADERLENGTH__SHIFT) & A3XX_SP_VS_LENGTH_REG_SHADERLENGTH__… in A3XX_SP_VS_LENGTH_REG_SHADERLENGTH()
2503 static inline uint32_t A3XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val) in A3XX_SP_FS_CTRL_REG0_THREADMODE() argument
2505 return ((val) << A3XX_SP_FS_CTRL_REG0_THREADMODE__SHIFT) & A3XX_SP_FS_CTRL_REG0_THREADMODE__MASK; in A3XX_SP_FS_CTRL_REG0_THREADMODE()
2509 static inline uint32_t A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE(enum a3xx_instrbuffermode val) in A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE() argument
2511 …return ((val) << A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE__SHIFT) & A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMO… in A3XX_SP_FS_CTRL_REG0_INSTRBUFFERMODE()
2517 static inline uint32_t A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val) in A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT() argument
2519 …return ((val) << A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT__SHIFT) & A3XX_SP_FS_CTRL_REG0_HALFREGFOOTP… in A3XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
2523 static inline uint32_t A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val) in A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT() argument
2525 …return ((val) << A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT__SHIFT) & A3XX_SP_FS_CTRL_REG0_FULLREGFOOTP… in A3XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
2532 static inline uint32_t A3XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val) in A3XX_SP_FS_CTRL_REG0_THREADSIZE() argument
2534 return ((val) << A3XX_SP_FS_CTRL_REG0_THREADSIZE__SHIFT) & A3XX_SP_FS_CTRL_REG0_THREADSIZE__MASK; in A3XX_SP_FS_CTRL_REG0_THREADSIZE()
2541 static inline uint32_t A3XX_SP_FS_CTRL_REG0_LENGTH(uint32_t val) in A3XX_SP_FS_CTRL_REG0_LENGTH() argument
2543 return ((val) << A3XX_SP_FS_CTRL_REG0_LENGTH__SHIFT) & A3XX_SP_FS_CTRL_REG0_LENGTH__MASK; in A3XX_SP_FS_CTRL_REG0_LENGTH()
2549 static inline uint32_t A3XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val) in A3XX_SP_FS_CTRL_REG1_CONSTLENGTH() argument
2551 return ((val) << A3XX_SP_FS_CTRL_REG1_CONSTLENGTH__SHIFT) & A3XX_SP_FS_CTRL_REG1_CONSTLENGTH__MASK; in A3XX_SP_FS_CTRL_REG1_CONSTLENGTH()
2555 static inline uint32_t A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT(uint32_t val) in A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT() argument
2557 …return ((val) << A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT__SHIFT) & A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT… in A3XX_SP_FS_CTRL_REG1_CONSTFOOTPRINT()
2561 static inline uint32_t A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val) in A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING() argument
2563 …return ((val) << A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING__SHIFT) & A3XX_SP_FS_CTRL_REG1_INITIALOUT… in A3XX_SP_FS_CTRL_REG1_INITIALOUTSTANDING()
2567 static inline uint32_t A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET(uint32_t val) in A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET() argument
2569 …return ((val) << A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET__SHIFT) & A3XX_SP_FS_CTRL_REG1_HALFPRECVAR… in A3XX_SP_FS_CTRL_REG1_HALFPRECVAROFFSET()
2575 static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET(uint32_t val) in A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET() argument
2577 …return ((val) << A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET__SHIFT) & A3XX_SP_FS_OBJ_OFFSET_RE… in A3XX_SP_FS_OBJ_OFFSET_REG_FIRSTEXECINSTROFFSET()
2581 static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val) in A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET() argument
2583 …return ((val) << A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET__SHIFT) & A3XX_SP_FS_OBJ_OFFSET_REG_C… in A3XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
2587 static inline uint32_t A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val) in A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET() argument
2589 …return ((val) << A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET__SHIFT) & A3XX_SP_FS_OBJ_OFFSET_REG_SHA… in A3XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
2597 static inline uint32_t A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM(uint32_t val) in A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM() argument
2599 …return ((val) << A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM__SHIFT) & A3XX_SP_FS_PVT_MEM_PARAM_RE… in A3XX_SP_FS_PVT_MEM_PARAM_REG_MEMSIZEPERITEM()
2603 static inline uint32_t A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET(uint32_t val) in A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET() argument
2605 …return ((val) << A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET__SHIFT) & A3XX_SP_FS_PVT_MEM_PARAM_REG… in A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKOFFSET()
2609 static inline uint32_t A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD(uint32_t val) in A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD() argument
2611 …return ((val) << A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD__SHIFT) & A3XX_SP_FS_PVT_MEM_PA… in A3XX_SP_FS_PVT_MEM_PARAM_REG_HWSTACKSIZEPERTHREAD()
2617 static inline uint32_t A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN(uint32_t val) in A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN() argument
2619 …return ((val) << A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN__SHIFT) & A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTL… in A3XX_SP_FS_PVT_MEM_ADDR_REG_BURSTLEN()
2623 static inline uint32_t A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS(uint32_t val) in A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS() argument
2625 …return ((val >> 5) << A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS__SHIFT) & A3XX_SP_FS_PVT_MEM_… in A3XX_SP_FS_PVT_MEM_ADDR_REG_SHADERSTARTADDRESS()
2637 static inline uint32_t A3XX_SP_FS_OUTPUT_REG_MRT(uint32_t val) in A3XX_SP_FS_OUTPUT_REG_MRT() argument
2639 return ((val) << A3XX_SP_FS_OUTPUT_REG_MRT__SHIFT) & A3XX_SP_FS_OUTPUT_REG_MRT__MASK; in A3XX_SP_FS_OUTPUT_REG_MRT()
2644 static inline uint32_t A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val) in A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID() argument
2646 …return ((val) << A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__SHIFT) & A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID__MA… in A3XX_SP_FS_OUTPUT_REG_DEPTH_REGID()
2654 static inline uint32_t A3XX_SP_FS_MRT_REG_REGID(uint32_t val) in A3XX_SP_FS_MRT_REG_REGID() argument
2656 return ((val) << A3XX_SP_FS_MRT_REG_REGID__SHIFT) & A3XX_SP_FS_MRT_REG_REGID__MASK; in A3XX_SP_FS_MRT_REG_REGID()
2667 static inline uint32_t A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT(enum a3xx_color_fmt val) in A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT() argument
2669 …return ((val) << A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT__SHIFT) & A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFO… in A3XX_SP_FS_IMAGE_OUTPUT_REG_MRTFORMAT()
2675 static inline uint32_t A3XX_SP_FS_LENGTH_REG_SHADERLENGTH(uint32_t val) in A3XX_SP_FS_LENGTH_REG_SHADERLENGTH() argument
2677 …return ((val) << A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__SHIFT) & A3XX_SP_FS_LENGTH_REG_SHADERLENGTH__… in A3XX_SP_FS_LENGTH_REG_SHADERLENGTH()
2685 static inline uint32_t A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET(uint32_t val) in A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET() argument
2687 …return ((val) << A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET__SHIFT) & A3XX_TPL1_TP_VS_TEX_OFFSET_SAM… in A3XX_TPL1_TP_VS_TEX_OFFSET_SAMPLEROFFSET()
2691 static inline uint32_t A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET(uint32_t val) in A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET() argument
2693 …return ((val) << A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET__SHIFT) & A3XX_TPL1_TP_VS_TEX_OFFSET_MEMO… in A3XX_TPL1_TP_VS_TEX_OFFSET_MEMOBJOFFSET()
2697 static inline uint32_t A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR(uint32_t val) in A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR() argument
2699 …return ((val) << A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR__SHIFT) & A3XX_TPL1_TP_VS_TEX_OFFSET_BASE… in A3XX_TPL1_TP_VS_TEX_OFFSET_BASETABLEPTR()
2707 static inline uint32_t A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET(uint32_t val) in A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET() argument
2709 …return ((val) << A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET__SHIFT) & A3XX_TPL1_TP_FS_TEX_OFFSET_SAM… in A3XX_TPL1_TP_FS_TEX_OFFSET_SAMPLEROFFSET()
2713 static inline uint32_t A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET(uint32_t val) in A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET() argument
2715 …return ((val) << A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET__SHIFT) & A3XX_TPL1_TP_FS_TEX_OFFSET_MEMO… in A3XX_TPL1_TP_FS_TEX_OFFSET_MEMOBJOFFSET()
2719 static inline uint32_t A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR(uint32_t val) in A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR() argument
2721 …return ((val) << A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR__SHIFT) & A3XX_TPL1_TP_FS_TEX_OFFSET_BASE… in A3XX_TPL1_TP_FS_TEX_OFFSET_BASETABLEPTR()
2803 static inline uint32_t A3XX_VSC_BIN_SIZE_WIDTH(uint32_t val) in A3XX_VSC_BIN_SIZE_WIDTH() argument
2805 return ((val >> 5) << A3XX_VSC_BIN_SIZE_WIDTH__SHIFT) & A3XX_VSC_BIN_SIZE_WIDTH__MASK; in A3XX_VSC_BIN_SIZE_WIDTH()
2809 static inline uint32_t A3XX_VSC_BIN_SIZE_HEIGHT(uint32_t val) in A3XX_VSC_BIN_SIZE_HEIGHT() argument
2811 return ((val >> 5) << A3XX_VSC_BIN_SIZE_HEIGHT__SHIFT) & A3XX_VSC_BIN_SIZE_HEIGHT__MASK; in A3XX_VSC_BIN_SIZE_HEIGHT()
2821 static inline uint32_t A3XX_VSC_PIPE_CONFIG_X(uint32_t val) in A3XX_VSC_PIPE_CONFIG_X() argument
2823 return ((val) << A3XX_VSC_PIPE_CONFIG_X__SHIFT) & A3XX_VSC_PIPE_CONFIG_X__MASK; in A3XX_VSC_PIPE_CONFIG_X()
2827 static inline uint32_t A3XX_VSC_PIPE_CONFIG_Y(uint32_t val) in A3XX_VSC_PIPE_CONFIG_Y() argument
2829 return ((val) << A3XX_VSC_PIPE_CONFIG_Y__SHIFT) & A3XX_VSC_PIPE_CONFIG_Y__MASK; in A3XX_VSC_PIPE_CONFIG_Y()
2833 static inline uint32_t A3XX_VSC_PIPE_CONFIG_W(uint32_t val) in A3XX_VSC_PIPE_CONFIG_W() argument
2835 return ((val) << A3XX_VSC_PIPE_CONFIG_W__SHIFT) & A3XX_VSC_PIPE_CONFIG_W__MASK; in A3XX_VSC_PIPE_CONFIG_W()
2839 static inline uint32_t A3XX_VSC_PIPE_CONFIG_H(uint32_t val) in A3XX_VSC_PIPE_CONFIG_H() argument
2841 return ((val) << A3XX_VSC_PIPE_CONFIG_H__SHIFT) & A3XX_VSC_PIPE_CONFIG_H__MASK; in A3XX_VSC_PIPE_CONFIG_H()
2892 static inline uint32_t A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val) in A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH() argument
2894 …return ((val) << A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH__SHIFT) & A3XX_RB_FRAME_BUFFER_DIMENSION_WID… in A3XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
2898 static inline uint32_t A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val) in A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT() argument
2900 …return ((val) << A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT__SHIFT) & A3XX_RB_FRAME_BUFFER_DIMENSION_HE… in A3XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
2946 static inline uint32_t A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR(uint32_t val) in A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR() argument
2948 …return ((val) << A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR__SHIFT) & A3XX_UCHE_CACHE_INVALIDATE0_REG_AD… in A3XX_UCHE_CACHE_INVALIDATE0_REG_ADDR()
2954 static inline uint32_t A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR(uint32_t val) in A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR() argument
2956 …return ((val) << A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR__SHIFT) & A3XX_UCHE_CACHE_INVALIDATE1_REG_AD… in A3XX_UCHE_CACHE_INVALIDATE1_REG_ADDR()
2960 static inline uint32_t A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE(enum a3xx_cache_opcode val) in A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE() argument
2962 …return ((val) << A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE__SHIFT) & A3XX_UCHE_CACHE_INVALIDATE1_REG_… in A3XX_UCHE_CACHE_INVALIDATE1_REG_OPCODE()
3007 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE(enum pc_di_primtype val) in A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE() argument
3009 …return ((val) << A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE__SHIFT) & A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE__MA… in A3XX_VGT_DRAW_INITIATOR_PRIM_TYPE()
3013 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT(enum pc_di_src_sel val) in A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT() argument
3015 …return ((val) << A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__SHIFT) & A3XX_VGT_DRAW_INITIATOR_SOURCE_SE… in A3XX_VGT_DRAW_INITIATOR_SOURCE_SELECT()
3019 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_VIS_CULL(enum pc_di_vis_cull_mode val) in A3XX_VGT_DRAW_INITIATOR_VIS_CULL() argument
3021 return ((val) << A3XX_VGT_DRAW_INITIATOR_VIS_CULL__SHIFT) & A3XX_VGT_DRAW_INITIATOR_VIS_CULL__MASK; in A3XX_VGT_DRAW_INITIATOR_VIS_CULL()
3025 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE(enum pc_di_index_size val) in A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE() argument
3027 …return ((val) << A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE__SHIFT) & A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE__… in A3XX_VGT_DRAW_INITIATOR_INDEX_SIZE()
3034 static inline uint32_t A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES(uint32_t val) in A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES() argument
3036 …return ((val) << A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT) & A3XX_VGT_DRAW_INITIATOR_NUM_INSTA… in A3XX_VGT_DRAW_INITIATOR_NUM_INSTANCES()
3046 static inline uint32_t A3XX_TEX_SAMP_0_XY_MAG(enum a3xx_tex_filter val) in A3XX_TEX_SAMP_0_XY_MAG() argument
3048 return ((val) << A3XX_TEX_SAMP_0_XY_MAG__SHIFT) & A3XX_TEX_SAMP_0_XY_MAG__MASK; in A3XX_TEX_SAMP_0_XY_MAG()
3052 static inline uint32_t A3XX_TEX_SAMP_0_XY_MIN(enum a3xx_tex_filter val) in A3XX_TEX_SAMP_0_XY_MIN() argument
3054 return ((val) << A3XX_TEX_SAMP_0_XY_MIN__SHIFT) & A3XX_TEX_SAMP_0_XY_MIN__MASK; in A3XX_TEX_SAMP_0_XY_MIN()
3058 static inline uint32_t A3XX_TEX_SAMP_0_WRAP_S(enum a3xx_tex_clamp val) in A3XX_TEX_SAMP_0_WRAP_S() argument
3060 return ((val) << A3XX_TEX_SAMP_0_WRAP_S__SHIFT) & A3XX_TEX_SAMP_0_WRAP_S__MASK; in A3XX_TEX_SAMP_0_WRAP_S()
3064 static inline uint32_t A3XX_TEX_SAMP_0_WRAP_T(enum a3xx_tex_clamp val) in A3XX_TEX_SAMP_0_WRAP_T() argument
3066 return ((val) << A3XX_TEX_SAMP_0_WRAP_T__SHIFT) & A3XX_TEX_SAMP_0_WRAP_T__MASK; in A3XX_TEX_SAMP_0_WRAP_T()
3070 static inline uint32_t A3XX_TEX_SAMP_0_WRAP_R(enum a3xx_tex_clamp val) in A3XX_TEX_SAMP_0_WRAP_R() argument
3072 return ((val) << A3XX_TEX_SAMP_0_WRAP_R__SHIFT) & A3XX_TEX_SAMP_0_WRAP_R__MASK; in A3XX_TEX_SAMP_0_WRAP_R()
3076 static inline uint32_t A3XX_TEX_SAMP_0_ANISO(enum a3xx_tex_aniso val) in A3XX_TEX_SAMP_0_ANISO() argument
3078 return ((val) << A3XX_TEX_SAMP_0_ANISO__SHIFT) & A3XX_TEX_SAMP_0_ANISO__MASK; in A3XX_TEX_SAMP_0_ANISO()
3082 static inline uint32_t A3XX_TEX_SAMP_0_COMPARE_FUNC(enum adreno_compare_func val) in A3XX_TEX_SAMP_0_COMPARE_FUNC() argument
3084 return ((val) << A3XX_TEX_SAMP_0_COMPARE_FUNC__SHIFT) & A3XX_TEX_SAMP_0_COMPARE_FUNC__MASK; in A3XX_TEX_SAMP_0_COMPARE_FUNC()
3092 static inline uint32_t A3XX_TEX_SAMP_1_LOD_BIAS(float val) in A3XX_TEX_SAMP_1_LOD_BIAS() argument
3094 …return ((((int32_t)(val * 64.0))) << A3XX_TEX_SAMP_1_LOD_BIAS__SHIFT) & A3XX_TEX_SAMP_1_LOD_BIAS__… in A3XX_TEX_SAMP_1_LOD_BIAS()
3098 static inline uint32_t A3XX_TEX_SAMP_1_MAX_LOD(float val) in A3XX_TEX_SAMP_1_MAX_LOD() argument
3100 …return ((((uint32_t)(val * 64.0))) << A3XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A3XX_TEX_SAMP_1_MAX_LOD__M… in A3XX_TEX_SAMP_1_MAX_LOD()
3104 static inline uint32_t A3XX_TEX_SAMP_1_MIN_LOD(float val) in A3XX_TEX_SAMP_1_MIN_LOD() argument
3106 …return ((((uint32_t)(val * 64.0))) << A3XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A3XX_TEX_SAMP_1_MIN_LOD__M… in A3XX_TEX_SAMP_1_MIN_LOD()
3114 static inline uint32_t A3XX_TEX_CONST_0_SWIZ_X(enum a3xx_tex_swiz val) in A3XX_TEX_CONST_0_SWIZ_X() argument
3116 return ((val) << A3XX_TEX_CONST_0_SWIZ_X__SHIFT) & A3XX_TEX_CONST_0_SWIZ_X__MASK; in A3XX_TEX_CONST_0_SWIZ_X()
3120 static inline uint32_t A3XX_TEX_CONST_0_SWIZ_Y(enum a3xx_tex_swiz val) in A3XX_TEX_CONST_0_SWIZ_Y() argument
3122 return ((val) << A3XX_TEX_CONST_0_SWIZ_Y__SHIFT) & A3XX_TEX_CONST_0_SWIZ_Y__MASK; in A3XX_TEX_CONST_0_SWIZ_Y()
3126 static inline uint32_t A3XX_TEX_CONST_0_SWIZ_Z(enum a3xx_tex_swiz val) in A3XX_TEX_CONST_0_SWIZ_Z() argument
3128 return ((val) << A3XX_TEX_CONST_0_SWIZ_Z__SHIFT) & A3XX_TEX_CONST_0_SWIZ_Z__MASK; in A3XX_TEX_CONST_0_SWIZ_Z()
3132 static inline uint32_t A3XX_TEX_CONST_0_SWIZ_W(enum a3xx_tex_swiz val) in A3XX_TEX_CONST_0_SWIZ_W() argument
3134 return ((val) << A3XX_TEX_CONST_0_SWIZ_W__SHIFT) & A3XX_TEX_CONST_0_SWIZ_W__MASK; in A3XX_TEX_CONST_0_SWIZ_W()
3138 static inline uint32_t A3XX_TEX_CONST_0_MIPLVLS(uint32_t val) in A3XX_TEX_CONST_0_MIPLVLS() argument
3140 return ((val) << A3XX_TEX_CONST_0_MIPLVLS__SHIFT) & A3XX_TEX_CONST_0_MIPLVLS__MASK; in A3XX_TEX_CONST_0_MIPLVLS()
3144 static inline uint32_t A3XX_TEX_CONST_0_MSAATEX(enum a3xx_tex_msaa val) in A3XX_TEX_CONST_0_MSAATEX() argument
3146 return ((val) << A3XX_TEX_CONST_0_MSAATEX__SHIFT) & A3XX_TEX_CONST_0_MSAATEX__MASK; in A3XX_TEX_CONST_0_MSAATEX()
3150 static inline uint32_t A3XX_TEX_CONST_0_FMT(enum a3xx_tex_fmt val) in A3XX_TEX_CONST_0_FMT() argument
3152 return ((val) << A3XX_TEX_CONST_0_FMT__SHIFT) & A3XX_TEX_CONST_0_FMT__MASK; in A3XX_TEX_CONST_0_FMT()
3157 static inline uint32_t A3XX_TEX_CONST_0_TYPE(enum a3xx_tex_type val) in A3XX_TEX_CONST_0_TYPE() argument
3159 return ((val) << A3XX_TEX_CONST_0_TYPE__SHIFT) & A3XX_TEX_CONST_0_TYPE__MASK; in A3XX_TEX_CONST_0_TYPE()
3165 static inline uint32_t A3XX_TEX_CONST_1_HEIGHT(uint32_t val) in A3XX_TEX_CONST_1_HEIGHT() argument
3167 return ((val) << A3XX_TEX_CONST_1_HEIGHT__SHIFT) & A3XX_TEX_CONST_1_HEIGHT__MASK; in A3XX_TEX_CONST_1_HEIGHT()
3171 static inline uint32_t A3XX_TEX_CONST_1_WIDTH(uint32_t val) in A3XX_TEX_CONST_1_WIDTH() argument
3173 return ((val) << A3XX_TEX_CONST_1_WIDTH__SHIFT) & A3XX_TEX_CONST_1_WIDTH__MASK; in A3XX_TEX_CONST_1_WIDTH()
3177 static inline uint32_t A3XX_TEX_CONST_1_FETCHSIZE(enum a3xx_tex_fetchsize val) in A3XX_TEX_CONST_1_FETCHSIZE() argument
3179 return ((val) << A3XX_TEX_CONST_1_FETCHSIZE__SHIFT) & A3XX_TEX_CONST_1_FETCHSIZE__MASK; in A3XX_TEX_CONST_1_FETCHSIZE()
3185 static inline uint32_t A3XX_TEX_CONST_2_INDX(uint32_t val) in A3XX_TEX_CONST_2_INDX() argument
3187 return ((val) << A3XX_TEX_CONST_2_INDX__SHIFT) & A3XX_TEX_CONST_2_INDX__MASK; in A3XX_TEX_CONST_2_INDX()
3191 static inline uint32_t A3XX_TEX_CONST_2_PITCH(uint32_t val) in A3XX_TEX_CONST_2_PITCH() argument
3193 return ((val) << A3XX_TEX_CONST_2_PITCH__SHIFT) & A3XX_TEX_CONST_2_PITCH__MASK; in A3XX_TEX_CONST_2_PITCH()
3197 static inline uint32_t A3XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val) in A3XX_TEX_CONST_2_SWAP() argument
3199 return ((val) << A3XX_TEX_CONST_2_SWAP__SHIFT) & A3XX_TEX_CONST_2_SWAP__MASK; in A3XX_TEX_CONST_2_SWAP()
3205 static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ1(uint32_t val) in A3XX_TEX_CONST_3_LAYERSZ1() argument
3207 return ((val >> 12) << A3XX_TEX_CONST_3_LAYERSZ1__SHIFT) & A3XX_TEX_CONST_3_LAYERSZ1__MASK; in A3XX_TEX_CONST_3_LAYERSZ1()
3211 static inline uint32_t A3XX_TEX_CONST_3_DEPTH(uint32_t val) in A3XX_TEX_CONST_3_DEPTH() argument
3213 return ((val) << A3XX_TEX_CONST_3_DEPTH__SHIFT) & A3XX_TEX_CONST_3_DEPTH__MASK; in A3XX_TEX_CONST_3_DEPTH()
3217 static inline uint32_t A3XX_TEX_CONST_3_LAYERSZ2(uint32_t val) in A3XX_TEX_CONST_3_LAYERSZ2() argument
3219 return ((val >> 12) << A3XX_TEX_CONST_3_LAYERSZ2__SHIFT) & A3XX_TEX_CONST_3_LAYERSZ2__MASK; in A3XX_TEX_CONST_3_LAYERSZ2()