316 static inline uint32_t A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR()  argument
318 …return ((val) << A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHA…  in A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR()
322 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR()  argument
324 …return ((val) << A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHA…  in A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR()
328 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR()  argument
330 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR()
334 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR()  argument
336 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR()
340 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR()  argument
342 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR()
346 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR()  argument
348 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR()
352 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR()  argument
354 …return ((val) << A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BE…  in A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR()
358 static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR()  argument
360 …return ((val) << A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_…  in A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR()
364 static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR()  argument
366 …return ((val) << A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_…  in A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR()
370 static inline uint32_t A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR()  argument
372 …return ((val) << A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHA…  in A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR()
376 static inline uint32_t A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val)  in A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR()  argument
378 …return ((val) << A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR__SHIFT) & A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHA…  in A2XX_MH_MMU_CONFIG_PA_W_CLNT_BEHAVIOR()
384 static inline uint32_t A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS(uint32_t val)  in A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS()  argument
386 …return ((val) << A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS__SHIFT) & A2XX_MH_MMU_VA_RANGE_NUM_64KB_REG…  in A2XX_MH_MMU_VA_RANGE_NUM_64KB_REGIONS()
390 static inline uint32_t A2XX_MH_MMU_VA_RANGE_VA_BASE(uint32_t val)  in A2XX_MH_MMU_VA_RANGE_VA_BASE()  argument
392 	return ((val) << A2XX_MH_MMU_VA_RANGE_VA_BASE__SHIFT) & A2XX_MH_MMU_VA_RANGE_VA_BASE__MASK;  in A2XX_MH_MMU_VA_RANGE_VA_BASE()
491 static inline uint32_t A2XX_RBBM_STATUS_CMDFIFO_AVAIL(uint32_t val)  in A2XX_RBBM_STATUS_CMDFIFO_AVAIL()  argument
493 	return ((val) << A2XX_RBBM_STATUS_CMDFIFO_AVAIL__SHIFT) & A2XX_RBBM_STATUS_CMDFIFO_AVAIL__MASK;  in A2XX_RBBM_STATUS_CMDFIFO_AVAIL()
518 static inline uint32_t A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT(uint32_t val)  in A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT()  argument
520 …return ((val) << A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT__SHIFT) & A2XX_MH_ARBITER_CONFIG_SAME_PAGE…  in A2XX_MH_ARBITER_CONFIG_SAME_PAGE_LIMIT()
528 static inline uint32_t A2XX_MH_ARBITER_CONFIG_PAGE_SIZE(uint32_t val)  in A2XX_MH_ARBITER_CONFIG_PAGE_SIZE()  argument
530 	return ((val) << A2XX_MH_ARBITER_CONFIG_PAGE_SIZE__SHIFT) & A2XX_MH_ARBITER_CONFIG_PAGE_SIZE__MASK;  in A2XX_MH_ARBITER_CONFIG_PAGE_SIZE()
537 static inline uint32_t A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT(uint32_t val)  in A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT()  argument
539 …return ((val) << A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT__SHIFT) & A2XX_MH_ARBITER_CONFIG_IN_FLIGHT…  in A2XX_MH_ARBITER_CONFIG_IN_FLIGHT_LIMIT()
563 static inline uint32_t A2XX_A220_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A2XX_A220_VSC_BIN_SIZE_WIDTH()  argument
565 	return ((val >> 5) << A2XX_A220_VSC_BIN_SIZE_WIDTH__SHIFT) & A2XX_A220_VSC_BIN_SIZE_WIDTH__MASK;  in A2XX_A220_VSC_BIN_SIZE_WIDTH()
569 static inline uint32_t A2XX_A220_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A2XX_A220_VSC_BIN_SIZE_HEIGHT()  argument
571 	return ((val >> 5) << A2XX_A220_VSC_BIN_SIZE_HEIGHT__SHIFT) & A2XX_A220_VSC_BIN_SIZE_HEIGHT__MASK;  in A2XX_A220_VSC_BIN_SIZE_HEIGHT()
599 static inline uint32_t A2XX_PA_SU_FACE_DATA_BASE_ADDR(uint32_t val)  in A2XX_PA_SU_FACE_DATA_BASE_ADDR()  argument
601 	return ((val) << A2XX_PA_SU_FACE_DATA_BASE_ADDR__SHIFT) & A2XX_PA_SU_FACE_DATA_BASE_ADDR__MASK;  in A2XX_PA_SU_FACE_DATA_BASE_ADDR()
608 static inline uint32_t A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX(uint32_t val)  in A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX()  argument
610 …return ((val) << A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX__SHIFT) & A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX…  in A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_PIX()
614 static inline uint32_t A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX(uint32_t val)  in A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX()  argument
616 …return ((val) << A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX__SHIFT) & A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX…  in A2XX_SQ_GPR_MANAGEMENT_REG_SIZE_VTX()
624 static inline uint32_t A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX(uint32_t val)  in A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX()  argument
626 …return ((val) << A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX__SHIFT) & A2XX_SQ_INST_STORE_MANAGMENT…  in A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_PIX()
630 static inline uint32_t A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX(uint32_t val)  in A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX()  argument
632 …return ((val) << A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX__SHIFT) & A2XX_SQ_INST_STORE_MANAGMENT…  in A2XX_SQ_INST_STORE_MANAGMENT_INST_BASE_VTX()
692 static inline uint32_t A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT(uint32_t val)  in A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT()  argument
694 …return ((val) << A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT__SHIFT) & A2XX_RB_BC_CONTROL_ACCUM_TIMEOU…  in A2XX_RB_BC_CONTROL_ACCUM_TIMEOUT_SELECT()
703 static inline uint32_t A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT(uint32_t val)  in A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT()  argument
705 …return ((val) << A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT__SHIFT) & A2XX_RB_BC_CONTROL_AZ_THROTTLE_COU…  in A2XX_RB_BC_CONTROL_AZ_THROTTLE_COUNT()
713 static inline uint32_t A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK(uint32_t val)  in A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK()  argument
715 …return ((val) << A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK__SHIFT) & A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK…  in A2XX_RB_BC_CONTROL_ACCUM_ALLOC_MASK()
720 static inline uint32_t A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT(uint32_t val)  in A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT()  argument
722 …return ((val) << A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT__SHIFT) & A2XX_RB_BC_CONTROL_ACCUM_DATA_…  in A2XX_RB_BC_CONTROL_ACCUM_DATA_FIFO_LIMIT()
726 static inline uint32_t A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT(uint32_t val)  in A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT()  argument
728 …return ((val) << A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT__SHIFT) & A2XX_RB_BC_CONTROL_MEM_EXP…  in A2XX_RB_BC_CONTROL_MEM_EXPORT_TIMEOUT_SELECT()
743 static inline uint32_t A2XX_RB_SURFACE_INFO_SURFACE_PITCH(uint32_t val)  in A2XX_RB_SURFACE_INFO_SURFACE_PITCH()  argument
745 …return ((val) << A2XX_RB_SURFACE_INFO_SURFACE_PITCH__SHIFT) & A2XX_RB_SURFACE_INFO_SURFACE_PITCH__…  in A2XX_RB_SURFACE_INFO_SURFACE_PITCH()
749 static inline uint32_t A2XX_RB_SURFACE_INFO_MSAA_SAMPLES(uint32_t val)  in A2XX_RB_SURFACE_INFO_MSAA_SAMPLES()  argument
751 …return ((val) << A2XX_RB_SURFACE_INFO_MSAA_SAMPLES__SHIFT) & A2XX_RB_SURFACE_INFO_MSAA_SAMPLES__MA…  in A2XX_RB_SURFACE_INFO_MSAA_SAMPLES()
757 static inline uint32_t A2XX_RB_COLOR_INFO_FORMAT(enum a2xx_colorformatx val)  in A2XX_RB_COLOR_INFO_FORMAT()  argument
759 	return ((val) << A2XX_RB_COLOR_INFO_FORMAT__SHIFT) & A2XX_RB_COLOR_INFO_FORMAT__MASK;  in A2XX_RB_COLOR_INFO_FORMAT()
763 static inline uint32_t A2XX_RB_COLOR_INFO_ROUND_MODE(uint32_t val)  in A2XX_RB_COLOR_INFO_ROUND_MODE()  argument
765 	return ((val) << A2XX_RB_COLOR_INFO_ROUND_MODE__SHIFT) & A2XX_RB_COLOR_INFO_ROUND_MODE__MASK;  in A2XX_RB_COLOR_INFO_ROUND_MODE()
770 static inline uint32_t A2XX_RB_COLOR_INFO_ENDIAN(uint32_t val)  in A2XX_RB_COLOR_INFO_ENDIAN()  argument
772 	return ((val) << A2XX_RB_COLOR_INFO_ENDIAN__SHIFT) & A2XX_RB_COLOR_INFO_ENDIAN__MASK;  in A2XX_RB_COLOR_INFO_ENDIAN()
776 static inline uint32_t A2XX_RB_COLOR_INFO_SWAP(uint32_t val)  in A2XX_RB_COLOR_INFO_SWAP()  argument
778 	return ((val) << A2XX_RB_COLOR_INFO_SWAP__SHIFT) & A2XX_RB_COLOR_INFO_SWAP__MASK;  in A2XX_RB_COLOR_INFO_SWAP()
782 static inline uint32_t A2XX_RB_COLOR_INFO_BASE(uint32_t val)  in A2XX_RB_COLOR_INFO_BASE()  argument
784 	return ((val >> 12) << A2XX_RB_COLOR_INFO_BASE__SHIFT) & A2XX_RB_COLOR_INFO_BASE__MASK;  in A2XX_RB_COLOR_INFO_BASE()
790 static inline uint32_t A2XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum adreno_rb_depth_format val)  in A2XX_RB_DEPTH_INFO_DEPTH_FORMAT()  argument
792 	return ((val) << A2XX_RB_DEPTH_INFO_DEPTH_FORMAT__SHIFT) & A2XX_RB_DEPTH_INFO_DEPTH_FORMAT__MASK;  in A2XX_RB_DEPTH_INFO_DEPTH_FORMAT()
796 static inline uint32_t A2XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)  in A2XX_RB_DEPTH_INFO_DEPTH_BASE()  argument
798 	return ((val >> 12) << A2XX_RB_DEPTH_INFO_DEPTH_BASE__SHIFT) & A2XX_RB_DEPTH_INFO_DEPTH_BASE__MASK;  in A2XX_RB_DEPTH_INFO_DEPTH_BASE()
809 static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_TL_X(uint32_t val)  in A2XX_PA_SC_SCREEN_SCISSOR_TL_X()  argument
811 	return ((val) << A2XX_PA_SC_SCREEN_SCISSOR_TL_X__SHIFT) & A2XX_PA_SC_SCREEN_SCISSOR_TL_X__MASK;  in A2XX_PA_SC_SCREEN_SCISSOR_TL_X()
815 static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)  in A2XX_PA_SC_SCREEN_SCISSOR_TL_Y()  argument
817 	return ((val) << A2XX_PA_SC_SCREEN_SCISSOR_TL_Y__SHIFT) & A2XX_PA_SC_SCREEN_SCISSOR_TL_Y__MASK;  in A2XX_PA_SC_SCREEN_SCISSOR_TL_Y()
824 static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_BR_X(uint32_t val)  in A2XX_PA_SC_SCREEN_SCISSOR_BR_X()  argument
826 	return ((val) << A2XX_PA_SC_SCREEN_SCISSOR_BR_X__SHIFT) & A2XX_PA_SC_SCREEN_SCISSOR_BR_X__MASK;  in A2XX_PA_SC_SCREEN_SCISSOR_BR_X()
830 static inline uint32_t A2XX_PA_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)  in A2XX_PA_SC_SCREEN_SCISSOR_BR_Y()  argument
832 	return ((val) << A2XX_PA_SC_SCREEN_SCISSOR_BR_Y__SHIFT) & A2XX_PA_SC_SCREEN_SCISSOR_BR_Y__MASK;  in A2XX_PA_SC_SCREEN_SCISSOR_BR_Y()
838 static inline uint32_t A2XX_PA_SC_WINDOW_OFFSET_X(int32_t val)  in A2XX_PA_SC_WINDOW_OFFSET_X()  argument
840 	return ((val) << A2XX_PA_SC_WINDOW_OFFSET_X__SHIFT) & A2XX_PA_SC_WINDOW_OFFSET_X__MASK;  in A2XX_PA_SC_WINDOW_OFFSET_X()
844 static inline uint32_t A2XX_PA_SC_WINDOW_OFFSET_Y(int32_t val)  in A2XX_PA_SC_WINDOW_OFFSET_Y()  argument
846 	return ((val) << A2XX_PA_SC_WINDOW_OFFSET_Y__SHIFT) & A2XX_PA_SC_WINDOW_OFFSET_Y__MASK;  in A2XX_PA_SC_WINDOW_OFFSET_Y()
854 static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A2XX_PA_SC_WINDOW_SCISSOR_TL_X()  argument
856 	return ((val) << A2XX_PA_SC_WINDOW_SCISSOR_TL_X__SHIFT) & A2XX_PA_SC_WINDOW_SCISSOR_TL_X__MASK;  in A2XX_PA_SC_WINDOW_SCISSOR_TL_X()
860 static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A2XX_PA_SC_WINDOW_SCISSOR_TL_Y()  argument
862 	return ((val) << A2XX_PA_SC_WINDOW_SCISSOR_TL_Y__SHIFT) & A2XX_PA_SC_WINDOW_SCISSOR_TL_Y__MASK;  in A2XX_PA_SC_WINDOW_SCISSOR_TL_Y()
869 static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A2XX_PA_SC_WINDOW_SCISSOR_BR_X()  argument
871 	return ((val) << A2XX_PA_SC_WINDOW_SCISSOR_BR_X__SHIFT) & A2XX_PA_SC_WINDOW_SCISSOR_BR_X__MASK;  in A2XX_PA_SC_WINDOW_SCISSOR_BR_X()
875 static inline uint32_t A2XX_PA_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A2XX_PA_SC_WINDOW_SCISSOR_BR_Y()  argument
877 	return ((val) << A2XX_PA_SC_WINDOW_SCISSOR_BR_Y__SHIFT) & A2XX_PA_SC_WINDOW_SCISSOR_BR_Y__MASK;  in A2XX_PA_SC_WINDOW_SCISSOR_BR_Y()
907 static inline uint32_t A2XX_RB_FOG_COLOR_FOG_RED(uint32_t val)  in A2XX_RB_FOG_COLOR_FOG_RED()  argument
909 	return ((val) << A2XX_RB_FOG_COLOR_FOG_RED__SHIFT) & A2XX_RB_FOG_COLOR_FOG_RED__MASK;  in A2XX_RB_FOG_COLOR_FOG_RED()
913 static inline uint32_t A2XX_RB_FOG_COLOR_FOG_GREEN(uint32_t val)  in A2XX_RB_FOG_COLOR_FOG_GREEN()  argument
915 	return ((val) << A2XX_RB_FOG_COLOR_FOG_GREEN__SHIFT) & A2XX_RB_FOG_COLOR_FOG_GREEN__MASK;  in A2XX_RB_FOG_COLOR_FOG_GREEN()
919 static inline uint32_t A2XX_RB_FOG_COLOR_FOG_BLUE(uint32_t val)  in A2XX_RB_FOG_COLOR_FOG_BLUE()  argument
921 	return ((val) << A2XX_RB_FOG_COLOR_FOG_BLUE__SHIFT) & A2XX_RB_FOG_COLOR_FOG_BLUE__MASK;  in A2XX_RB_FOG_COLOR_FOG_BLUE()
927 static inline uint32_t A2XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A2XX_RB_STENCILREFMASK_BF_STENCILREF()  argument
929 …return ((val) << A2XX_RB_STENCILREFMASK_BF_STENCILREF__SHIFT) & A2XX_RB_STENCILREFMASK_BF_STENCILR…  in A2XX_RB_STENCILREFMASK_BF_STENCILREF()
933 static inline uint32_t A2XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A2XX_RB_STENCILREFMASK_BF_STENCILMASK()  argument
935 …return ((val) << A2XX_RB_STENCILREFMASK_BF_STENCILMASK__SHIFT) & A2XX_RB_STENCILREFMASK_BF_STENCIL…  in A2XX_RB_STENCILREFMASK_BF_STENCILMASK()
939 static inline uint32_t A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()  argument
941 …return ((val) << A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK__SHIFT) & A2XX_RB_STENCILREFMASK_BF_ST…  in A2XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
947 static inline uint32_t A2XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A2XX_RB_STENCILREFMASK_STENCILREF()  argument
949 …return ((val) << A2XX_RB_STENCILREFMASK_STENCILREF__SHIFT) & A2XX_RB_STENCILREFMASK_STENCILREF__MA…  in A2XX_RB_STENCILREFMASK_STENCILREF()
953 static inline uint32_t A2XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A2XX_RB_STENCILREFMASK_STENCILMASK()  argument
955 …return ((val) << A2XX_RB_STENCILREFMASK_STENCILMASK__SHIFT) & A2XX_RB_STENCILREFMASK_STENCILMASK__…  in A2XX_RB_STENCILREFMASK_STENCILMASK()
959 static inline uint32_t A2XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A2XX_RB_STENCILREFMASK_STENCILWRITEMASK()  argument
961 …return ((val) << A2XX_RB_STENCILREFMASK_STENCILWRITEMASK__SHIFT) & A2XX_RB_STENCILREFMASK_STENCILW…  in A2XX_RB_STENCILREFMASK_STENCILWRITEMASK()
969 static inline uint32_t A2XX_PA_CL_VPORT_XSCALE(float val)  in A2XX_PA_CL_VPORT_XSCALE()  argument
971 	return ((fui(val)) << A2XX_PA_CL_VPORT_XSCALE__SHIFT) & A2XX_PA_CL_VPORT_XSCALE__MASK;  in A2XX_PA_CL_VPORT_XSCALE()
977 static inline uint32_t A2XX_PA_CL_VPORT_XOFFSET(float val)  in A2XX_PA_CL_VPORT_XOFFSET()  argument
979 	return ((fui(val)) << A2XX_PA_CL_VPORT_XOFFSET__SHIFT) & A2XX_PA_CL_VPORT_XOFFSET__MASK;  in A2XX_PA_CL_VPORT_XOFFSET()
985 static inline uint32_t A2XX_PA_CL_VPORT_YSCALE(float val)  in A2XX_PA_CL_VPORT_YSCALE()  argument
987 	return ((fui(val)) << A2XX_PA_CL_VPORT_YSCALE__SHIFT) & A2XX_PA_CL_VPORT_YSCALE__MASK;  in A2XX_PA_CL_VPORT_YSCALE()
993 static inline uint32_t A2XX_PA_CL_VPORT_YOFFSET(float val)  in A2XX_PA_CL_VPORT_YOFFSET()  argument
995 	return ((fui(val)) << A2XX_PA_CL_VPORT_YOFFSET__SHIFT) & A2XX_PA_CL_VPORT_YOFFSET__MASK;  in A2XX_PA_CL_VPORT_YOFFSET()
1001 static inline uint32_t A2XX_PA_CL_VPORT_ZSCALE(float val)  in A2XX_PA_CL_VPORT_ZSCALE()  argument
1003 	return ((fui(val)) << A2XX_PA_CL_VPORT_ZSCALE__SHIFT) & A2XX_PA_CL_VPORT_ZSCALE__MASK;  in A2XX_PA_CL_VPORT_ZSCALE()
1009 static inline uint32_t A2XX_PA_CL_VPORT_ZOFFSET(float val)  in A2XX_PA_CL_VPORT_ZOFFSET()  argument
1011 	return ((fui(val)) << A2XX_PA_CL_VPORT_ZOFFSET__SHIFT) & A2XX_PA_CL_VPORT_ZOFFSET__MASK;  in A2XX_PA_CL_VPORT_ZOFFSET()
1017 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_VS_REGS(uint32_t val)  in A2XX_SQ_PROGRAM_CNTL_VS_REGS()  argument
1019 	return ((val) << A2XX_SQ_PROGRAM_CNTL_VS_REGS__SHIFT) & A2XX_SQ_PROGRAM_CNTL_VS_REGS__MASK;  in A2XX_SQ_PROGRAM_CNTL_VS_REGS()
1023 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_PS_REGS(uint32_t val)  in A2XX_SQ_PROGRAM_CNTL_PS_REGS()  argument
1025 	return ((val) << A2XX_SQ_PROGRAM_CNTL_PS_REGS__SHIFT) & A2XX_SQ_PROGRAM_CNTL_PS_REGS__MASK;  in A2XX_SQ_PROGRAM_CNTL_PS_REGS()
1033 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT(uint32_t val)  in A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT()  argument
1035 …return ((val) << A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT__SHIFT) & A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COU…  in A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_COUNT()
1039 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE(enum a2xx_sq_ps_vtx_mode val)  in A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE()  argument
1041 …return ((val) << A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE__SHIFT) & A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE…  in A2XX_SQ_PROGRAM_CNTL_VS_EXPORT_MODE()
1045 static inline uint32_t A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE(uint32_t val)  in A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE()  argument
1047 …return ((val) << A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE__SHIFT) & A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE…  in A2XX_SQ_PROGRAM_CNTL_PS_EXPORT_MODE()
1056 static inline uint32_t A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL(enum a2xx_sq_sample_cntl val)  in A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL()  argument
1058 …return ((val) << A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL__SHIFT) & A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL…  in A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL()
1062 static inline uint32_t A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS(uint32_t val)  in A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS()  argument
1064 …return ((val) << A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS__SHIFT) & A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS__…  in A2XX_SQ_CONTEXT_MISC_PARAM_GEN_POS()
1073 static inline uint32_t A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE(uint32_t val)  in A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE()  argument
1075 …return ((val) << A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE__SHIFT) & A2XX_SQ_INTERPOLATOR_CNTL_PARAM_S…  in A2XX_SQ_INTERPOLATOR_CNTL_PARAM_SHADE()
1079 static inline uint32_t A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN(uint32_t val)  in A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN()  argument
1081 …return ((val) << A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN__SHIFT) & A2XX_SQ_INTERPOLATOR_CNTL_SA…  in A2XX_SQ_INTERPOLATOR_CNTL_SAMPLING_PATTERN()
1087 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_0(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_0()  argument
1089 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_0__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_0__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_0()
1093 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_1(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_1()  argument
1095 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_1__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_1__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_1()
1099 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_2(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_2()  argument
1101 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_2__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_2__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_2()
1105 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_3(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_3()  argument
1107 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_3__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_3__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_3()
1111 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_4(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_4()  argument
1113 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_4__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_4__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_4()
1117 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_5(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_5()  argument
1119 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_5__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_5__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_5()
1123 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_6(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_6()  argument
1125 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_6__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_6__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_6()
1129 static inline uint32_t A2XX_SQ_WRAPPING_0_PARAM_WRAP_7(uint32_t val)  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_7()  argument
1131 	return ((val) << A2XX_SQ_WRAPPING_0_PARAM_WRAP_7__SHIFT) & A2XX_SQ_WRAPPING_0_PARAM_WRAP_7__MASK;  in A2XX_SQ_WRAPPING_0_PARAM_WRAP_7()
1137 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_8(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_8()  argument
1139 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_8__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_8__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_8()
1143 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_9(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_9()  argument
1145 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_9__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_9__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_9()
1149 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_10(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_10()  argument
1151 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_10__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_10__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_10()
1155 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_11(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_11()  argument
1157 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_11__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_11__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_11()
1161 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_12(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_12()  argument
1163 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_12__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_12__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_12()
1167 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_13(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_13()  argument
1169 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_13__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_13__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_13()
1173 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_14(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_14()  argument
1175 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_14__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_14__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_14()
1179 static inline uint32_t A2XX_SQ_WRAPPING_1_PARAM_WRAP_15(uint32_t val)  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_15()  argument
1181 	return ((val) << A2XX_SQ_WRAPPING_1_PARAM_WRAP_15__SHIFT) & A2XX_SQ_WRAPPING_1_PARAM_WRAP_15__MASK;  in A2XX_SQ_WRAPPING_1_PARAM_WRAP_15()
1187 static inline uint32_t A2XX_SQ_PS_PROGRAM_BASE(uint32_t val)  in A2XX_SQ_PS_PROGRAM_BASE()  argument
1189 	return ((val) << A2XX_SQ_PS_PROGRAM_BASE__SHIFT) & A2XX_SQ_PS_PROGRAM_BASE__MASK;  in A2XX_SQ_PS_PROGRAM_BASE()
1193 static inline uint32_t A2XX_SQ_PS_PROGRAM_SIZE(uint32_t val)  in A2XX_SQ_PS_PROGRAM_SIZE()  argument
1195 	return ((val) << A2XX_SQ_PS_PROGRAM_SIZE__SHIFT) & A2XX_SQ_PS_PROGRAM_SIZE__MASK;  in A2XX_SQ_PS_PROGRAM_SIZE()
1201 static inline uint32_t A2XX_SQ_VS_PROGRAM_BASE(uint32_t val)  in A2XX_SQ_VS_PROGRAM_BASE()  argument
1203 	return ((val) << A2XX_SQ_VS_PROGRAM_BASE__SHIFT) & A2XX_SQ_VS_PROGRAM_BASE__MASK;  in A2XX_SQ_VS_PROGRAM_BASE()
1207 static inline uint32_t A2XX_SQ_VS_PROGRAM_SIZE(uint32_t val)  in A2XX_SQ_VS_PROGRAM_SIZE()  argument
1209 	return ((val) << A2XX_SQ_VS_PROGRAM_SIZE__SHIFT) & A2XX_SQ_VS_PROGRAM_SIZE__MASK;  in A2XX_SQ_VS_PROGRAM_SIZE()
1217 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE(enum pc_di_primtype val)  in A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE()  argument
1219 …return ((val) << A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE__SHIFT) & A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE__MA…  in A2XX_VGT_DRAW_INITIATOR_PRIM_TYPE()
1223 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT(enum pc_di_src_sel val)  in A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT()  argument
1225 …return ((val) << A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT__SHIFT) & A2XX_VGT_DRAW_INITIATOR_SOURCE_SE…  in A2XX_VGT_DRAW_INITIATOR_SOURCE_SELECT()
1229 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_VIS_CULL(enum pc_di_vis_cull_mode val)  in A2XX_VGT_DRAW_INITIATOR_VIS_CULL()  argument
1231 	return ((val) << A2XX_VGT_DRAW_INITIATOR_VIS_CULL__SHIFT) & A2XX_VGT_DRAW_INITIATOR_VIS_CULL__MASK;  in A2XX_VGT_DRAW_INITIATOR_VIS_CULL()
1235 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE(enum pc_di_index_size val)  in A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE()  argument
1237 …return ((val) << A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE__SHIFT) & A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE__…  in A2XX_VGT_DRAW_INITIATOR_INDEX_SIZE()
1244 static inline uint32_t A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES(uint32_t val)  in A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES()  argument
1246 …return ((val) << A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES__SHIFT) & A2XX_VGT_DRAW_INITIATOR_NUM_INSTA…  in A2XX_VGT_DRAW_INITIATOR_NUM_INSTANCES()
1258 static inline uint32_t A2XX_RB_DEPTHCONTROL_ZFUNC(enum adreno_compare_func val)  in A2XX_RB_DEPTHCONTROL_ZFUNC()  argument
1260 	return ((val) << A2XX_RB_DEPTHCONTROL_ZFUNC__SHIFT) & A2XX_RB_DEPTHCONTROL_ZFUNC__MASK;  in A2XX_RB_DEPTHCONTROL_ZFUNC()
1265 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFUNC(enum adreno_compare_func val)  in A2XX_RB_DEPTHCONTROL_STENCILFUNC()  argument
1267 	return ((val) << A2XX_RB_DEPTHCONTROL_STENCILFUNC__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILFUNC__MASK;  in A2XX_RB_DEPTHCONTROL_STENCILFUNC()
1271 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFAIL(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILFAIL()  argument
1273 	return ((val) << A2XX_RB_DEPTHCONTROL_STENCILFAIL__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILFAIL__MASK;  in A2XX_RB_DEPTHCONTROL_STENCILFAIL()
1277 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZPASS(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILZPASS()  argument
1279 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILZPASS__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILZPASS__MA…  in A2XX_RB_DEPTHCONTROL_STENCILZPASS()
1283 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZFAIL(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILZFAIL()  argument
1285 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILZFAIL__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILZFAIL__MA…  in A2XX_RB_DEPTHCONTROL_STENCILZFAIL()
1289 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF(enum adreno_compare_func val)  in A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF()  argument
1291 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF…  in A2XX_RB_DEPTHCONTROL_STENCILFUNC_BF()
1295 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF()  argument
1297 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF…  in A2XX_RB_DEPTHCONTROL_STENCILFAIL_BF()
1301 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF()  argument
1303 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILZPASS_…  in A2XX_RB_DEPTHCONTROL_STENCILZPASS_BF()
1307 static inline uint32_t A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF(enum adreno_stencil_op val)  in A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF()  argument
1309 …return ((val) << A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF__SHIFT) & A2XX_RB_DEPTHCONTROL_STENCILZFAIL_…  in A2XX_RB_DEPTHCONTROL_STENCILZFAIL_BF()
1315 static inline uint32_t A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND(enum adreno_rb_blend_factor val)  in A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND()  argument
1317 …return ((val) << A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND__SHIFT) & A2XX_RB_BLEND_CONTROL_COLOR_SRCBLE…  in A2XX_RB_BLEND_CONTROL_COLOR_SRCBLEND()
1321 static inline uint32_t A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN(enum a2xx_rb_blend_opcode val)  in A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN()  argument
1323 …return ((val) << A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN__SHIFT) & A2XX_RB_BLEND_CONTROL_COLOR_COMB_F…  in A2XX_RB_BLEND_CONTROL_COLOR_COMB_FCN()
1327 static inline uint32_t A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND(enum adreno_rb_blend_factor val)  in A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND()  argument
1329 …return ((val) << A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND__SHIFT) & A2XX_RB_BLEND_CONTROL_COLOR_DESTB…  in A2XX_RB_BLEND_CONTROL_COLOR_DESTBLEND()
1333 static inline uint32_t A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND(enum adreno_rb_blend_factor val)  in A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND()  argument
1335 …return ((val) << A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND__SHIFT) & A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLE…  in A2XX_RB_BLEND_CONTROL_ALPHA_SRCBLEND()
1339 static inline uint32_t A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN(enum a2xx_rb_blend_opcode val)  in A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN()  argument
1341 …return ((val) << A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN__SHIFT) & A2XX_RB_BLEND_CONTROL_ALPHA_COMB_F…  in A2XX_RB_BLEND_CONTROL_ALPHA_COMB_FCN()
1345 static inline uint32_t A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND(enum adreno_rb_blend_factor val)  in A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND()  argument
1347 …return ((val) << A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND__SHIFT) & A2XX_RB_BLEND_CONTROL_ALPHA_DESTB…  in A2XX_RB_BLEND_CONTROL_ALPHA_DESTBLEND()
1355 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_FUNC(enum adreno_compare_func val)  in A2XX_RB_COLORCONTROL_ALPHA_FUNC()  argument
1357 	return ((val) << A2XX_RB_COLORCONTROL_ALPHA_FUNC__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_FUNC__MASK;  in A2XX_RB_COLORCONTROL_ALPHA_FUNC()
1366 static inline uint32_t A2XX_RB_COLORCONTROL_ROP_CODE(uint32_t val)  in A2XX_RB_COLORCONTROL_ROP_CODE()  argument
1368 	return ((val) << A2XX_RB_COLORCONTROL_ROP_CODE__SHIFT) & A2XX_RB_COLORCONTROL_ROP_CODE__MASK;  in A2XX_RB_COLORCONTROL_ROP_CODE()
1372 static inline uint32_t A2XX_RB_COLORCONTROL_DITHER_MODE(enum adreno_rb_dither_mode val)  in A2XX_RB_COLORCONTROL_DITHER_MODE()  argument
1374 	return ((val) << A2XX_RB_COLORCONTROL_DITHER_MODE__SHIFT) & A2XX_RB_COLORCONTROL_DITHER_MODE__MASK;  in A2XX_RB_COLORCONTROL_DITHER_MODE()
1378 static inline uint32_t A2XX_RB_COLORCONTROL_DITHER_TYPE(enum a2xx_rb_dither_type val)  in A2XX_RB_COLORCONTROL_DITHER_TYPE()  argument
1380 	return ((val) << A2XX_RB_COLORCONTROL_DITHER_TYPE__SHIFT) & A2XX_RB_COLORCONTROL_DITHER_TYPE__MASK;  in A2XX_RB_COLORCONTROL_DITHER_TYPE()
1385 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0(uint32_t val)  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0()  argument
1387 …return ((val) << A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_T…  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET0()
1391 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1(uint32_t val)  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1()  argument
1393 …return ((val) << A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_T…  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET1()
1397 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2(uint32_t val)  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2()  argument
1399 …return ((val) << A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_T…  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET2()
1403 static inline uint32_t A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3(uint32_t val)  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3()  argument
1405 …return ((val) << A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3__SHIFT) & A2XX_RB_COLORCONTROL_ALPHA_T…  in A2XX_RB_COLORCONTROL_ALPHA_TO_MASK_OFFSET3()
1411 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN()  argument
1413 …return ((val) << A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN__…  in A2XX_VGT_CURRENT_BIN_ID_MAX_COLUMN()
1417 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MAX_ROW(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MAX_ROW()  argument
1419 	return ((val) << A2XX_VGT_CURRENT_BIN_ID_MAX_ROW__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MAX_ROW__MASK;  in A2XX_VGT_CURRENT_BIN_ID_MAX_ROW()
1423 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK()  argument
1425 …return ((val) << A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MAX…  in A2XX_VGT_CURRENT_BIN_ID_MAX_GUARD_BAND_MASK()
1433 static inline uint32_t A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF(enum a2xx_dx_clip_space val)  in A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF()  argument
1435 …return ((val) << A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF__SHIFT) & A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPA…  in A2XX_PA_CL_CLIP_CNTL_DX_CLIP_SPACE_DEF()
1449 static inline uint32_t A2XX_PA_SU_SC_MODE_CNTL_POLYMODE(enum a2xx_pa_su_sc_polymode val)  in A2XX_PA_SU_SC_MODE_CNTL_POLYMODE()  argument
1451 	return ((val) << A2XX_PA_SU_SC_MODE_CNTL_POLYMODE__SHIFT) & A2XX_PA_SU_SC_MODE_CNTL_POLYMODE__MASK;  in A2XX_PA_SU_SC_MODE_CNTL_POLYMODE()
1455 static inline uint32_t A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE(enum adreno_pa_su_sc_draw val)  in A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE()  argument
1457 …return ((val) << A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE__SHIFT) & A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE…  in A2XX_PA_SU_SC_MODE_CNTL_FRONT_PTYPE()
1461 static inline uint32_t A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE(enum adreno_pa_su_sc_draw val)  in A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE()  argument
1463 …return ((val) << A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE__SHIFT) & A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE__…  in A2XX_PA_SU_SC_MODE_CNTL_BACK_PTYPE()
1497 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN()  argument
1499 …return ((val) << A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN__…  in A2XX_VGT_CURRENT_BIN_ID_MIN_COLUMN()
1503 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MIN_ROW(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MIN_ROW()  argument
1505 	return ((val) << A2XX_VGT_CURRENT_BIN_ID_MIN_ROW__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MIN_ROW__MASK;  in A2XX_VGT_CURRENT_BIN_ID_MIN_ROW()
1509 static inline uint32_t A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK(uint32_t val)  in A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK()  argument
1511 …return ((val) << A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK__SHIFT) & A2XX_VGT_CURRENT_BIN_ID_MIN…  in A2XX_VGT_CURRENT_BIN_ID_MIN_GUARD_BAND_MASK()
1517 static inline uint32_t A2XX_RB_MODECONTROL_EDRAM_MODE(enum a2xx_rb_edram_mode val)  in A2XX_RB_MODECONTROL_EDRAM_MODE()  argument
1519 	return ((val) << A2XX_RB_MODECONTROL_EDRAM_MODE__SHIFT) & A2XX_RB_MODECONTROL_EDRAM_MODE__MASK;  in A2XX_RB_MODECONTROL_EDRAM_MODE()
1529 static inline uint32_t A2XX_CLEAR_COLOR_RED(uint32_t val)  in A2XX_CLEAR_COLOR_RED()  argument
1531 	return ((val) << A2XX_CLEAR_COLOR_RED__SHIFT) & A2XX_CLEAR_COLOR_RED__MASK;  in A2XX_CLEAR_COLOR_RED()
1535 static inline uint32_t A2XX_CLEAR_COLOR_GREEN(uint32_t val)  in A2XX_CLEAR_COLOR_GREEN()  argument
1537 	return ((val) << A2XX_CLEAR_COLOR_GREEN__SHIFT) & A2XX_CLEAR_COLOR_GREEN__MASK;  in A2XX_CLEAR_COLOR_GREEN()
1541 static inline uint32_t A2XX_CLEAR_COLOR_BLUE(uint32_t val)  in A2XX_CLEAR_COLOR_BLUE()  argument
1543 	return ((val) << A2XX_CLEAR_COLOR_BLUE__SHIFT) & A2XX_CLEAR_COLOR_BLUE__MASK;  in A2XX_CLEAR_COLOR_BLUE()
1547 static inline uint32_t A2XX_CLEAR_COLOR_ALPHA(uint32_t val)  in A2XX_CLEAR_COLOR_ALPHA()  argument
1549 	return ((val) << A2XX_CLEAR_COLOR_ALPHA__SHIFT) & A2XX_CLEAR_COLOR_ALPHA__MASK;  in A2XX_CLEAR_COLOR_ALPHA()
1557 static inline uint32_t A2XX_PA_SU_POINT_SIZE_HEIGHT(float val)  in A2XX_PA_SU_POINT_SIZE_HEIGHT()  argument
1559 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_POINT_SIZE_HEIGHT__SHIFT) & A2XX_PA_SU_POINT_SIZE…  in A2XX_PA_SU_POINT_SIZE_HEIGHT()
1563 static inline uint32_t A2XX_PA_SU_POINT_SIZE_WIDTH(float val)  in A2XX_PA_SU_POINT_SIZE_WIDTH()  argument
1565 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_POINT_SIZE_WIDTH__SHIFT) & A2XX_PA_SU_POINT_SIZE_…  in A2XX_PA_SU_POINT_SIZE_WIDTH()
1571 static inline uint32_t A2XX_PA_SU_POINT_MINMAX_MIN(float val)  in A2XX_PA_SU_POINT_MINMAX_MIN()  argument
1573 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_POINT_MINMAX_MIN__SHIFT) & A2XX_PA_SU_POINT_MINMA…  in A2XX_PA_SU_POINT_MINMAX_MIN()
1577 static inline uint32_t A2XX_PA_SU_POINT_MINMAX_MAX(float val)  in A2XX_PA_SU_POINT_MINMAX_MAX()  argument
1579 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_POINT_MINMAX_MAX__SHIFT) & A2XX_PA_SU_POINT_MINMA…  in A2XX_PA_SU_POINT_MINMAX_MAX()
1585 static inline uint32_t A2XX_PA_SU_LINE_CNTL_WIDTH(float val)  in A2XX_PA_SU_LINE_CNTL_WIDTH()  argument
1587 …return ((((uint32_t)(val * 16.0))) << A2XX_PA_SU_LINE_CNTL_WIDTH__SHIFT) & A2XX_PA_SU_LINE_CNTL_WI…  in A2XX_PA_SU_LINE_CNTL_WIDTH()
1593 static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN(uint32_t val)  in A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN()  argument
1595 …return ((val) << A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN__SHIFT) & A2XX_PA_SC_LINE_STIPPLE_LINE_PATTE…  in A2XX_PA_SC_LINE_STIPPLE_LINE_PATTERN()
1599 static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT(uint32_t val)  in A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT()  argument
1601 …return ((val) << A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT__SHIFT) & A2XX_PA_SC_LINE_STIPPLE_REPEAT_COU…  in A2XX_PA_SC_LINE_STIPPLE_REPEAT_COUNT()
1605 …ic inline uint32_t A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER(enum a2xx_pa_sc_pattern_bit_order val)  in A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER()  argument
1607 …return ((val) << A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER__SHIFT) & A2XX_PA_SC_LINE_STIPPLE_PATTE…  in A2XX_PA_SC_LINE_STIPPLE_PATTERN_BIT_ORDER()
1611 static inline uint32_t A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL(enum a2xx_pa_sc_auto_reset_cntl val)  in A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL()  argument
1613 …return ((val) << A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL__SHIFT) & A2XX_PA_SC_LINE_STIPPLE_AUTO_RE…  in A2XX_PA_SC_LINE_STIPPLE_AUTO_RESET_CNTL()
1620 static inline uint32_t A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID(uint32_t val)  in A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID()  argument
1622 …return ((val) << A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID__SHIFT) & A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID__MA…  in A2XX_PA_SC_VIZ_QUERY_VIZ_QUERY_ID()
1631 static inline uint32_t A2XX_PA_SC_LINE_CNTL_BRES_CNTL(uint32_t val)  in A2XX_PA_SC_LINE_CNTL_BRES_CNTL()  argument
1633 	return ((val) << A2XX_PA_SC_LINE_CNTL_BRES_CNTL__SHIFT) & A2XX_PA_SC_LINE_CNTL_BRES_CNTL__MASK;  in A2XX_PA_SC_LINE_CNTL_BRES_CNTL()
1642 static inline uint32_t A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES(uint32_t val)  in A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES()  argument
1644 …return ((val) << A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES__SHIFT) & A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAM…  in A2XX_PA_SC_AA_CONFIG_MSAA_NUM_SAMPLES()
1648 static inline uint32_t A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST(uint32_t val)  in A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST()  argument
1650 …return ((val) << A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST__SHIFT) & A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DI…  in A2XX_PA_SC_AA_CONFIG_MAX_SAMPLE_DIST()
1656 static inline uint32_t A2XX_PA_SU_VTX_CNTL_PIX_CENTER(enum a2xx_pa_pixcenter val)  in A2XX_PA_SU_VTX_CNTL_PIX_CENTER()  argument
1658 	return ((val) << A2XX_PA_SU_VTX_CNTL_PIX_CENTER__SHIFT) & A2XX_PA_SU_VTX_CNTL_PIX_CENTER__MASK;  in A2XX_PA_SU_VTX_CNTL_PIX_CENTER()
1662 static inline uint32_t A2XX_PA_SU_VTX_CNTL_ROUND_MODE(enum a2xx_pa_roundmode val)  in A2XX_PA_SU_VTX_CNTL_ROUND_MODE()  argument
1664 	return ((val) << A2XX_PA_SU_VTX_CNTL_ROUND_MODE__SHIFT) & A2XX_PA_SU_VTX_CNTL_ROUND_MODE__MASK;  in A2XX_PA_SU_VTX_CNTL_ROUND_MODE()
1668 static inline uint32_t A2XX_PA_SU_VTX_CNTL_QUANT_MODE(enum a2xx_pa_quantmode val)  in A2XX_PA_SU_VTX_CNTL_QUANT_MODE()  argument
1670 	return ((val) << A2XX_PA_SU_VTX_CNTL_QUANT_MODE__SHIFT) & A2XX_PA_SU_VTX_CNTL_QUANT_MODE__MASK;  in A2XX_PA_SU_VTX_CNTL_QUANT_MODE()
1676 static inline uint32_t A2XX_PA_CL_GB_VERT_CLIP_ADJ(float val)  in A2XX_PA_CL_GB_VERT_CLIP_ADJ()  argument
1678 	return ((fui(val)) << A2XX_PA_CL_GB_VERT_CLIP_ADJ__SHIFT) & A2XX_PA_CL_GB_VERT_CLIP_ADJ__MASK;  in A2XX_PA_CL_GB_VERT_CLIP_ADJ()
1684 static inline uint32_t A2XX_PA_CL_GB_VERT_DISC_ADJ(float val)  in A2XX_PA_CL_GB_VERT_DISC_ADJ()  argument
1686 	return ((fui(val)) << A2XX_PA_CL_GB_VERT_DISC_ADJ__SHIFT) & A2XX_PA_CL_GB_VERT_DISC_ADJ__MASK;  in A2XX_PA_CL_GB_VERT_DISC_ADJ()
1692 static inline uint32_t A2XX_PA_CL_GB_HORZ_CLIP_ADJ(float val)  in A2XX_PA_CL_GB_HORZ_CLIP_ADJ()  argument
1694 	return ((fui(val)) << A2XX_PA_CL_GB_HORZ_CLIP_ADJ__SHIFT) & A2XX_PA_CL_GB_HORZ_CLIP_ADJ__MASK;  in A2XX_PA_CL_GB_HORZ_CLIP_ADJ()
1700 static inline uint32_t A2XX_PA_CL_GB_HORZ_DISC_ADJ(float val)  in A2XX_PA_CL_GB_HORZ_DISC_ADJ()  argument
1702 	return ((fui(val)) << A2XX_PA_CL_GB_HORZ_DISC_ADJ__SHIFT) & A2XX_PA_CL_GB_HORZ_DISC_ADJ__MASK;  in A2XX_PA_CL_GB_HORZ_DISC_ADJ()
1708 static inline uint32_t A2XX_SQ_VS_CONST_BASE(uint32_t val)  in A2XX_SQ_VS_CONST_BASE()  argument
1710 	return ((val) << A2XX_SQ_VS_CONST_BASE__SHIFT) & A2XX_SQ_VS_CONST_BASE__MASK;  in A2XX_SQ_VS_CONST_BASE()
1714 static inline uint32_t A2XX_SQ_VS_CONST_SIZE(uint32_t val)  in A2XX_SQ_VS_CONST_SIZE()  argument
1716 	return ((val) << A2XX_SQ_VS_CONST_SIZE__SHIFT) & A2XX_SQ_VS_CONST_SIZE__MASK;  in A2XX_SQ_VS_CONST_SIZE()
1722 static inline uint32_t A2XX_SQ_PS_CONST_BASE(uint32_t val)  in A2XX_SQ_PS_CONST_BASE()  argument
1724 	return ((val) << A2XX_SQ_PS_CONST_BASE__SHIFT) & A2XX_SQ_PS_CONST_BASE__MASK;  in A2XX_SQ_PS_CONST_BASE()
1728 static inline uint32_t A2XX_SQ_PS_CONST_SIZE(uint32_t val)  in A2XX_SQ_PS_CONST_SIZE()  argument
1730 	return ((val) << A2XX_SQ_PS_CONST_SIZE__SHIFT) & A2XX_SQ_PS_CONST_SIZE__MASK;  in A2XX_SQ_PS_CONST_SIZE()
1742 static inline uint32_t A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH(uint32_t val)  in A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH()  argument
1744 …return ((val) << A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH__SHIFT) & A2XX_VGT_VERTEX_REUSE_…  in A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL_VTX_REUSE_DEPTH()
1750 static inline uint32_t A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST(uint32_t val)  in A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST()  argument
1752 …return ((val) << A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST__SHIFT) & A2XX_VGT_OUT_DEALLOC_CNTL_DEALLO…  in A2XX_VGT_OUT_DEALLOC_CNTL_DEALLOC_DIST()
1758 static inline uint32_t A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT(enum a2xx_rb_copy_sample_select val)  in A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT()  argument
1760 …return ((val) << A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT__SHIFT) & A2XX_RB_COPY_CONTROL_COPY_SAMPL…  in A2XX_RB_COPY_CONTROL_COPY_SAMPLE_SELECT()
1765 static inline uint32_t A2XX_RB_COPY_CONTROL_CLEAR_MASK(uint32_t val)  in A2XX_RB_COPY_CONTROL_CLEAR_MASK()  argument
1767 	return ((val) << A2XX_RB_COPY_CONTROL_CLEAR_MASK__SHIFT) & A2XX_RB_COPY_CONTROL_CLEAR_MASK__MASK;  in A2XX_RB_COPY_CONTROL_CLEAR_MASK()
1775 static inline uint32_t A2XX_RB_COPY_DEST_PITCH(uint32_t val)  in A2XX_RB_COPY_DEST_PITCH()  argument
1777 	return ((val >> 5) << A2XX_RB_COPY_DEST_PITCH__SHIFT) & A2XX_RB_COPY_DEST_PITCH__MASK;  in A2XX_RB_COPY_DEST_PITCH()
1783 static inline uint32_t A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN(enum adreno_rb_surface_endian val)  in A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN()  argument
1785 …return ((val) << A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN__SHIFT) & A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN__…  in A2XX_RB_COPY_DEST_INFO_DEST_ENDIAN()
1790 static inline uint32_t A2XX_RB_COPY_DEST_INFO_FORMAT(enum a2xx_colorformatx val)  in A2XX_RB_COPY_DEST_INFO_FORMAT()  argument
1792 	return ((val) << A2XX_RB_COPY_DEST_INFO_FORMAT__SHIFT) & A2XX_RB_COPY_DEST_INFO_FORMAT__MASK;  in A2XX_RB_COPY_DEST_INFO_FORMAT()
1796 static inline uint32_t A2XX_RB_COPY_DEST_INFO_SWAP(uint32_t val)  in A2XX_RB_COPY_DEST_INFO_SWAP()  argument
1798 	return ((val) << A2XX_RB_COPY_DEST_INFO_SWAP__SHIFT) & A2XX_RB_COPY_DEST_INFO_SWAP__MASK;  in A2XX_RB_COPY_DEST_INFO_SWAP()
1802 static inline uint32_t A2XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A2XX_RB_COPY_DEST_INFO_DITHER_MODE()  argument
1804 …return ((val) << A2XX_RB_COPY_DEST_INFO_DITHER_MODE__SHIFT) & A2XX_RB_COPY_DEST_INFO_DITHER_MODE__…  in A2XX_RB_COPY_DEST_INFO_DITHER_MODE()
1808 static inline uint32_t A2XX_RB_COPY_DEST_INFO_DITHER_TYPE(enum a2xx_rb_dither_type val)  in A2XX_RB_COPY_DEST_INFO_DITHER_TYPE()  argument
1810 …return ((val) << A2XX_RB_COPY_DEST_INFO_DITHER_TYPE__SHIFT) & A2XX_RB_COPY_DEST_INFO_DITHER_TYPE__…  in A2XX_RB_COPY_DEST_INFO_DITHER_TYPE()
1820 static inline uint32_t A2XX_RB_COPY_DEST_OFFSET_X(uint32_t val)  in A2XX_RB_COPY_DEST_OFFSET_X()  argument
1822 	return ((val) << A2XX_RB_COPY_DEST_OFFSET_X__SHIFT) & A2XX_RB_COPY_DEST_OFFSET_X__MASK;  in A2XX_RB_COPY_DEST_OFFSET_X()
1826 static inline uint32_t A2XX_RB_COPY_DEST_OFFSET_Y(uint32_t val)  in A2XX_RB_COPY_DEST_OFFSET_Y()  argument
1828 	return ((val) << A2XX_RB_COPY_DEST_OFFSET_Y__SHIFT) & A2XX_RB_COPY_DEST_OFFSET_Y__MASK;  in A2XX_RB_COPY_DEST_OFFSET_Y()
1864 static inline uint32_t A2XX_SQ_TEX_0_TYPE(enum sq_tex_type val)  in A2XX_SQ_TEX_0_TYPE()  argument
1866 	return ((val) << A2XX_SQ_TEX_0_TYPE__SHIFT) & A2XX_SQ_TEX_0_TYPE__MASK;  in A2XX_SQ_TEX_0_TYPE()
1870 static inline uint32_t A2XX_SQ_TEX_0_SIGN_X(enum sq_tex_sign val)  in A2XX_SQ_TEX_0_SIGN_X()  argument
1872 	return ((val) << A2XX_SQ_TEX_0_SIGN_X__SHIFT) & A2XX_SQ_TEX_0_SIGN_X__MASK;  in A2XX_SQ_TEX_0_SIGN_X()
1876 static inline uint32_t A2XX_SQ_TEX_0_SIGN_Y(enum sq_tex_sign val)  in A2XX_SQ_TEX_0_SIGN_Y()  argument
1878 	return ((val) << A2XX_SQ_TEX_0_SIGN_Y__SHIFT) & A2XX_SQ_TEX_0_SIGN_Y__MASK;  in A2XX_SQ_TEX_0_SIGN_Y()
1882 static inline uint32_t A2XX_SQ_TEX_0_SIGN_Z(enum sq_tex_sign val)  in A2XX_SQ_TEX_0_SIGN_Z()  argument
1884 	return ((val) << A2XX_SQ_TEX_0_SIGN_Z__SHIFT) & A2XX_SQ_TEX_0_SIGN_Z__MASK;  in A2XX_SQ_TEX_0_SIGN_Z()
1888 static inline uint32_t A2XX_SQ_TEX_0_SIGN_W(enum sq_tex_sign val)  in A2XX_SQ_TEX_0_SIGN_W()  argument
1890 	return ((val) << A2XX_SQ_TEX_0_SIGN_W__SHIFT) & A2XX_SQ_TEX_0_SIGN_W__MASK;  in A2XX_SQ_TEX_0_SIGN_W()
1894 static inline uint32_t A2XX_SQ_TEX_0_CLAMP_X(enum sq_tex_clamp val)  in A2XX_SQ_TEX_0_CLAMP_X()  argument
1896 	return ((val) << A2XX_SQ_TEX_0_CLAMP_X__SHIFT) & A2XX_SQ_TEX_0_CLAMP_X__MASK;  in A2XX_SQ_TEX_0_CLAMP_X()
1900 static inline uint32_t A2XX_SQ_TEX_0_CLAMP_Y(enum sq_tex_clamp val)  in A2XX_SQ_TEX_0_CLAMP_Y()  argument
1902 	return ((val) << A2XX_SQ_TEX_0_CLAMP_Y__SHIFT) & A2XX_SQ_TEX_0_CLAMP_Y__MASK;  in A2XX_SQ_TEX_0_CLAMP_Y()
1906 static inline uint32_t A2XX_SQ_TEX_0_CLAMP_Z(enum sq_tex_clamp val)  in A2XX_SQ_TEX_0_CLAMP_Z()  argument
1908 	return ((val) << A2XX_SQ_TEX_0_CLAMP_Z__SHIFT) & A2XX_SQ_TEX_0_CLAMP_Z__MASK;  in A2XX_SQ_TEX_0_CLAMP_Z()
1912 static inline uint32_t A2XX_SQ_TEX_0_PITCH(uint32_t val)  in A2XX_SQ_TEX_0_PITCH()  argument
1914 	return ((val >> 5) << A2XX_SQ_TEX_0_PITCH__SHIFT) & A2XX_SQ_TEX_0_PITCH__MASK;  in A2XX_SQ_TEX_0_PITCH()
1921 static inline uint32_t A2XX_SQ_TEX_1_FORMAT(enum a2xx_sq_surfaceformat val)  in A2XX_SQ_TEX_1_FORMAT()  argument
1923 	return ((val) << A2XX_SQ_TEX_1_FORMAT__SHIFT) & A2XX_SQ_TEX_1_FORMAT__MASK;  in A2XX_SQ_TEX_1_FORMAT()
1927 static inline uint32_t A2XX_SQ_TEX_1_ENDIANNESS(enum sq_tex_endian val)  in A2XX_SQ_TEX_1_ENDIANNESS()  argument
1929 	return ((val) << A2XX_SQ_TEX_1_ENDIANNESS__SHIFT) & A2XX_SQ_TEX_1_ENDIANNESS__MASK;  in A2XX_SQ_TEX_1_ENDIANNESS()
1933 static inline uint32_t A2XX_SQ_TEX_1_REQUEST_SIZE(uint32_t val)  in A2XX_SQ_TEX_1_REQUEST_SIZE()  argument
1935 	return ((val) << A2XX_SQ_TEX_1_REQUEST_SIZE__SHIFT) & A2XX_SQ_TEX_1_REQUEST_SIZE__MASK;  in A2XX_SQ_TEX_1_REQUEST_SIZE()
1940 static inline uint32_t A2XX_SQ_TEX_1_CLAMP_POLICY(enum sq_tex_clamp_policy val)  in A2XX_SQ_TEX_1_CLAMP_POLICY()  argument
1942 	return ((val) << A2XX_SQ_TEX_1_CLAMP_POLICY__SHIFT) & A2XX_SQ_TEX_1_CLAMP_POLICY__MASK;  in A2XX_SQ_TEX_1_CLAMP_POLICY()
1946 static inline uint32_t A2XX_SQ_TEX_1_BASE_ADDRESS(uint32_t val)  in A2XX_SQ_TEX_1_BASE_ADDRESS()  argument
1948 	return ((val >> 12) << A2XX_SQ_TEX_1_BASE_ADDRESS__SHIFT) & A2XX_SQ_TEX_1_BASE_ADDRESS__MASK;  in A2XX_SQ_TEX_1_BASE_ADDRESS()
1954 static inline uint32_t A2XX_SQ_TEX_2_WIDTH(uint32_t val)  in A2XX_SQ_TEX_2_WIDTH()  argument
1956 	return ((val) << A2XX_SQ_TEX_2_WIDTH__SHIFT) & A2XX_SQ_TEX_2_WIDTH__MASK;  in A2XX_SQ_TEX_2_WIDTH()
1960 static inline uint32_t A2XX_SQ_TEX_2_HEIGHT(uint32_t val)  in A2XX_SQ_TEX_2_HEIGHT()  argument
1962 	return ((val) << A2XX_SQ_TEX_2_HEIGHT__SHIFT) & A2XX_SQ_TEX_2_HEIGHT__MASK;  in A2XX_SQ_TEX_2_HEIGHT()
1966 static inline uint32_t A2XX_SQ_TEX_2_DEPTH(uint32_t val)  in A2XX_SQ_TEX_2_DEPTH()  argument
1968 	return ((val) << A2XX_SQ_TEX_2_DEPTH__SHIFT) & A2XX_SQ_TEX_2_DEPTH__MASK;  in A2XX_SQ_TEX_2_DEPTH()
1974 static inline uint32_t A2XX_SQ_TEX_3_NUM_FORMAT(enum sq_tex_num_format val)  in A2XX_SQ_TEX_3_NUM_FORMAT()  argument
1976 	return ((val) << A2XX_SQ_TEX_3_NUM_FORMAT__SHIFT) & A2XX_SQ_TEX_3_NUM_FORMAT__MASK;  in A2XX_SQ_TEX_3_NUM_FORMAT()
1980 static inline uint32_t A2XX_SQ_TEX_3_SWIZ_X(enum sq_tex_swiz val)  in A2XX_SQ_TEX_3_SWIZ_X()  argument
1982 	return ((val) << A2XX_SQ_TEX_3_SWIZ_X__SHIFT) & A2XX_SQ_TEX_3_SWIZ_X__MASK;  in A2XX_SQ_TEX_3_SWIZ_X()
1986 static inline uint32_t A2XX_SQ_TEX_3_SWIZ_Y(enum sq_tex_swiz val)  in A2XX_SQ_TEX_3_SWIZ_Y()  argument
1988 	return ((val) << A2XX_SQ_TEX_3_SWIZ_Y__SHIFT) & A2XX_SQ_TEX_3_SWIZ_Y__MASK;  in A2XX_SQ_TEX_3_SWIZ_Y()
1992 static inline uint32_t A2XX_SQ_TEX_3_SWIZ_Z(enum sq_tex_swiz val)  in A2XX_SQ_TEX_3_SWIZ_Z()  argument
1994 	return ((val) << A2XX_SQ_TEX_3_SWIZ_Z__SHIFT) & A2XX_SQ_TEX_3_SWIZ_Z__MASK;  in A2XX_SQ_TEX_3_SWIZ_Z()
1998 static inline uint32_t A2XX_SQ_TEX_3_SWIZ_W(enum sq_tex_swiz val)  in A2XX_SQ_TEX_3_SWIZ_W()  argument
2000 	return ((val) << A2XX_SQ_TEX_3_SWIZ_W__SHIFT) & A2XX_SQ_TEX_3_SWIZ_W__MASK;  in A2XX_SQ_TEX_3_SWIZ_W()
2004 static inline uint32_t A2XX_SQ_TEX_3_EXP_ADJUST(uint32_t val)  in A2XX_SQ_TEX_3_EXP_ADJUST()  argument
2006 	return ((val) << A2XX_SQ_TEX_3_EXP_ADJUST__SHIFT) & A2XX_SQ_TEX_3_EXP_ADJUST__MASK;  in A2XX_SQ_TEX_3_EXP_ADJUST()
2010 static inline uint32_t A2XX_SQ_TEX_3_XY_MAG_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_3_XY_MAG_FILTER()  argument
2012 	return ((val) << A2XX_SQ_TEX_3_XY_MAG_FILTER__SHIFT) & A2XX_SQ_TEX_3_XY_MAG_FILTER__MASK;  in A2XX_SQ_TEX_3_XY_MAG_FILTER()
2016 static inline uint32_t A2XX_SQ_TEX_3_XY_MIN_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_3_XY_MIN_FILTER()  argument
2018 	return ((val) << A2XX_SQ_TEX_3_XY_MIN_FILTER__SHIFT) & A2XX_SQ_TEX_3_XY_MIN_FILTER__MASK;  in A2XX_SQ_TEX_3_XY_MIN_FILTER()
2022 static inline uint32_t A2XX_SQ_TEX_3_MIP_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_3_MIP_FILTER()  argument
2024 	return ((val) << A2XX_SQ_TEX_3_MIP_FILTER__SHIFT) & A2XX_SQ_TEX_3_MIP_FILTER__MASK;  in A2XX_SQ_TEX_3_MIP_FILTER()
2028 static inline uint32_t A2XX_SQ_TEX_3_ANISO_FILTER(enum sq_tex_aniso_filter val)  in A2XX_SQ_TEX_3_ANISO_FILTER()  argument
2030 	return ((val) << A2XX_SQ_TEX_3_ANISO_FILTER__SHIFT) & A2XX_SQ_TEX_3_ANISO_FILTER__MASK;  in A2XX_SQ_TEX_3_ANISO_FILTER()
2034 static inline uint32_t A2XX_SQ_TEX_3_BORDER_SIZE(uint32_t val)  in A2XX_SQ_TEX_3_BORDER_SIZE()  argument
2036 	return ((val) << A2XX_SQ_TEX_3_BORDER_SIZE__SHIFT) & A2XX_SQ_TEX_3_BORDER_SIZE__MASK;  in A2XX_SQ_TEX_3_BORDER_SIZE()
2042 static inline uint32_t A2XX_SQ_TEX_4_VOL_MAG_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_4_VOL_MAG_FILTER()  argument
2044 	return ((val) << A2XX_SQ_TEX_4_VOL_MAG_FILTER__SHIFT) & A2XX_SQ_TEX_4_VOL_MAG_FILTER__MASK;  in A2XX_SQ_TEX_4_VOL_MAG_FILTER()
2048 static inline uint32_t A2XX_SQ_TEX_4_VOL_MIN_FILTER(enum sq_tex_filter val)  in A2XX_SQ_TEX_4_VOL_MIN_FILTER()  argument
2050 	return ((val) << A2XX_SQ_TEX_4_VOL_MIN_FILTER__SHIFT) & A2XX_SQ_TEX_4_VOL_MIN_FILTER__MASK;  in A2XX_SQ_TEX_4_VOL_MIN_FILTER()
2054 static inline uint32_t A2XX_SQ_TEX_4_MIP_MIN_LEVEL(uint32_t val)  in A2XX_SQ_TEX_4_MIP_MIN_LEVEL()  argument
2056 	return ((val) << A2XX_SQ_TEX_4_MIP_MIN_LEVEL__SHIFT) & A2XX_SQ_TEX_4_MIP_MIN_LEVEL__MASK;  in A2XX_SQ_TEX_4_MIP_MIN_LEVEL()
2060 static inline uint32_t A2XX_SQ_TEX_4_MIP_MAX_LEVEL(uint32_t val)  in A2XX_SQ_TEX_4_MIP_MAX_LEVEL()  argument
2062 	return ((val) << A2XX_SQ_TEX_4_MIP_MAX_LEVEL__SHIFT) & A2XX_SQ_TEX_4_MIP_MAX_LEVEL__MASK;  in A2XX_SQ_TEX_4_MIP_MAX_LEVEL()
2068 static inline uint32_t A2XX_SQ_TEX_4_LOD_BIAS(float val)  in A2XX_SQ_TEX_4_LOD_BIAS()  argument
2070 	return ((((int32_t)(val * 32.0))) << A2XX_SQ_TEX_4_LOD_BIAS__SHIFT) & A2XX_SQ_TEX_4_LOD_BIAS__MASK;  in A2XX_SQ_TEX_4_LOD_BIAS()
2074 static inline uint32_t A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H(uint32_t val)  in A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H()  argument
2076 	return ((val) << A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H__SHIFT) & A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H__MASK;  in A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_H()
2080 static inline uint32_t A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V(uint32_t val)  in A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V()  argument
2082 	return ((val) << A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V__SHIFT) & A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V__MASK;  in A2XX_SQ_TEX_4_GRAD_EXP_ADJUST_V()
2088 static inline uint32_t A2XX_SQ_TEX_5_BORDER_COLOR(enum sq_tex_border_color val)  in A2XX_SQ_TEX_5_BORDER_COLOR()  argument
2090 	return ((val) << A2XX_SQ_TEX_5_BORDER_COLOR__SHIFT) & A2XX_SQ_TEX_5_BORDER_COLOR__MASK;  in A2XX_SQ_TEX_5_BORDER_COLOR()
2095 static inline uint32_t A2XX_SQ_TEX_5_TRI_CLAMP(uint32_t val)  in A2XX_SQ_TEX_5_TRI_CLAMP()  argument
2097 	return ((val) << A2XX_SQ_TEX_5_TRI_CLAMP__SHIFT) & A2XX_SQ_TEX_5_TRI_CLAMP__MASK;  in A2XX_SQ_TEX_5_TRI_CLAMP()
2101 static inline uint32_t A2XX_SQ_TEX_5_ANISO_BIAS(float val)  in A2XX_SQ_TEX_5_ANISO_BIAS()  argument
2103 …return ((((int32_t)(val * 1.0))) << A2XX_SQ_TEX_5_ANISO_BIAS__SHIFT) & A2XX_SQ_TEX_5_ANISO_BIAS__M…  in A2XX_SQ_TEX_5_ANISO_BIAS()
2107 static inline uint32_t A2XX_SQ_TEX_5_DIMENSION(enum sq_tex_dimension val)  in A2XX_SQ_TEX_5_DIMENSION()  argument
2109 	return ((val) << A2XX_SQ_TEX_5_DIMENSION__SHIFT) & A2XX_SQ_TEX_5_DIMENSION__MASK;  in A2XX_SQ_TEX_5_DIMENSION()
2114 static inline uint32_t A2XX_SQ_TEX_5_MIP_ADDRESS(uint32_t val)  in A2XX_SQ_TEX_5_MIP_ADDRESS()  argument
2116 	return ((val >> 12) << A2XX_SQ_TEX_5_MIP_ADDRESS__SHIFT) & A2XX_SQ_TEX_5_MIP_ADDRESS__MASK;  in A2XX_SQ_TEX_5_MIP_ADDRESS()