304 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x333d3282);  in meson_hdmi_phy_setup_mode()
305 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2136315b);  in meson_hdmi_phy_setup_mode()
308 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303382);  in meson_hdmi_phy_setup_mode()
309 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2036315b);  in meson_hdmi_phy_setup_mode()
312 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303362);  in meson_hdmi_phy_setup_mode()
313 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2016315b);  in meson_hdmi_phy_setup_mode()
316 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33604142);  in meson_hdmi_phy_setup_mode()
317 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x0016315b);  in meson_hdmi_phy_setup_mode()
323 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33353245);  in meson_hdmi_phy_setup_mode()
324 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2100115b);  in meson_hdmi_phy_setup_mode()
327 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33634283);  in meson_hdmi_phy_setup_mode()
328 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0xb000115b);  in meson_hdmi_phy_setup_mode()
331 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33632122);  in meson_hdmi_phy_setup_mode()
332 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2000115b);  in meson_hdmi_phy_setup_mode()
338 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x37eb65c4);  in meson_hdmi_phy_setup_mode()
339 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b);  in meson_hdmi_phy_setup_mode()
340 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL5, 0x0000080b);  in meson_hdmi_phy_setup_mode()
343 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33eb6262);  in meson_hdmi_phy_setup_mode()
344 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b);  in meson_hdmi_phy_setup_mode()
345 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL5, 0x00000003);  in meson_hdmi_phy_setup_mode()
348 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33eb4242);  in meson_hdmi_phy_setup_mode()
349 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b);  in meson_hdmi_phy_setup_mode()
350 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL5, 0x00000003);  in meson_hdmi_phy_setup_mode()
360 	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xf);  in meson_dw_hdmi_phy_reset()
365 	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xe);  in meson_dw_hdmi_phy_reset()
421 	regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);  in dw_hdmi_phy_init()
424 	regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);  in dw_hdmi_phy_init()
462 	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,  in dw_hdmi_phy_init()
469 		regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,  in dw_hdmi_phy_init()
472 		regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,  in dw_hdmi_phy_init()
476 	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0);  in dw_hdmi_phy_init()
528 	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0);  in dw_hdmi_phy_disable()
929 	regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);  in meson_dw_hdmi_bind()
932 	regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);  in meson_dw_hdmi_bind()