140 static void mtk_mipi_tx_clear_bits(struct mtk_mipi_tx *mipi_tx, u32 offset,  in mtk_mipi_tx_clear_bits()  argument
143 	u32 temp = readl(mipi_tx->regs + offset);  in mtk_mipi_tx_clear_bits()
145 	writel(temp & ~bits, mipi_tx->regs + offset);  in mtk_mipi_tx_clear_bits()
148 static void mtk_mipi_tx_set_bits(struct mtk_mipi_tx *mipi_tx, u32 offset,  in mtk_mipi_tx_set_bits()  argument
151 	u32 temp = readl(mipi_tx->regs + offset);  in mtk_mipi_tx_set_bits()
153 	writel(temp | bits, mipi_tx->regs + offset);  in mtk_mipi_tx_set_bits()
156 static void mtk_mipi_tx_update_bits(struct mtk_mipi_tx *mipi_tx, u32 offset,  in mtk_mipi_tx_update_bits()  argument
159 	u32 temp = readl(mipi_tx->regs + offset);  in mtk_mipi_tx_update_bits()
161 	writel((temp & ~mask) | (data & mask), mipi_tx->regs + offset);  in mtk_mipi_tx_update_bits()
166 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);  in mtk_mipi_tx_pll_prepare()  local
170 	dev_dbg(mipi_tx->dev, "prepare: %u Hz\n", mipi_tx->data_rate);  in mtk_mipi_tx_pll_prepare()
172 	if (mipi_tx->data_rate >= 500000000) {  in mtk_mipi_tx_pll_prepare()
176 	} else if (mipi_tx->data_rate >= 250000000) {  in mtk_mipi_tx_pll_prepare()
180 	} else if (mipi_tx->data_rate >= 125000000) {  in mtk_mipi_tx_pll_prepare()
184 	} else if (mipi_tx->data_rate > 62000000) {  in mtk_mipi_tx_pll_prepare()
188 	} else if (mipi_tx->data_rate >= 50000000) {  in mtk_mipi_tx_pll_prepare()
196 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_BG_CON,  in mtk_mipi_tx_pll_prepare()
205 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_TOP_CON,  in mtk_mipi_tx_pll_prepare()
209 	mtk_mipi_tx_set_bits(mipi_tx, MIPITX_DSI_CON,  in mtk_mipi_tx_pll_prepare()
212 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_PWR,  in mtk_mipi_tx_pll_prepare()
217 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_PLL_CON0,  in mtk_mipi_tx_pll_prepare()
220 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_CON0,  in mtk_mipi_tx_pll_prepare()
233 	pcw = div_u64(((u64)mipi_tx->data_rate * 2 * txdiv) << 24,  in mtk_mipi_tx_pll_prepare()
235 	writel(pcw, mipi_tx->regs + MIPITX_DSI_PLL_CON2);  in mtk_mipi_tx_pll_prepare()
237 	mtk_mipi_tx_set_bits(mipi_tx, MIPITX_DSI_PLL_CON1,  in mtk_mipi_tx_pll_prepare()
240 	mtk_mipi_tx_set_bits(mipi_tx, MIPITX_DSI_PLL_CON0, RG_DSI_MPPLL_PLL_EN);  in mtk_mipi_tx_pll_prepare()
244 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_PLL_CON1,  in mtk_mipi_tx_pll_prepare()
247 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_TOP,  in mtk_mipi_tx_pll_prepare()
249 				mipi_tx->driver_data->mppll_preserve);  in mtk_mipi_tx_pll_prepare()
256 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);  in mtk_mipi_tx_pll_unprepare()  local
258 	dev_dbg(mipi_tx->dev, "unprepare\n");  in mtk_mipi_tx_pll_unprepare()
260 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_PLL_CON0,  in mtk_mipi_tx_pll_unprepare()
263 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_TOP,  in mtk_mipi_tx_pll_unprepare()
266 	mtk_mipi_tx_update_bits(mipi_tx, MIPITX_DSI_PLL_PWR,  in mtk_mipi_tx_pll_unprepare()
271 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_TOP_CON,  in mtk_mipi_tx_pll_unprepare()
274 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_CON,  in mtk_mipi_tx_pll_unprepare()
277 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_BG_CON,  in mtk_mipi_tx_pll_unprepare()
280 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_PLL_CON0,  in mtk_mipi_tx_pll_unprepare()
293 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);  in mtk_mipi_tx_pll_set_rate()  local
295 	dev_dbg(mipi_tx->dev, "set rate: %lu Hz\n", rate);  in mtk_mipi_tx_pll_set_rate()
297 	mipi_tx->data_rate = rate;  in mtk_mipi_tx_pll_set_rate()
305 	struct mtk_mipi_tx *mipi_tx = mtk_mipi_tx_from_clk_hw(hw);  in mtk_mipi_tx_pll_recalc_rate()  local
307 	return mipi_tx->data_rate;  in mtk_mipi_tx_pll_recalc_rate()
320 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);  in mtk_mipi_tx_power_on_signal()  local
325 		mtk_mipi_tx_set_bits(mipi_tx, reg, RG_DSI_LNTx_LDOOUT_EN);  in mtk_mipi_tx_power_on_signal()
327 	mtk_mipi_tx_clear_bits(mipi_tx, MIPITX_DSI_TOP_CON,  in mtk_mipi_tx_power_on_signal()
335 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);  in mtk_mipi_tx_power_on()  local
339 	ret = clk_prepare_enable(mipi_tx->pll);  in mtk_mipi_tx_power_on()
351 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);  in mtk_mipi_tx_power_off_signal()  local
354 	mtk_mipi_tx_set_bits(mipi_tx, MIPITX_DSI_TOP_CON,  in mtk_mipi_tx_power_off_signal()
359 		mtk_mipi_tx_clear_bits(mipi_tx, reg, RG_DSI_LNTx_LDOOUT_EN);  in mtk_mipi_tx_power_off_signal()
364 	struct mtk_mipi_tx *mipi_tx = phy_get_drvdata(phy);  in mtk_mipi_tx_power_off()  local
370 	clk_disable_unprepare(mipi_tx->pll);  in mtk_mipi_tx_power_off()
384 	struct mtk_mipi_tx *mipi_tx;  in mtk_mipi_tx_probe()  local
398 	mipi_tx = devm_kzalloc(dev, sizeof(*mipi_tx), GFP_KERNEL);  in mtk_mipi_tx_probe()
399 	if (!mipi_tx)  in mtk_mipi_tx_probe()
402 	mipi_tx->driver_data = of_device_get_match_data(dev);  in mtk_mipi_tx_probe()
404 	mipi_tx->regs = devm_ioremap_resource(dev, mem);  in mtk_mipi_tx_probe()
405 	if (IS_ERR(mipi_tx->regs)) {  in mtk_mipi_tx_probe()
406 		ret = PTR_ERR(mipi_tx->regs);  in mtk_mipi_tx_probe()
426 	mipi_tx->pll_hw.init = &clk_init;  in mtk_mipi_tx_probe()
427 	mipi_tx->pll = devm_clk_register(dev, &mipi_tx->pll_hw);  in mtk_mipi_tx_probe()
428 	if (IS_ERR(mipi_tx->pll)) {  in mtk_mipi_tx_probe()
429 		ret = PTR_ERR(mipi_tx->pll);  in mtk_mipi_tx_probe()
440 	phy_set_drvdata(phy, mipi_tx);  in mtk_mipi_tx_probe()
448 	mipi_tx->dev = dev;  in mtk_mipi_tx_probe()
451 				   mipi_tx->pll);  in mtk_mipi_tx_probe()