1062 	dev_priv->wm.pri_latency[G4X_WM_LEVEL_NORMAL] = 5;  in g4x_setup_wm_latency()
1063 	dev_priv->wm.pri_latency[G4X_WM_LEVEL_SR] = 12;  in g4x_setup_wm_latency()
1064 	dev_priv->wm.pri_latency[G4X_WM_LEVEL_HPLL] = 35;  in g4x_setup_wm_latency()
1119 	unsigned int latency = dev_priv->wm.pri_latency[level] * 10;  in g4x_compute_wm()
1608 	dev_priv->wm.pri_latency[VLV_WM_LEVEL_PM2] = 3;  in vlv_setup_wm_latency()
1613 		dev_priv->wm.pri_latency[VLV_WM_LEVEL_PM5] = 12;  in vlv_setup_wm_latency()
1614 		dev_priv->wm.pri_latency[VLV_WM_LEVEL_DDR_DVFS] = 33;  in vlv_setup_wm_latency()
1630 	if (dev_priv->wm.pri_latency[level] == 0)  in vlv_compute_wm_level()
1651 				    dev_priv->wm.pri_latency[level] * 10);  in vlv_compute_wm_level()
2770 	u16 pri_latency = dev_priv->wm.pri_latency[level];  in ilk_compute_wm_level()  local
2776 		pri_latency *= 5;  in ilk_compute_wm_level()
2783 						     pri_latency, level);  in ilk_compute_wm_level()
3020 	changed = ilk_increase_wm_latency(dev_priv, dev_priv->wm.pri_latency, 12) |  in snb_wm_latency_quirk()
3028 	intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency);  in snb_wm_latency_quirk()
3046 	if (dev_priv->wm.pri_latency[3] == 0 &&  in snb_wm_lp3_irq_quirk()
3051 	dev_priv->wm.pri_latency[3] = 0;  in snb_wm_lp3_irq_quirk()
3056 	intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency);  in snb_wm_lp3_irq_quirk()
3063 	intel_read_wm_latency(dev_priv, dev_priv->wm.pri_latency);  in ilk_setup_wm_latency()
3065 	memcpy(dev_priv->wm.spr_latency, dev_priv->wm.pri_latency,  in ilk_setup_wm_latency()
3066 	       sizeof(dev_priv->wm.pri_latency));  in ilk_setup_wm_latency()
3067 	memcpy(dev_priv->wm.cur_latency, dev_priv->wm.pri_latency,  in ilk_setup_wm_latency()
3068 	       sizeof(dev_priv->wm.pri_latency));  in ilk_setup_wm_latency()
3073 	intel_print_wm_latency(dev_priv, "Primary", dev_priv->wm.pri_latency);  in ilk_setup_wm_latency()
3356 		return dev_priv->wm.pri_latency[level];  in ilk_wm_lp_latency()
9784 		if ((IS_GEN(dev_priv, 5) && dev_priv->wm.pri_latency[1] &&  in intel_init_pm()
9786 		    (!IS_GEN(dev_priv, 5) && dev_priv->wm.pri_latency[0] &&  in intel_init_pm()