98 			   sseu->subslice_mask[s]);  in sseu_dump()
165 			   sseu->subslice_mask[s]);  in intel_device_info_dump_topology()
215 			sseu->subslice_mask[s] = (ss_en >> ss_idx) & ss_en_mask;  in gen11_sseu_info_init()
217 				if (sseu->subslice_mask[s] & BIT(ss))  in gen11_sseu_info_init()
237 	u32 subslice_mask, eu_en;  in gen10_sseu_info_init()  local
245 	subslice_mask = (1 << 4) - 1;  in gen10_sseu_info_init()
246 	subslice_mask &= ~((fuse2 & GEN10_F2_SS_DIS_MASK) >>  in gen10_sseu_info_init()
253 	sseu->subslice_mask[0] = subslice_mask;  in gen10_sseu_info_init()
255 		sseu->subslice_mask[s] = subslice_mask & 0x3;  in gen10_sseu_info_init()
286 				sseu->subslice_mask[s] &= ~BIT(ss);  in gen10_sseu_info_init()
328 		sseu->subslice_mask[0] |= BIT(0);  in cherryview_sseu_info_init()
339 		sseu->subslice_mask[0] |= BIT(1);  in cherryview_sseu_info_init()
368 	u32 fuse2, eu_disable, subslice_mask;  in gen9_sseu_info_init()  local
383 	subslice_mask = (1 << sseu->max_subslices) - 1;  in gen9_sseu_info_init()
384 	subslice_mask &= ~((fuse2 & GEN9_F2_SS_DIS_MASK) >>  in gen9_sseu_info_init()
396 		sseu->subslice_mask[s] = subslice_mask;  in gen9_sseu_info_init()
403 			if (!(sseu->subslice_mask[s] & BIT(ss)))  in gen9_sseu_info_init()
452 #define IS_SS_DISABLED(ss)	(!(sseu->subslice_mask[0] & BIT(ss)))  in gen9_sseu_info_init()
453 		info->has_pooled_eu = hweight8(sseu->subslice_mask[0]) == 3;  in gen9_sseu_info_init()
472 	u32 fuse2, subslice_mask, eu_disable[3]; /* s_max */  in broadwell_sseu_info_init()  local
484 	subslice_mask = GENMASK(sseu->max_subslices - 1, 0);  in broadwell_sseu_info_init()
485 	subslice_mask &= ~((fuse2 & GEN8_F2_SS_DIS_MASK) >>  in broadwell_sseu_info_init()
505 		sseu->subslice_mask[s] = subslice_mask;  in broadwell_sseu_info_init()
511 			if (!(sseu->subslice_mask[s] & BIT(ss)))  in broadwell_sseu_info_init()
567 		sseu->subslice_mask[0] = BIT(0);  in haswell_sseu_info_init()
571 		sseu->subslice_mask[0] = BIT(0) | BIT(1);  in haswell_sseu_info_init()
575 		sseu->subslice_mask[0] = BIT(0) | BIT(1);  in haswell_sseu_info_init()
576 		sseu->subslice_mask[1] = BIT(0) | BIT(1);  in haswell_sseu_info_init()
581 	sseu->max_subslices = hweight8(sseu->subslice_mask[0]);  in haswell_sseu_info_init()