Lines Matching refs:REG32

572 #define REG32(_reg, ...) \  macro
606 	REG32(GEN7_3DPRIM_END_OFFSET),
607 	REG32(GEN7_3DPRIM_START_VERTEX),
608 	REG32(GEN7_3DPRIM_VERTEX_COUNT),
609 	REG32(GEN7_3DPRIM_INSTANCE_COUNT),
610 	REG32(GEN7_3DPRIM_START_INSTANCE),
611 	REG32(GEN7_3DPRIM_BASE_VERTEX),
612 	REG32(GEN7_GPGPU_DISPATCHDIMX),
613 	REG32(GEN7_GPGPU_DISPATCHDIMY),
614 	REG32(GEN7_GPGPU_DISPATCHDIMZ),
624 	REG32(GEN7_SO_WRITE_OFFSET(0)),
625 	REG32(GEN7_SO_WRITE_OFFSET(1)),
626 	REG32(GEN7_SO_WRITE_OFFSET(2)),
627 	REG32(GEN7_SO_WRITE_OFFSET(3)),
628 	REG32(GEN7_L3SQCREG1),
629 	REG32(GEN7_L3CNTLREG2),
630 	REG32(GEN7_L3CNTLREG3),
651 	REG32(HSW_SCRATCH1,
654 	REG32(HSW_ROW_CHICKEN3,
663 	REG32(BCS_SWCTRL),
670 	REG32(BCS_SWCTRL),
691 #undef REG32