502 	(s->vgpu->gvt->device_info.gmadr_bytes_in_cmd >> 2)
647 static inline const struct cmd_info *find_cmd_entry(struct intel_gvt *gvt,  in find_cmd_entry()  argument
652 	hash_for_each_possible(gvt->cmd_table, e, hlist, opcode) {  in find_cmd_entry()
659 static inline const struct cmd_info *get_cmd_info(struct intel_gvt *gvt,  in get_cmd_info()  argument
668 	return find_cmd_entry(gvt, opcode, ring_id);  in get_cmd_info()
837 	struct intel_gvt *gvt = s->vgpu->gvt;  in force_nonpriv_reg_handler()  local
841 	struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv;  in force_nonpriv_reg_handler()
854 	if (!intel_gvt_in_force_nonpriv_whitelist(gvt, data) &&  in force_nonpriv_reg_handler()
883 	struct intel_gvt *gvt = vgpu->gvt;  in cmd_reg_handler()  local
886 	if (offset + 4 > gvt->device_info.mmio_size) {  in cmd_reg_handler()
892 	if (!intel_gvt_mmio_is_cmd_access(gvt, offset)) {  in cmd_reg_handler()
927 	if (IS_GEN(gvt->dev_priv, 9) &&  in cmd_reg_handler()
928 			intel_gvt_mmio_is_in_ctx(gvt, offset) &&  in cmd_reg_handler()
936 			if (intel_gvt_mmio_has_mode_mask(s->vgpu->gvt, offset))  in cmd_reg_handler()
945 	intel_gvt_mmio_set_cmd_accessed(gvt, offset);  in cmd_reg_handler()
965 	struct intel_gvt *gvt = s->vgpu->gvt;  in cmd_handler_lri()  local
980 		if (IS_BROADWELL(gvt->dev_priv) && s->ring_id != RCS0) {  in cmd_handler_lri()
1002 		if (IS_BROADWELL(s->vgpu->gvt->dev_priv))  in cmd_handler_lrr()
1023 	struct intel_gvt *gvt = s->vgpu->gvt;  in cmd_handler_lrm()  local
1024 	int gmadr_bytes = gvt->device_info.gmadr_bytes_in_cmd;  in cmd_handler_lrm()
1030 		if (IS_BROADWELL(gvt->dev_priv))  in cmd_handler_lrm()
1052 	int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd;  in cmd_handler_srm()
1110 	int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd;  in cmd_handler_pipe_control()
1214 	struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv;  in gen8_decode_mi_display_flip()
1260 	struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv;  in skl_decode_mi_display_flip()
1319 	struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv;  in gen8_check_mi_display_flip()
1348 	struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv;  in gen8_update_plane_mmio_from_mi_display_flip()
1379 	struct drm_i915_private *dev_priv = s->vgpu->gvt->dev_priv;  in decode_mi_display_flip()
1468 	int gmadr_bytes = vgpu->gvt->device_info.gmadr_bytes_in_cmd;  in get_gma_bb_from_cmd()
1489 	u32 max_surface_size = vgpu->gvt->device_info.max_surface_size;  in cmd_address_audit()
1533 	int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd;  in cmd_handler_mi_store_data_imm()
1590 	int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd;  in cmd_handler_mi_op_2f()
1640 	int gmadr_bytes = s->vgpu->gvt->device_info.gmadr_bytes_in_cmd;  in cmd_handler_mi_flush_dw()
1754 	info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id);  in find_bb_size()
1766 		info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id);  in find_bb_size()
1800 	info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id);  in audit_bb_end()
1858 	bb->obj = i915_gem_object_create_shmem(s->vgpu->gvt->dev_priv,  in perform_bb_shadow()
2648 static void add_cmd_entry(struct intel_gvt *gvt, struct cmd_entry *e)  in add_cmd_entry()  argument
2650 	hash_add(gvt->cmd_table, &e->hlist, e->info->opcode);  in add_cmd_entry()
2667 		info = get_cmd_info(s->vgpu->gvt, cmd, s->ring_id);  in cmd_parser_exec()
2941 	obj = i915_gem_object_create_shmem(workload->vgpu->gvt->dev_priv,  in shadow_indirect_ctx()
3030 static const struct cmd_info *find_cmd_entry_any_ring(struct intel_gvt *gvt,  in find_cmd_entry_any_ring()  argument
3037 		info = find_cmd_entry(gvt, opcode, ring);  in find_cmd_entry_any_ring()
3044 static int init_cmd_table(struct intel_gvt *gvt)  in init_cmd_table()  argument
3051 	gen_type = intel_gvt_get_device_type(gvt);  in init_cmd_table()
3062 		info = find_cmd_entry_any_ring(gvt,  in init_cmd_table()
3074 		add_cmd_entry(gvt, e);  in init_cmd_table()
3082 static void clean_cmd_table(struct intel_gvt *gvt)  in clean_cmd_table()  argument
3088 	hash_for_each_safe(gvt->cmd_table, i, tmp, e, hlist)  in clean_cmd_table()
3091 	hash_init(gvt->cmd_table);  in clean_cmd_table()
3094 void intel_gvt_clean_cmd_parser(struct intel_gvt *gvt)  in intel_gvt_clean_cmd_parser()  argument
3096 	clean_cmd_table(gvt);  in intel_gvt_clean_cmd_parser()
3099 int intel_gvt_init_cmd_parser(struct intel_gvt *gvt)  in intel_gvt_init_cmd_parser()  argument
3103 	ret = init_cmd_table(gvt);  in intel_gvt_init_cmd_parser()
3105 		intel_gvt_clean_cmd_parser(gvt);  in intel_gvt_init_cmd_parser()