33 	} engine[I915_NUM_ENGINES];  member
39 	struct intel_engine_cs *engine;  in reference_lists_init()  local
48 	for_each_engine(engine, i915, id) {  in reference_lists_init()
49 		struct i915_wa_list *wal = &lists->engine[id].wa_list;  in reference_lists_init()
51 		wa_init_start(wal, "REF", engine->name);  in reference_lists_init()
52 		engine_init_workarounds(engine, wal);  in reference_lists_init()
55 		__intel_engine_init_ctx_wa(engine,  in reference_lists_init()
56 					   &lists->engine[id].ctx_wa_list,  in reference_lists_init()
64 	struct intel_engine_cs *engine;  in reference_lists_fini()  local
67 	for_each_engine(engine, i915, id)  in reference_lists_fini()
68 		intel_wa_list_free(&lists->engine[id].wa_list);  in reference_lists_fini()
74 read_nonprivs(struct i915_gem_context *ctx, struct intel_engine_cs *engine)  in read_nonprivs()  argument
76 	const u32 base = engine->mmio_base;  in read_nonprivs()
84 	result = i915_gem_object_create_internal(engine->i915, PAGE_SIZE);  in read_nonprivs()
99 	vma = i915_vma_instance(result, &engine->gt->ggtt->vm, NULL);  in read_nonprivs()
109 	rq = igt_request_alloc(ctx, engine);  in read_nonprivs()
156 get_whitelist_reg(const struct intel_engine_cs *engine, unsigned int i)  in get_whitelist_reg()  argument
158 	i915_reg_t reg = i < engine->whitelist.count ?  in get_whitelist_reg()
159 			 engine->whitelist.list[i].reg :  in get_whitelist_reg()
160 			 RING_NOPID(engine->mmio_base);  in get_whitelist_reg()
166 print_results(const struct intel_engine_cs *engine, const u32 *results)  in print_results()  argument
171 		u32 expected = get_whitelist_reg(engine, i);  in print_results()
180 			   struct intel_engine_cs *engine)  in check_whitelist()  argument
188 	results = read_nonprivs(ctx, engine);  in check_whitelist()
209 		u32 expected = get_whitelist_reg(engine, i);  in check_whitelist()
213 			print_results(engine, vaddr);  in check_whitelist()
228 static int do_device_reset(struct intel_engine_cs *engine)  in do_device_reset()  argument
230 	intel_gt_reset(engine->gt, engine->mask, "live_workarounds");  in do_device_reset()
234 static int do_engine_reset(struct intel_engine_cs *engine)  in do_engine_reset()  argument
236 	return intel_engine_reset(engine, "live_workarounds");  in do_engine_reset()
240 switch_to_scratch_context(struct intel_engine_cs *engine,  in switch_to_scratch_context()  argument
249 	ctx = kernel_context(engine->i915);  in switch_to_scratch_context()
255 	ce = i915_gem_context_get_engine(ctx, engine->legacy_idx);  in switch_to_scratch_context()
259 	with_intel_runtime_pm(&engine->i915->runtime_pm, wakeref)  in switch_to_scratch_context()
285 static int check_whitelist_across_reset(struct intel_engine_cs *engine,  in check_whitelist_across_reset()  argument
289 	struct drm_i915_private *i915 = engine->i915;  in check_whitelist_across_reset()
296 		engine->whitelist.count, engine->name, name);  in check_whitelist_across_reset()
302 	err = igt_spinner_init(&spin, engine->gt);  in check_whitelist_across_reset()
306 	err = check_whitelist(ctx, engine);  in check_whitelist_across_reset()
312 	err = switch_to_scratch_context(engine, &spin);  in check_whitelist_across_reset()
317 		err = reset(engine);  in check_whitelist_across_reset()
326 	err = check_whitelist(ctx, engine);  in check_whitelist_across_reset()
341 	err = check_whitelist(ctx, engine);  in check_whitelist_across_reset()
395 static bool wo_register(struct intel_engine_cs *engine, u32 reg)  in wo_register()  argument
397 	enum intel_platform platform = INTEL_INFO(engine->i915)->platform;  in wo_register()
422 static int whitelist_writable_count(struct intel_engine_cs *engine)  in whitelist_writable_count()  argument
424 	int count = engine->whitelist.count;  in whitelist_writable_count()
427 	for (i = 0; i < engine->whitelist.count; i++) {  in whitelist_writable_count()
428 		u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);  in whitelist_writable_count()
438 				 struct intel_engine_cs *engine)  in check_dirty_whitelist()  argument
481 	for (i = 0; i < engine->whitelist.count; i++) {  in check_dirty_whitelist()
482 		u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);  in check_dirty_whitelist()
490 		if (wo_register(engine, reg))  in check_dirty_whitelist()
501 			 engine->name, reg);  in check_dirty_whitelist()
554 		intel_gt_chipset_flush(engine->gt);  in check_dirty_whitelist()
556 		rq = igt_request_alloc(ctx, engine);  in check_dirty_whitelist()
562 		if (engine->emit_init_breadcrumb) { /* Be nice if we hang */  in check_dirty_whitelist()
563 			err = engine->emit_init_breadcrumb(rq);  in check_dirty_whitelist()
568 		err = engine->emit_bb_start(rq,  in check_dirty_whitelist()
581 			       engine->name, reg);  in check_dirty_whitelist()
599 				       engine->name, reg);  in check_dirty_whitelist()
629 			       engine->name, err, reg);  in check_dirty_whitelist()
633 					engine->name, reg, results[0]);  in check_dirty_whitelist()
636 					engine->name, reg, results[0], rsvd);  in check_dirty_whitelist()
683 	struct intel_engine_cs *engine;  in live_dirty_whitelist()  local
711 	for_each_engine(engine, i915, id) {  in live_dirty_whitelist()
712 		if (engine->whitelist.count == 0)  in live_dirty_whitelist()
715 		err = check_dirty_whitelist(ctx, engine);  in live_dirty_whitelist()
732 	struct intel_engine_cs *engine = i915->engine[RCS0];  in live_reset_whitelist()  local
737 	if (!engine || engine->whitelist.count == 0)  in live_reset_whitelist()
743 		err = check_whitelist_across_reset(engine,  in live_reset_whitelist()
751 		err = check_whitelist_across_reset(engine,  in live_reset_whitelist()
764 				      struct intel_engine_cs *engine,  in read_whitelisted_registers()  argument
771 	rq = igt_request_alloc(ctx, engine);  in read_whitelisted_registers()
779 	cs = intel_ring_begin(rq, 4 * engine->whitelist.count);  in read_whitelisted_registers()
785 	for (i = 0; i < engine->whitelist.count; i++) {  in read_whitelisted_registers()
787 		u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);  in read_whitelisted_registers()
809 				       struct intel_engine_cs *engine)  in scrub_whitelisted_registers()  argument
826 	*cs++ = MI_LOAD_REGISTER_IMM(whitelist_writable_count(engine));  in scrub_whitelisted_registers()
827 	for (i = 0; i < engine->whitelist.count; i++) {  in scrub_whitelisted_registers()
828 		u32 reg = i915_mmio_reg_offset(engine->whitelist.list[i].reg);  in scrub_whitelisted_registers()
839 	intel_gt_chipset_flush(engine->gt);  in scrub_whitelisted_registers()
841 	rq = igt_request_alloc(ctx, engine);  in scrub_whitelisted_registers()
847 	if (engine->emit_init_breadcrumb) { /* Be nice if we hang */  in scrub_whitelisted_registers()
848 		err = engine->emit_init_breadcrumb(rq);  in scrub_whitelisted_registers()
854 	err = engine->emit_bb_start(rq, batch->node.start, 0, 0);  in scrub_whitelisted_registers()
901 static bool result_eq(struct intel_engine_cs *engine,  in result_eq()  argument
904 	if (a != b && !pardon_reg(engine->i915, reg)) {  in result_eq()
923 static bool result_neq(struct intel_engine_cs *engine,  in result_neq()  argument
926 	if (a == b && !writeonly_reg(engine->i915, reg)) {  in result_neq()
936 check_whitelisted_registers(struct intel_engine_cs *engine,  in check_whitelisted_registers()  argument
939 			    bool (*fn)(struct intel_engine_cs *engine,  in check_whitelisted_registers()  argument
957 	for (i = 0; i < engine->whitelist.count; i++) {  in check_whitelisted_registers()
958 		const struct i915_wa *wa = &engine->whitelist.list[i];  in check_whitelisted_registers()
964 		if (!fn(engine, a[i], b[i], wa->reg))  in check_whitelisted_registers()
981 	struct intel_engine_cs *engine;  in live_isolated_whitelist()  local
1023 	for_each_engine(engine, i915, id) {  in live_isolated_whitelist()
1024 		if (!whitelist_writable_count(engine))  in live_isolated_whitelist()
1028 		err = read_whitelisted_registers(client[0].ctx, engine,  in live_isolated_whitelist()
1034 		err = scrub_whitelisted_registers(client[0].ctx, engine);  in live_isolated_whitelist()
1039 		err = read_whitelisted_registers(client[1].ctx, engine,  in live_isolated_whitelist()
1045 		err = check_whitelisted_registers(engine,  in live_isolated_whitelist()
1053 		err = read_whitelisted_registers(client[0].ctx, engine,  in live_isolated_whitelist()
1059 		err = check_whitelisted_registers(engine,  in live_isolated_whitelist()
1095 		enum intel_engine_id id = ce->engine->id;  in verify_wa_lists()
1098 					    &lists->engine[id].wa_list,  in verify_wa_lists()
1102 					    &lists->engine[id].ctx_wa_list,  in verify_wa_lists()
1178 		struct intel_engine_cs *engine = ce->engine;  in live_engine_reset_workarounds()  local
1181 		pr_info("Verifying after %s reset...\n", engine->name);  in live_engine_reset_workarounds()
1189 		intel_engine_reset(engine, "live_workarounds");  in live_engine_reset_workarounds()
1197 		ret = igt_spinner_init(&spin, engine->gt);  in live_engine_reset_workarounds()
1217 		intel_engine_reset(engine, "live_workarounds");  in live_engine_reset_workarounds()