86 	/* Cool contexts are too cool to be banned! (Used for reset testing.) */  in context_mark_guilty()
152 	/* Assert reset for at least 20 usec, and wait for acknowledgement. */  in i915_do_reset()
157 	/* Clear the reset request. */  in i915_do_reset()
200 		DRM_DEBUG_DRIVER("Wait for media reset failed\n");  in g4x_do_reset()
208 		DRM_DEBUG_DRIVER("Wait for render reset failed\n");  in g4x_do_reset()
235 		DRM_DEBUG_DRIVER("Wait for render reset failed\n");  in ironlake_do_reset()
246 		DRM_DEBUG_DRIVER("Wait for media reset failed\n");  in ironlake_do_reset()
256 /* Reset the hardware domains (GENX_GRDOM_*) specified by mask */
269 	/* Wait for the device to ack the reset requests */  in gen6_hw_domain_reset()
275 		DRM_DEBUG_DRIVER("Wait for 0x%08x engines reset failed\n",  in gen6_hw_domain_reset()
353 	 * Tell the engine that a software reset is going to happen. The engine  in gen11_lock_sfc()
357 	 * ends up being locked to the engine we want to reset, we have to reset  in gen11_lock_sfc()
358 	 * it as well (we will unlock it once the reset sequence is completed).  in gen11_lock_sfc()
454 		 * For catastrophic errors, ready-for-reset sequence  in gen8_engine_reset_prepare()
474 		DRM_ERROR("%s reset request timed out: {request: %08x, RESET_CTL: %08x}\n",  in gen8_engine_reset_prepare()
507 		 * some gens (kbl), possible system hang if reset  in gen8_reset_engines()
511 		 * failed reset with a wedged driver/gpu. And  in gen8_reset_engines()
513 		 * stop_engines() we have before the reset.  in gen8_reset_engines()
554 	reset_func reset;  in __intel_gt_reset()  local
558 	reset = intel_get_gpu_reset(gt->i915);  in __intel_gt_reset()
559 	if (!reset)  in __intel_gt_reset()
563 	 * If the power well sleeps during the reset, the reset  in __intel_gt_reset()
570 		ret = reset(gt, engine_mask, retry);  in __intel_gt_reset()
580 	if (!i915_modparams.reset)  in intel_has_gpu_reset()
588 	return INTEL_INFO(i915)->has_reset_engine && i915_modparams.reset >= 2;  in intel_has_reset_engine()
613 	 * During the reset sequence, we must prevent the engine from  in reset_prepare_engine()
615 	 * the engine, if it does enter RC6 during the reset, the state  in reset_prepare_engine()
617 	 * GPU state upon resume, i.e. fail to restart after a reset.  in reset_prepare_engine()
620 	engine->reset.prepare(engine);  in reset_prepare_engine()
695 	engine->reset.finish(engine);  in reset_finish_engine()
736 	if (test_bit(I915_WEDGED, &gt->reset.flags))  in __intel_gt_set_wedged()
755 	/* Even if the GPU reset fails, it should still stop the engines */  in __intel_gt_set_wedged()
768 	set_bit(I915_WEDGED, &gt->reset.flags);  in __intel_gt_set_wedged()
783 	mutex_lock(&gt->reset.mutex);  in intel_gt_set_wedged()
786 	mutex_unlock(&gt->reset.mutex);  in intel_gt_set_wedged()
795 	if (!test_bit(I915_WEDGED, &gt->reset.flags))  in __intel_gt_unset_wedged()
811 	 * No more can be submitted until we reset the wedged bit.  in __intel_gt_unset_wedged()
847 	 * the nop_submit_request on reset, we can do this from normal  in __intel_gt_unset_wedged()
855 	clear_bit(I915_WEDGED, &gt->reset.flags);  in __intel_gt_unset_wedged()
864 	mutex_lock(&gt->reset.mutex);  in intel_gt_unset_wedged()
866 	mutex_unlock(&gt->reset.mutex);  in intel_gt_unset_wedged()
904  * intel_gt_reset - reset chip after a hang
905  * @gt: #intel_gt to reset
909  * Reset the chip.  Useful if a hang is detected. Marks the device as wedged
913  *   - reset the chip using the reset reg
927 	GEM_TRACE("flags=%lx\n", gt->reset.flags);  in intel_gt_reset()
930 	GEM_BUG_ON(!test_bit(I915_RESET_BACKOFF, &gt->reset.flags));  in intel_gt_reset()
931 	mutex_lock(&gt->reset.mutex);  in intel_gt_reset()
945 		if (i915_modparams.reset)  in intel_gt_reset()
946 			dev_err(gt->i915->drm.dev, "GPU reset not supported\n");  in intel_gt_reset()
948 			DRM_DEBUG_DRIVER("GPU reset disabled\n");  in intel_gt_reset()
956 		dev_err(gt->i915->drm.dev, "Failed to reset chip\n");  in intel_gt_reset()
970 	 * was running at the time of the reset (i.e. we weren't VT  in intel_gt_reset()
975 		DRM_ERROR("Failed to initialise HW following reset (%d)\n",  in intel_gt_reset()
989 	mutex_unlock(&gt->reset.mutex);  in intel_gt_reset()
994 	 * History tells us that if we cannot reset the GPU now, we  in intel_gt_reset()
996 	 * subsequently. On failing the reset, we mark the driver  in intel_gt_reset()
1017  * intel_engine_reset - reset GPU engine to recover from a hang
1018  * @engine: engine to reset
1019  * @msg: reason for GPU reset; or NULL for no dev_notice()
1021  * Reset a specific GPU engine. Useful if a hang is detected.
1022  * Returns zero on successful reset or otherwise an error code.
1026  *  - reset engine (which will force the engine to idle)
1034 	GEM_TRACE("%s flags=%lx\n", engine->name, gt->reset.flags);  in intel_engine_reset()
1035 	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &gt->reset.flags));  in intel_engine_reset()
1052 		/* If we fail here, we expect to fallback to a global reset */  in intel_engine_reset()
1053 		DRM_DEBUG_DRIVER("%sFailed to reset %s, ret=%d\n",  in intel_engine_reset()
1068 	 * have been reset to their default values. Follow the init_ring  in intel_engine_reset()
1095 	/* Use a watchdog to ensure that our reset completes */  in intel_gt_reset_global()
1100 		synchronize_srcu_expedited(&gt->reset.backoff_srcu);  in intel_gt_reset_global()
1107 	if (!test_bit(I915_WEDGED, &gt->reset.flags))  in intel_gt_reset_global()
1148 	 * request that won't finish until the reset is done. This  in intel_gt_handle_error()
1150 	 * simulated reset via debugfs, so get an RPM reference.  in intel_gt_handle_error()
1162 	 * Try engine reset when available. We fall back to full reset if  in intel_gt_handle_error()
1163 	 * single reset fails.  in intel_gt_handle_error()
1169 					     &gt->reset.flags))  in intel_gt_handle_error()
1176 					      &gt->reset.flags);  in intel_gt_handle_error()
1183 	/* Full reset needs the mutex, stop any other user trying to do so. */  in intel_gt_handle_error()
1184 	if (test_and_set_bit(I915_RESET_BACKOFF, &gt->reset.flags)) {  in intel_gt_handle_error()
1185 		wait_event(gt->reset.queue,  in intel_gt_handle_error()
1186 			   !test_bit(I915_RESET_BACKOFF, &gt->reset.flags));  in intel_gt_handle_error()
1187 		goto out; /* piggy-back on the other reset */  in intel_gt_handle_error()
1193 	/* Prevent any other reset-engine attempt. */  in intel_gt_handle_error()
1196 					&gt->reset.flags))  in intel_gt_handle_error()
1197 			wait_on_bit(&gt->reset.flags,  in intel_gt_handle_error()
1206 				 &gt->reset.flags);  in intel_gt_handle_error()
1207 	clear_bit_unlock(I915_RESET_BACKOFF, &gt->reset.flags);  in intel_gt_handle_error()
1209 	wake_up_all(&gt->reset.queue);  in intel_gt_handle_error()
1217 	might_lock(&gt->reset.backoff_srcu);  in intel_gt_reset_trylock()
1221 	while (test_bit(I915_RESET_BACKOFF, &gt->reset.flags)) {  in intel_gt_reset_trylock()
1224 		if (wait_event_interruptible(gt->reset.queue,  in intel_gt_reset_trylock()
1226 						       &gt->reset.flags)))  in intel_gt_reset_trylock()
1231 	*srcu = srcu_read_lock(&gt->reset.backoff_srcu);  in intel_gt_reset_trylock()
1238 __releases(&gt->reset.backoff_srcu)  in intel_gt_reset_unlock()
1240 	srcu_read_unlock(&gt->reset.backoff_srcu, tag);  in intel_gt_reset_unlock()
1250 	/* Reset still in progress? Maybe we will recover? */  in intel_gt_terminally_wedged()
1251 	if (!test_bit(I915_RESET_BACKOFF, &gt->reset.flags))  in intel_gt_terminally_wedged()
1258 	if (wait_event_interruptible(gt->reset.queue,  in intel_gt_terminally_wedged()
1260 					       &gt->reset.flags)))  in intel_gt_terminally_wedged()
1268 	init_waitqueue_head(&gt->reset.queue);  in intel_gt_init_reset()
1269 	mutex_init(&gt->reset.mutex);  in intel_gt_init_reset()
1270 	init_srcu_struct(&gt->reset.backoff_srcu);  in intel_gt_init_reset()
1275 	cleanup_srcu_struct(&gt->reset.backoff_srcu);  in intel_gt_fini_reset()