2004 gen8_emit_flush_coherentl3_wa(struct intel_engine_cs *engine, u32 *batch)  in gen8_emit_flush_coherentl3_wa()  argument
2007 	*batch++ = MI_STORE_REGISTER_MEM_GEN8 | MI_SRM_LRM_GLOBAL_GTT;  in gen8_emit_flush_coherentl3_wa()
2008 	*batch++ = i915_mmio_reg_offset(GEN8_L3SQCREG4);  in gen8_emit_flush_coherentl3_wa()
2009 	*batch++ = intel_gt_scratch_offset(engine->gt,  in gen8_emit_flush_coherentl3_wa()
2011 	*batch++ = 0;  in gen8_emit_flush_coherentl3_wa()
2013 	*batch++ = MI_LOAD_REGISTER_IMM(1);  in gen8_emit_flush_coherentl3_wa()
2014 	*batch++ = i915_mmio_reg_offset(GEN8_L3SQCREG4);  in gen8_emit_flush_coherentl3_wa()
2015 	*batch++ = 0x40400000 | GEN8_LQSC_FLUSH_COHERENT_LINES;  in gen8_emit_flush_coherentl3_wa()
2017 	batch = gen8_emit_pipe_control(batch,  in gen8_emit_flush_coherentl3_wa()
2022 	*batch++ = MI_LOAD_REGISTER_MEM_GEN8 | MI_SRM_LRM_GLOBAL_GTT;  in gen8_emit_flush_coherentl3_wa()
2023 	*batch++ = i915_mmio_reg_offset(GEN8_L3SQCREG4);  in gen8_emit_flush_coherentl3_wa()
2024 	*batch++ = intel_gt_scratch_offset(engine->gt,  in gen8_emit_flush_coherentl3_wa()
2026 	*batch++ = 0;  in gen8_emit_flush_coherentl3_wa()
2028 	return batch;  in gen8_emit_flush_coherentl3_wa()
2052 static u32 *gen8_init_indirectctx_bb(struct intel_engine_cs *engine, u32 *batch)  in gen8_init_indirectctx_bb()  argument
2055 	*batch++ = MI_ARB_ON_OFF | MI_ARB_DISABLE;  in gen8_init_indirectctx_bb()
2059 		batch = gen8_emit_flush_coherentl3_wa(engine, batch);  in gen8_init_indirectctx_bb()
2063 	batch = gen8_emit_pipe_control(batch,  in gen8_init_indirectctx_bb()
2070 	*batch++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;  in gen8_init_indirectctx_bb()
2073 	while ((unsigned long)batch % CACHELINE_BYTES)  in gen8_init_indirectctx_bb()
2074 		*batch++ = MI_NOOP;  in gen8_init_indirectctx_bb()
2082 	return batch;  in gen8_init_indirectctx_bb()
2090 static u32 *emit_lri(u32 *batch, const struct lri *lri, unsigned int count)  in emit_lri()  argument
2094 	*batch++ = MI_LOAD_REGISTER_IMM(count);  in emit_lri()
2096 		*batch++ = i915_mmio_reg_offset(lri->reg);  in emit_lri()
2097 		*batch++ = lri->value;  in emit_lri()
2099 	*batch++ = MI_NOOP;  in emit_lri()
2101 	return batch;  in emit_lri()
2104 static u32 *gen9_init_indirectctx_bb(struct intel_engine_cs *engine, u32 *batch)  in gen9_init_indirectctx_bb()  argument
2129 	*batch++ = MI_ARB_ON_OFF | MI_ARB_DISABLE;  in gen9_init_indirectctx_bb()
2132 	batch = gen8_emit_flush_coherentl3_wa(engine, batch);  in gen9_init_indirectctx_bb()
2134 	batch = emit_lri(batch, lri, ARRAY_SIZE(lri));  in gen9_init_indirectctx_bb()
2151 		*batch++ = GEN9_MEDIA_POOL_STATE;  in gen9_init_indirectctx_bb()
2152 		*batch++ = GEN9_MEDIA_POOL_ENABLE;  in gen9_init_indirectctx_bb()
2153 		*batch++ = 0x00777000;  in gen9_init_indirectctx_bb()
2154 		*batch++ = 0;  in gen9_init_indirectctx_bb()
2155 		*batch++ = 0;  in gen9_init_indirectctx_bb()
2156 		*batch++ = 0;  in gen9_init_indirectctx_bb()
2159 	*batch++ = MI_ARB_ON_OFF | MI_ARB_ENABLE;  in gen9_init_indirectctx_bb()
2162 	while ((unsigned long)batch % CACHELINE_BYTES)  in gen9_init_indirectctx_bb()
2163 		*batch++ = MI_NOOP;  in gen9_init_indirectctx_bb()
2165 	return batch;  in gen9_init_indirectctx_bb()
2169 gen10_init_indirectctx_bb(struct intel_engine_cs *engine, u32 *batch)  in gen10_init_indirectctx_bb()  argument
2179 	batch = gen8_emit_pipe_control(batch,  in gen10_init_indirectctx_bb()
2193 		*batch++ = MI_NOOP;  in gen10_init_indirectctx_bb()
2196 	while ((unsigned long)batch % CACHELINE_BYTES)  in gen10_init_indirectctx_bb()
2197 		*batch++ = MI_NOOP;  in gen10_init_indirectctx_bb()
2199 	return batch;  in gen10_init_indirectctx_bb()
2237 typedef u32 *(*wa_bb_func_t)(struct intel_engine_cs *engine, u32 *batch);
2246 	void *batch, *batch_ptr;  in intel_init_workaround_bb()  local
2281 	batch = batch_ptr = kmap_atomic(page);  in intel_init_workaround_bb()
2289 		wa_bb[i]->offset = batch_ptr - batch;  in intel_init_workaround_bb()
2297 		wa_bb[i]->size = batch_ptr - (batch + wa_bb[i]->offset);  in intel_init_workaround_bb()
2300 	BUG_ON(batch_ptr - batch > CTX_WA_BB_OBJ_SIZE);  in intel_init_workaround_bb()
2302 	kunmap_atomic(batch);  in intel_init_workaround_bb()