491 	u32 pps_val = 0;  in intel_configure_pps_for_dsc_encoder()  local
498 	pps_val = DSC_VER_MAJ | vdsc_cfg->dsc_version_minor <<  in intel_configure_pps_for_dsc_encoder()
503 		pps_val |= DSC_BLOCK_PREDICTION;  in intel_configure_pps_for_dsc_encoder()
505 		pps_val |= DSC_COLOR_SPACE_CONVERSION;  in intel_configure_pps_for_dsc_encoder()
507 		pps_val |= DSC_422_ENABLE;  in intel_configure_pps_for_dsc_encoder()
509 		pps_val |= DSC_VBR_ENABLE;  in intel_configure_pps_for_dsc_encoder()
510 	DRM_INFO("PPS0 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
512 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_0, pps_val);  in intel_configure_pps_for_dsc_encoder()
518 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_0, pps_val);  in intel_configure_pps_for_dsc_encoder()
520 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_0(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
523 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
527 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
528 	pps_val |= DSC_BPP(vdsc_cfg->bits_per_pixel);  in intel_configure_pps_for_dsc_encoder()
529 	DRM_INFO("PPS1 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
531 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_1, pps_val);  in intel_configure_pps_for_dsc_encoder()
537 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_1, pps_val);  in intel_configure_pps_for_dsc_encoder()
539 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_1(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
542 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
546 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
547 	pps_val |= DSC_PIC_HEIGHT(vdsc_cfg->pic_height) |  in intel_configure_pps_for_dsc_encoder()
549 	DRM_INFO("PPS2 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
551 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_2, pps_val);  in intel_configure_pps_for_dsc_encoder()
557 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_2, pps_val);  in intel_configure_pps_for_dsc_encoder()
559 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_2(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
562 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
566 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
567 	pps_val |= DSC_SLICE_HEIGHT(vdsc_cfg->slice_height) |  in intel_configure_pps_for_dsc_encoder()
569 	DRM_INFO("PPS3 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
571 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_3, pps_val);  in intel_configure_pps_for_dsc_encoder()
577 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_3, pps_val);  in intel_configure_pps_for_dsc_encoder()
579 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_3(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
582 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
586 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
587 	pps_val |= DSC_INITIAL_XMIT_DELAY(vdsc_cfg->initial_xmit_delay) |  in intel_configure_pps_for_dsc_encoder()
589 	DRM_INFO("PPS4 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
591 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_4, pps_val);  in intel_configure_pps_for_dsc_encoder()
597 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_4, pps_val);  in intel_configure_pps_for_dsc_encoder()
599 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_4(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
602 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
606 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
607 	pps_val |= DSC_SCALE_INC_INT(vdsc_cfg->scale_increment_interval) |  in intel_configure_pps_for_dsc_encoder()
609 	DRM_INFO("PPS5 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
611 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_5, pps_val);  in intel_configure_pps_for_dsc_encoder()
617 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_5, pps_val);  in intel_configure_pps_for_dsc_encoder()
619 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_5(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
622 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
626 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
627 	pps_val |= DSC_INITIAL_SCALE_VALUE(vdsc_cfg->initial_scale_value) |  in intel_configure_pps_for_dsc_encoder()
631 	DRM_INFO("PPS6 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
633 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_6, pps_val);  in intel_configure_pps_for_dsc_encoder()
639 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_6, pps_val);  in intel_configure_pps_for_dsc_encoder()
641 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_6(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
644 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
648 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
649 	pps_val |= DSC_SLICE_BPG_OFFSET(vdsc_cfg->slice_bpg_offset) |  in intel_configure_pps_for_dsc_encoder()
651 	DRM_INFO("PPS7 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
653 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_7, pps_val);  in intel_configure_pps_for_dsc_encoder()
659 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_7, pps_val);  in intel_configure_pps_for_dsc_encoder()
661 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_7(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
664 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
668 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
669 	pps_val |= DSC_FINAL_OFFSET(vdsc_cfg->final_offset) |  in intel_configure_pps_for_dsc_encoder()
671 	DRM_INFO("PPS8 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
673 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_8, pps_val);  in intel_configure_pps_for_dsc_encoder()
679 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_8, pps_val);  in intel_configure_pps_for_dsc_encoder()
681 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_8(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
684 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
688 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
689 	pps_val |= DSC_RC_MODEL_SIZE(DSC_RC_MODEL_SIZE_CONST) |  in intel_configure_pps_for_dsc_encoder()
691 	DRM_INFO("PPS9 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
693 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_9, pps_val);  in intel_configure_pps_for_dsc_encoder()
699 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_9, pps_val);  in intel_configure_pps_for_dsc_encoder()
701 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_9(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
704 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
708 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
709 	pps_val |= DSC_RC_QUANT_INC_LIMIT0(vdsc_cfg->rc_quant_incr_limit0) |  in intel_configure_pps_for_dsc_encoder()
713 	DRM_INFO("PPS10 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
715 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_10, pps_val);  in intel_configure_pps_for_dsc_encoder()
721 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_10, pps_val);  in intel_configure_pps_for_dsc_encoder()
723 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_10(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
726 				   pps_val);  in intel_configure_pps_for_dsc_encoder()
730 	pps_val = 0;  in intel_configure_pps_for_dsc_encoder()
731 	pps_val |= DSC_SLICE_CHUNK_SIZE(vdsc_cfg->slice_chunk_size) |  in intel_configure_pps_for_dsc_encoder()
736 	DRM_INFO("PPS16 = 0x%08x\n", pps_val);  in intel_configure_pps_for_dsc_encoder()
738 		I915_WRITE(DSCA_PICTURE_PARAMETER_SET_16, pps_val);  in intel_configure_pps_for_dsc_encoder()
744 			I915_WRITE(DSCC_PICTURE_PARAMETER_SET_16, pps_val);  in intel_configure_pps_for_dsc_encoder()
746 		I915_WRITE(ICL_DSC0_PICTURE_PARAMETER_SET_16(pipe), pps_val);  in intel_configure_pps_for_dsc_encoder()
749 				   pps_val);  in intel_configure_pps_for_dsc_encoder()