Lines Matching refs:vbt
333 &dev_priv->vbt.ddi_port_info[dig_port->base.port]; in intel_dp_set_source_rates()
879 int backlight_controller = dev_priv->vbt.backlight.controller; in bxt_power_sequencer_idx()
1883 dev_priv->vbt.edp.bpp && dev_priv->vbt.edp.bpp < bpp) { in intel_dp_compute_bpp()
1885 dev_priv->vbt.edp.bpp); in intel_dp_compute_bpp()
1886 bpp = dev_priv->vbt.edp.bpp; in intel_dp_compute_bpp()
3205 if (intel_dp_is_edp(intel_dp) && dev_priv->vbt.edp.bpp && in intel_dp_get_config()
3206 pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) { in intel_dp_get_config()
3221 pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp); in intel_dp_get_config()
3222 dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp; in intel_dp_get_config()
6440 struct edp_power_seq cur, vbt, spec, in intel_dp_init_panel_power_sequencer() local
6453 vbt = dev_priv->vbt.edp.pps; in intel_dp_init_panel_power_sequencer()
6460 vbt.t11_t12 = max_t(u16, vbt.t11_t12, 1300 * 10); in intel_dp_init_panel_power_sequencer()
6462 vbt.t11_t12); in intel_dp_init_panel_power_sequencer()
6468 vbt.t11_t12 += 100 * 10; in intel_dp_init_panel_power_sequencer()
6482 intel_pps_dump_state("vbt", &vbt); in intel_dp_init_panel_power_sequencer()
6486 #define assign_final(field) final->field = (max(cur.field, vbt.field) == 0 ? \ in intel_dp_init_panel_power_sequencer()
6488 max(cur.field, vbt.field)) in intel_dp_init_panel_power_sequencer()
6981 if (dev_priv->vbt.drrs_type != SEAMLESS_DRRS_SUPPORT) { in intel_dp_drrs_init()
6992 dev_priv->drrs.type = dev_priv->vbt.drrs_type; in intel_dp_drrs_init()