147 bool intel_dp_is_edp(struct intel_dp *intel_dp)  in intel_dp_is_edp()  argument
149 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in intel_dp_is_edp()
154 static struct intel_dp *intel_attached_dp(struct drm_connector *connector)  in intel_attached_dp()
161 static bool edp_panel_vdd_on(struct intel_dp *intel_dp);
162 static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync);
167 static void intel_dp_unset_edid(struct intel_dp *intel_dp);
170 static void intel_dp_set_sink_rates(struct intel_dp *intel_dp)  in intel_dp_set_sink_rates()  argument
177 	max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]);  in intel_dp_set_sink_rates()
182 		intel_dp->sink_rates[i] = dp_rates[i];  in intel_dp_set_sink_rates()
185 	intel_dp->num_sink_rates = i;  in intel_dp_set_sink_rates()
203 static int intel_dp_common_len_rate_limit(const struct intel_dp *intel_dp,  in intel_dp_common_len_rate_limit()  argument
206 	return intel_dp_rate_limit_len(intel_dp->common_rates,  in intel_dp_common_len_rate_limit()
207 				       intel_dp->num_common_rates, max_rate);  in intel_dp_common_len_rate_limit()
211 static int intel_dp_max_common_rate(struct intel_dp *intel_dp)  in intel_dp_max_common_rate()  argument
213 	return intel_dp->common_rates[intel_dp->num_common_rates - 1];  in intel_dp_max_common_rate()
217 static int intel_dp_max_common_lane_count(struct intel_dp *intel_dp)  in intel_dp_max_common_lane_count()  argument
219 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in intel_dp_max_common_lane_count()
221 	int sink_max = drm_dp_max_lane_count(intel_dp->dpcd);  in intel_dp_max_common_lane_count()
227 int intel_dp_max_lane_count(struct intel_dp *intel_dp)  in intel_dp_max_lane_count()  argument
229 	return intel_dp->max_link_lane_count;  in intel_dp_max_lane_count()
252 intel_dp_downstream_max_dotclock(struct intel_dp *intel_dp)  in intel_dp_downstream_max_dotclock()  argument
254 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in intel_dp_downstream_max_dotclock()
260 	int type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;  in intel_dp_downstream_max_dotclock()
265 	ds_max_dotclk = drm_dp_downstream_max_clock(intel_dp->dpcd,  in intel_dp_downstream_max_dotclock()
266 						    intel_dp->downstream_ports);  in intel_dp_downstream_max_dotclock()
274 static int cnl_max_source_rate(struct intel_dp *intel_dp)  in cnl_max_source_rate()  argument
276 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in cnl_max_source_rate()
297 static int icl_max_source_rate(struct intel_dp *intel_dp)  in icl_max_source_rate()  argument
299 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in icl_max_source_rate()
305 	    !intel_dp_is_edp(intel_dp))  in icl_max_source_rate()
312 intel_dp_set_source_rates(struct intel_dp *intel_dp)  in intel_dp_set_source_rates()  argument
330 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in intel_dp_set_source_rates()
338 	WARN_ON(intel_dp->source_rates || intel_dp->num_source_rates);  in intel_dp_set_source_rates()
344 			max_rate = cnl_max_source_rate(intel_dp);  in intel_dp_set_source_rates()
346 			max_rate = icl_max_source_rate(intel_dp);  in intel_dp_set_source_rates()
370 	intel_dp->source_rates = source_rates;  in intel_dp_set_source_rates()
371 	intel_dp->num_source_rates = size;  in intel_dp_set_source_rates()
409 static void intel_dp_set_common_rates(struct intel_dp *intel_dp)  in intel_dp_set_common_rates()  argument
411 	WARN_ON(!intel_dp->num_source_rates || !intel_dp->num_sink_rates);  in intel_dp_set_common_rates()
413 	intel_dp->num_common_rates = intersect_rates(intel_dp->source_rates,  in intel_dp_set_common_rates()
414 						     intel_dp->num_source_rates,  in intel_dp_set_common_rates()
415 						     intel_dp->sink_rates,  in intel_dp_set_common_rates()
416 						     intel_dp->num_sink_rates,  in intel_dp_set_common_rates()
417 						     intel_dp->common_rates);  in intel_dp_set_common_rates()
420 	if (WARN_ON(intel_dp->num_common_rates == 0)) {  in intel_dp_set_common_rates()
421 		intel_dp->common_rates[0] = 162000;  in intel_dp_set_common_rates()
422 		intel_dp->num_common_rates = 1;  in intel_dp_set_common_rates()
426 static bool intel_dp_link_params_valid(struct intel_dp *intel_dp, int link_rate,  in intel_dp_link_params_valid()  argument
435 	    link_rate > intel_dp->max_link_rate)  in intel_dp_link_params_valid()
439 	    lane_count > intel_dp_max_lane_count(intel_dp))  in intel_dp_link_params_valid()
445 static bool intel_dp_can_link_train_fallback_for_edp(struct intel_dp *intel_dp,  in intel_dp_can_link_train_fallback_for_edp()  argument
450 		intel_dp->attached_connector->panel.fixed_mode;  in intel_dp_can_link_train_fallback_for_edp()
461 int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,  in intel_dp_get_link_train_fallback_values()  argument
466 	index = intel_dp_rate_index(intel_dp->common_rates,  in intel_dp_get_link_train_fallback_values()
467 				    intel_dp->num_common_rates,  in intel_dp_get_link_train_fallback_values()
470 		if (intel_dp_is_edp(intel_dp) &&  in intel_dp_get_link_train_fallback_values()
471 		    !intel_dp_can_link_train_fallback_for_edp(intel_dp,  in intel_dp_get_link_train_fallback_values()
472 							      intel_dp->common_rates[index - 1],  in intel_dp_get_link_train_fallback_values()
477 		intel_dp->max_link_rate = intel_dp->common_rates[index - 1];  in intel_dp_get_link_train_fallback_values()
478 		intel_dp->max_link_lane_count = lane_count;  in intel_dp_get_link_train_fallback_values()
480 		if (intel_dp_is_edp(intel_dp) &&  in intel_dp_get_link_train_fallback_values()
481 		    !intel_dp_can_link_train_fallback_for_edp(intel_dp,  in intel_dp_get_link_train_fallback_values()
482 							      intel_dp_max_common_rate(intel_dp),  in intel_dp_get_link_train_fallback_values()
487 		intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp);  in intel_dp_get_link_train_fallback_values()
488 		intel_dp->max_link_lane_count = lane_count >> 1;  in intel_dp_get_link_train_fallback_values()
550 static u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,  in intel_dp_dsc_get_slice_count()  argument
563 	max_slice_width = drm_dp_dsc_sink_max_slice_width(intel_dp->dsc_dpcd);  in intel_dp_dsc_get_slice_count()
577 		    drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd,  in intel_dp_dsc_get_slice_count()
592 	struct intel_dp *intel_dp = intel_attached_dp(connector);  in intel_dp_mode_valid()  local
605 	max_dotclk = intel_dp_downstream_max_dotclock(intel_dp);  in intel_dp_mode_valid()
607 	if (intel_dp_is_edp(intel_dp) && fixed_mode) {  in intel_dp_mode_valid()
617 	max_link_clock = intel_dp_max_link_rate(intel_dp);  in intel_dp_mode_valid()
618 	max_lanes = intel_dp_max_lane_count(intel_dp);  in intel_dp_mode_valid()
628 	    drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)) {  in intel_dp_mode_valid()
629 		if (intel_dp_is_edp(intel_dp)) {  in intel_dp_mode_valid()
631 				drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4;  in intel_dp_mode_valid()
633 				drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd,  in intel_dp_mode_valid()
635 		} else if (drm_dp_sink_supports_fec(intel_dp->fec_capable)) {  in intel_dp_mode_valid()
642 				intel_dp_dsc_get_slice_count(intel_dp,  in intel_dp_mode_valid()
683 intel_dp_init_panel_power_sequencer(struct intel_dp *intel_dp);
685 intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,
688 intel_dp_pps_init(struct intel_dp *intel_dp);
691 pps_lock(struct intel_dp *intel_dp)  in pps_lock()  argument
693 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in pps_lock()
701 					  intel_aux_power_domain(dp_to_dig_port(intel_dp)));  in pps_lock()
709 pps_unlock(struct intel_dp *intel_dp, intel_wakeref_t wakeref)  in pps_unlock()  argument
711 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in pps_unlock()
715 				intel_aux_power_domain(dp_to_dig_port(intel_dp)),  in pps_unlock()
724 vlv_power_sequencer_kick(struct intel_dp *intel_dp)  in vlv_power_sequencer_kick()  argument
726 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in vlv_power_sequencer_kick()
727 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in vlv_power_sequencer_kick()
728 	enum pipe pipe = intel_dp->pps_pipe;  in vlv_power_sequencer_kick()
734 	if (WARN(I915_READ(intel_dp->output_reg) & DP_PORT_EN,  in vlv_power_sequencer_kick()
745 	DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;  in vlv_power_sequencer_kick()
779 	I915_WRITE(intel_dp->output_reg, DP);  in vlv_power_sequencer_kick()
780 	POSTING_READ(intel_dp->output_reg);  in vlv_power_sequencer_kick()
782 	I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN);  in vlv_power_sequencer_kick()
783 	POSTING_READ(intel_dp->output_reg);  in vlv_power_sequencer_kick()
785 	I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);  in vlv_power_sequencer_kick()
786 	POSTING_READ(intel_dp->output_reg);  in vlv_power_sequencer_kick()
806 		struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in vlv_find_free_pps()  local
809 			WARN_ON(intel_dp->active_pipe != INVALID_PIPE &&  in vlv_find_free_pps()
810 				intel_dp->active_pipe != intel_dp->pps_pipe);  in vlv_find_free_pps()
812 			if (intel_dp->pps_pipe != INVALID_PIPE)  in vlv_find_free_pps()
813 				pipes &= ~(1 << intel_dp->pps_pipe);  in vlv_find_free_pps()
815 			WARN_ON(intel_dp->pps_pipe != INVALID_PIPE);  in vlv_find_free_pps()
817 			if (intel_dp->active_pipe != INVALID_PIPE)  in vlv_find_free_pps()
818 				pipes &= ~(1 << intel_dp->active_pipe);  in vlv_find_free_pps()
829 vlv_power_sequencer_pipe(struct intel_dp *intel_dp)  in vlv_power_sequencer_pipe()  argument
831 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in vlv_power_sequencer_pipe()
832 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in vlv_power_sequencer_pipe()
838 	WARN_ON(!intel_dp_is_edp(intel_dp));  in vlv_power_sequencer_pipe()
840 	WARN_ON(intel_dp->active_pipe != INVALID_PIPE &&  in vlv_power_sequencer_pipe()
841 		intel_dp->active_pipe != intel_dp->pps_pipe);  in vlv_power_sequencer_pipe()
843 	if (intel_dp->pps_pipe != INVALID_PIPE)  in vlv_power_sequencer_pipe()
844 		return intel_dp->pps_pipe;  in vlv_power_sequencer_pipe()
856 	intel_dp->pps_pipe = pipe;  in vlv_power_sequencer_pipe()
859 		      pipe_name(intel_dp->pps_pipe),  in vlv_power_sequencer_pipe()
863 	intel_dp_init_panel_power_sequencer(intel_dp);  in vlv_power_sequencer_pipe()
864 	intel_dp_init_panel_power_sequencer_registers(intel_dp, true);  in vlv_power_sequencer_pipe()
870 	vlv_power_sequencer_kick(intel_dp);  in vlv_power_sequencer_pipe()
872 	return intel_dp->pps_pipe;  in vlv_power_sequencer_pipe()
876 bxt_power_sequencer_idx(struct intel_dp *intel_dp)  in bxt_power_sequencer_idx()  argument
878 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in bxt_power_sequencer_idx()
884 	WARN_ON(!intel_dp_is_edp(intel_dp));  in bxt_power_sequencer_idx()
886 	if (!intel_dp->pps_reset)  in bxt_power_sequencer_idx()
889 	intel_dp->pps_reset = false;  in bxt_power_sequencer_idx()
895 	intel_dp_init_panel_power_sequencer_registers(intel_dp, false);  in bxt_power_sequencer_idx()
945 vlv_initial_power_sequencer_setup(struct intel_dp *intel_dp)  in vlv_initial_power_sequencer_setup()  argument
947 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in vlv_initial_power_sequencer_setup()
948 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in vlv_initial_power_sequencer_setup()
955 	intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port,  in vlv_initial_power_sequencer_setup()
958 	if (intel_dp->pps_pipe == INVALID_PIPE)  in vlv_initial_power_sequencer_setup()
959 		intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port,  in vlv_initial_power_sequencer_setup()
962 	if (intel_dp->pps_pipe == INVALID_PIPE)  in vlv_initial_power_sequencer_setup()
963 		intel_dp->pps_pipe = vlv_initial_pps_pipe(dev_priv, port,  in vlv_initial_power_sequencer_setup()
967 	if (intel_dp->pps_pipe == INVALID_PIPE) {  in vlv_initial_power_sequencer_setup()
974 		      port_name(port), pipe_name(intel_dp->pps_pipe));  in vlv_initial_power_sequencer_setup()
976 	intel_dp_init_panel_power_sequencer(intel_dp);  in vlv_initial_power_sequencer_setup()
977 	intel_dp_init_panel_power_sequencer_registers(intel_dp, false);  in vlv_initial_power_sequencer_setup()
999 		struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_power_sequencer_reset()  local
1001 		WARN_ON(intel_dp->active_pipe != INVALID_PIPE);  in intel_power_sequencer_reset()
1007 			intel_dp->pps_reset = true;  in intel_power_sequencer_reset()
1009 			intel_dp->pps_pipe = INVALID_PIPE;  in intel_power_sequencer_reset()
1021 static void intel_pps_get_registers(struct intel_dp *intel_dp,  in intel_pps_get_registers()  argument
1024 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_pps_get_registers()
1030 		pps_idx = bxt_power_sequencer_idx(intel_dp);  in intel_pps_get_registers()
1032 		pps_idx = vlv_power_sequencer_pipe(intel_dp);  in intel_pps_get_registers()
1047 _pp_ctrl_reg(struct intel_dp *intel_dp)  in _pp_ctrl_reg()  argument
1051 	intel_pps_get_registers(intel_dp, &regs);  in _pp_ctrl_reg()
1057 _pp_stat_reg(struct intel_dp *intel_dp)  in _pp_stat_reg()  argument
1061 	intel_pps_get_registers(intel_dp, &regs);  in _pp_stat_reg()
1071 	struct intel_dp *intel_dp = container_of(this, typeof(* intel_dp),  in edp_notify_handler()  local
1073 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in edp_notify_handler()
1076 	if (!intel_dp_is_edp(intel_dp) || code != SYS_RESTART)  in edp_notify_handler()
1079 	with_pps_lock(intel_dp, wakeref) {  in edp_notify_handler()
1081 			enum pipe pipe = vlv_power_sequencer_pipe(intel_dp);  in edp_notify_handler()
1093 			msleep(intel_dp->panel_power_cycle_delay);  in edp_notify_handler()
1100 static bool edp_have_panel_power(struct intel_dp *intel_dp)  in edp_have_panel_power()  argument
1102 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in edp_have_panel_power()
1107 	    intel_dp->pps_pipe == INVALID_PIPE)  in edp_have_panel_power()
1110 	return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0;  in edp_have_panel_power()
1113 static bool edp_have_panel_vdd(struct intel_dp *intel_dp)  in edp_have_panel_vdd()  argument
1115 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in edp_have_panel_vdd()
1120 	    intel_dp->pps_pipe == INVALID_PIPE)  in edp_have_panel_vdd()
1123 	return I915_READ(_pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD;  in edp_have_panel_vdd()
1127 intel_dp_check_edp(struct intel_dp *intel_dp)  in intel_dp_check_edp()  argument
1129 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_check_edp()
1131 	if (!intel_dp_is_edp(intel_dp))  in intel_dp_check_edp()
1134 	if (!edp_have_panel_power(intel_dp) && !edp_have_panel_vdd(intel_dp)) {  in intel_dp_check_edp()
1137 			      I915_READ(_pp_stat_reg(intel_dp)),  in intel_dp_check_edp()
1138 			      I915_READ(_pp_ctrl_reg(intel_dp)));  in intel_dp_check_edp()
1143 intel_dp_aux_wait_done(struct intel_dp *intel_dp)  in intel_dp_aux_wait_done()  argument
1145 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);  in intel_dp_aux_wait_done()
1146 	i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp);  in intel_dp_aux_wait_done()
1164 static u32 g4x_get_aux_clock_divider(struct intel_dp *intel_dp, int index)  in g4x_get_aux_clock_divider()  argument
1166 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in g4x_get_aux_clock_divider()
1178 static u32 ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)  in ilk_get_aux_clock_divider()  argument
1180 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in ilk_get_aux_clock_divider()
1181 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in ilk_get_aux_clock_divider()
1197 static u32 hsw_get_aux_clock_divider(struct intel_dp *intel_dp, int index)  in hsw_get_aux_clock_divider()  argument
1199 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in hsw_get_aux_clock_divider()
1200 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in hsw_get_aux_clock_divider()
1211 	return ilk_get_aux_clock_divider(intel_dp, index);  in hsw_get_aux_clock_divider()
1214 static u32 skl_get_aux_clock_divider(struct intel_dp *intel_dp, int index)  in skl_get_aux_clock_divider()  argument
1224 static u32 g4x_get_aux_send_ctl(struct intel_dp *intel_dp,  in g4x_get_aux_send_ctl()  argument
1228 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in g4x_get_aux_send_ctl()
1254 static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,  in skl_get_aux_send_ctl()  argument
1258 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in skl_get_aux_send_ctl()
1282 intel_dp_aux_xfer(struct intel_dp *intel_dp,  in intel_dp_aux_xfer()  argument
1287 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in intel_dp_aux_xfer()
1304 	ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp);  in intel_dp_aux_xfer()
1306 		ch_data[i] = intel_dp->aux_ch_data_reg(intel_dp, i);  in intel_dp_aux_xfer()
1312 	pps_wakeref = pps_lock(intel_dp);  in intel_dp_aux_xfer()
1320 	vdd = edp_panel_vdd_on(intel_dp);  in intel_dp_aux_xfer()
1328 	intel_dp_check_edp(intel_dp);  in intel_dp_aux_xfer()
1360 	while ((aux_clock_divider = intel_dp->get_aux_clock_divider(intel_dp, clock++))) {  in intel_dp_aux_xfer()
1361 		u32 send_ctl = intel_dp->get_aux_send_ctl(intel_dp,  in intel_dp_aux_xfer()
1379 			status = intel_dp_aux_wait_done(intel_dp);  in intel_dp_aux_xfer()
1458 		edp_panel_vdd_off(intel_dp, false);  in intel_dp_aux_xfer()
1460 	pps_unlock(intel_dp, pps_wakeref);  in intel_dp_aux_xfer()
1485 	struct intel_dp *intel_dp = container_of(aux, struct intel_dp, aux);  in intel_dp_aux_transfer()  local
1507 		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,  in intel_dp_aux_transfer()
1530 		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,  in intel_dp_aux_transfer()
1554 static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp)  in g4x_aux_ctl_reg()  argument
1556 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in g4x_aux_ctl_reg()
1557 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in g4x_aux_ctl_reg()
1571 static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index)  in g4x_aux_data_reg()  argument
1573 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in g4x_aux_data_reg()
1574 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in g4x_aux_data_reg()
1588 static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp)  in ilk_aux_ctl_reg()  argument
1590 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in ilk_aux_ctl_reg()
1591 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in ilk_aux_ctl_reg()
1607 static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index)  in ilk_aux_data_reg()  argument
1609 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in ilk_aux_data_reg()
1610 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in ilk_aux_data_reg()
1626 static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp)  in skl_aux_ctl_reg()  argument
1628 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in skl_aux_ctl_reg()
1629 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in skl_aux_ctl_reg()
1646 static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index)  in skl_aux_data_reg()  argument
1648 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in skl_aux_data_reg()
1649 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in skl_aux_data_reg()
1667 intel_dp_aux_fini(struct intel_dp *intel_dp)  in intel_dp_aux_fini()  argument
1669 	kfree(intel_dp->aux.name);  in intel_dp_aux_fini()
1673 intel_dp_aux_init(struct intel_dp *intel_dp)  in intel_dp_aux_init()  argument
1675 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_aux_init()
1676 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in intel_dp_aux_init()
1680 		intel_dp->aux_ch_ctl_reg = skl_aux_ctl_reg;  in intel_dp_aux_init()
1681 		intel_dp->aux_ch_data_reg = skl_aux_data_reg;  in intel_dp_aux_init()
1683 		intel_dp->aux_ch_ctl_reg = ilk_aux_ctl_reg;  in intel_dp_aux_init()
1684 		intel_dp->aux_ch_data_reg = ilk_aux_data_reg;  in intel_dp_aux_init()
1686 		intel_dp->aux_ch_ctl_reg = g4x_aux_ctl_reg;  in intel_dp_aux_init()
1687 		intel_dp->aux_ch_data_reg = g4x_aux_data_reg;  in intel_dp_aux_init()
1691 		intel_dp->get_aux_clock_divider = skl_get_aux_clock_divider;  in intel_dp_aux_init()
1693 		intel_dp->get_aux_clock_divider = hsw_get_aux_clock_divider;  in intel_dp_aux_init()
1695 		intel_dp->get_aux_clock_divider = ilk_get_aux_clock_divider;  in intel_dp_aux_init()
1697 		intel_dp->get_aux_clock_divider = g4x_get_aux_clock_divider;  in intel_dp_aux_init()
1700 		intel_dp->get_aux_send_ctl = skl_get_aux_send_ctl;  in intel_dp_aux_init()
1702 		intel_dp->get_aux_send_ctl = g4x_get_aux_send_ctl;  in intel_dp_aux_init()
1704 	drm_dp_aux_init(&intel_dp->aux);  in intel_dp_aux_init()
1707 	intel_dp->aux.name = kasprintf(GFP_KERNEL, "DPDDC-%c",  in intel_dp_aux_init()
1709 	intel_dp->aux.transfer = intel_dp_aux_transfer;  in intel_dp_aux_init()
1712 bool intel_dp_source_supports_hbr2(struct intel_dp *intel_dp)  in intel_dp_source_supports_hbr2()  argument
1714 	int max_rate = intel_dp->source_rates[intel_dp->num_source_rates - 1];  in intel_dp_source_supports_hbr2()
1719 bool intel_dp_source_supports_hbr3(struct intel_dp *intel_dp)  in intel_dp_source_supports_hbr3()  argument
1721 	int max_rate = intel_dp->source_rates[intel_dp->num_source_rates - 1];  in intel_dp_source_supports_hbr3()
1775 static void intel_dp_print_rates(struct intel_dp *intel_dp)  in intel_dp_print_rates()  argument
1783 			   intel_dp->source_rates, intel_dp->num_source_rates);  in intel_dp_print_rates()
1787 			   intel_dp->sink_rates, intel_dp->num_sink_rates);  in intel_dp_print_rates()
1791 			   intel_dp->common_rates, intel_dp->num_common_rates);  in intel_dp_print_rates()
1796 intel_dp_max_link_rate(struct intel_dp *intel_dp)  in intel_dp_max_link_rate()  argument
1800 	len = intel_dp_common_len_rate_limit(intel_dp, intel_dp->max_link_rate);  in intel_dp_max_link_rate()
1804 	return intel_dp->common_rates[len - 1];  in intel_dp_max_link_rate()
1807 int intel_dp_rate_select(struct intel_dp *intel_dp, int rate)  in intel_dp_rate_select()  argument
1809 	int i = intel_dp_rate_index(intel_dp->sink_rates,  in intel_dp_rate_select()
1810 				    intel_dp->num_sink_rates, rate);  in intel_dp_rate_select()
1818 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,  in intel_dp_compute_rate()  argument
1822 	if (intel_dp->use_rate_select) {  in intel_dp_compute_rate()
1825 			intel_dp_rate_select(intel_dp, port_clock);  in intel_dp_compute_rate()
1832 static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp,  in intel_dp_source_supports_fec()  argument
1835 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_source_supports_fec()
1841 static bool intel_dp_supports_fec(struct intel_dp *intel_dp,  in intel_dp_supports_fec()  argument
1844 	return intel_dp_source_supports_fec(intel_dp, pipe_config) &&  in intel_dp_supports_fec()
1845 		drm_dp_sink_supports_fec(intel_dp->fec_capable);  in intel_dp_supports_fec()
1848 static bool intel_dp_source_supports_dsc(struct intel_dp *intel_dp,  in intel_dp_source_supports_dsc()  argument
1851 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_source_supports_dsc()
1857 static bool intel_dp_supports_dsc(struct intel_dp *intel_dp,  in intel_dp_supports_dsc()  argument
1860 	if (!intel_dp_is_edp(intel_dp) && !pipe_config->fec_enable)  in intel_dp_supports_dsc()
1863 	return intel_dp_source_supports_dsc(intel_dp, pipe_config) &&  in intel_dp_supports_dsc()
1864 		drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd);  in intel_dp_supports_dsc()
1867 static int intel_dp_compute_bpp(struct intel_dp *intel_dp,  in intel_dp_compute_bpp()  argument
1870 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_compute_bpp()
1871 	struct intel_connector *intel_connector = intel_dp->attached_connector;  in intel_dp_compute_bpp()
1875 	bpc = drm_dp_downstream_max_bpc(intel_dp->dpcd, intel_dp->downstream_ports);  in intel_dp_compute_bpp()
1880 	if (intel_dp_is_edp(intel_dp)) {  in intel_dp_compute_bpp()
1895 intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,  in intel_dp_adjust_compliance_config()  argument
1900 	if (intel_dp->compliance.test_data.bpc != 0) {  in intel_dp_adjust_compliance_config()
1901 		int bpp = 3 * intel_dp->compliance.test_data.bpc;  in intel_dp_adjust_compliance_config()
1910 	if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) {  in intel_dp_adjust_compliance_config()
1916 		if (intel_dp_link_params_valid(intel_dp, intel_dp->compliance.test_link_rate,  in intel_dp_adjust_compliance_config()
1917 					       intel_dp->compliance.test_lane_count)) {  in intel_dp_adjust_compliance_config()
1918 			index = intel_dp_rate_index(intel_dp->common_rates,  in intel_dp_adjust_compliance_config()
1919 						    intel_dp->num_common_rates,  in intel_dp_adjust_compliance_config()
1920 						    intel_dp->compliance.test_link_rate);  in intel_dp_adjust_compliance_config()
1924 				intel_dp->compliance.test_lane_count;  in intel_dp_adjust_compliance_config()
1944 intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,  in intel_dp_compute_link_config_wide()  argument
1962 				link_clock = intel_dp->common_rates[clock];  in intel_dp_compute_link_config_wide()
1980 static int intel_dp_dsc_compute_bpp(struct intel_dp *intel_dp, u8 dsc_max_bpc)  in intel_dp_dsc_compute_bpp()  argument
1985 	num_bpc = drm_dp_dsc_sink_supported_input_bpcs(intel_dp->dsc_dpcd,  in intel_dp_dsc_compute_bpp()
1995 static int intel_dp_dsc_compute_config(struct intel_dp *intel_dp,  in intel_dp_dsc_compute_config()  argument
2000 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in intel_dp_dsc_compute_config()
2007 	pipe_config->fec_enable = !intel_dp_is_edp(intel_dp) &&  in intel_dp_dsc_compute_config()
2008 		intel_dp_supports_fec(intel_dp, pipe_config);  in intel_dp_dsc_compute_config()
2010 	if (!intel_dp_supports_dsc(intel_dp, pipe_config))  in intel_dp_dsc_compute_config()
2016 	pipe_bpp = intel_dp_dsc_compute_bpp(intel_dp, dsc_max_bpc);  in intel_dp_dsc_compute_config()
2028 	pipe_config->port_clock = intel_dp->common_rates[limits->max_clock];  in intel_dp_dsc_compute_config()
2031 	if (intel_dp_is_edp(intel_dp)) {  in intel_dp_dsc_compute_config()
2033 			min_t(u16, drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4,  in intel_dp_dsc_compute_config()
2036 			drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd,  in intel_dp_dsc_compute_config()
2048 			intel_dp_dsc_get_slice_count(intel_dp,  in intel_dp_dsc_compute_config()
2074 	ret = intel_dp_compute_dsc_params(intel_dp, pipe_config);  in intel_dp_dsc_compute_config()
2107 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_dp_compute_link_config()  local
2112 	common_len = intel_dp_common_len_rate_limit(intel_dp,  in intel_dp_compute_link_config()
2113 						    intel_dp->max_link_rate);  in intel_dp_compute_link_config()
2122 	limits.max_lane_count = intel_dp_max_lane_count(intel_dp);  in intel_dp_compute_link_config()
2125 	limits.max_bpp = intel_dp_compute_bpp(intel_dp, pipe_config);  in intel_dp_compute_link_config()
2127 	if (intel_dp_is_edp(intel_dp)) {  in intel_dp_compute_link_config()
2139 	intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);  in intel_dp_compute_link_config()
2144 		      intel_dp->common_rates[limits.max_clock],  in intel_dp_compute_link_config()
2151 	ret = intel_dp_compute_link_config_wide(intel_dp, pipe_config, &limits);  in intel_dp_compute_link_config()
2154 	DRM_DEBUG_KMS("Force DSC en = %d\n", intel_dp->force_dsc_en);  in intel_dp_compute_link_config()
2155 	if (ret || intel_dp->force_dsc_en) {  in intel_dp_compute_link_config()
2156 		ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,  in intel_dp_compute_link_config()
2188 intel_dp_ycbcr420_config(struct intel_dp *intel_dp,  in intel_dp_ycbcr420_config()  argument
2199 	    !intel_dp_get_colorimetry_status(intel_dp) ||  in intel_dp_ycbcr420_config()
2247 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_dp_compute_config()  local
2251 	struct intel_connector *intel_connector = intel_dp->attached_connector;  in intel_dp_compute_config()
2254 	bool constant_n = drm_dp_has_quirk(&intel_dp->desc,  in intel_dp_compute_config()
2265 		ret = intel_dp_ycbcr420_config(intel_dp, &intel_connector->base,  in intel_dp_compute_config()
2275 		pipe_config->has_audio = intel_dp->has_audio;  in intel_dp_compute_config()
2279 	if (intel_dp_is_edp(intel_dp) && intel_connector->panel.fixed_mode) {  in intel_dp_compute_config()
2340 	intel_psr_compute_config(intel_dp, pipe_config);  in intel_dp_compute_config()
2345 void intel_dp_set_link_params(struct intel_dp *intel_dp,  in intel_dp_set_link_params()  argument
2349 	intel_dp->link_trained = false;  in intel_dp_set_link_params()
2350 	intel_dp->link_rate = link_rate;  in intel_dp_set_link_params()
2351 	intel_dp->lane_count = lane_count;  in intel_dp_set_link_params()
2352 	intel_dp->link_mst = link_mst;  in intel_dp_set_link_params()
2359 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_dp_prepare()  local
2364 	intel_dp_set_link_params(intel_dp, pipe_config->port_clock,  in intel_dp_prepare()
2389 	intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED;  in intel_dp_prepare()
2392 	intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0;  in intel_dp_prepare()
2393 	intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count);  in intel_dp_prepare()
2399 			intel_dp->DP |= DP_SYNC_HS_HIGH;  in intel_dp_prepare()
2401 			intel_dp->DP |= DP_SYNC_VS_HIGH;  in intel_dp_prepare()
2402 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;  in intel_dp_prepare()
2404 		if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))  in intel_dp_prepare()
2405 			intel_dp->DP |= DP_ENHANCED_FRAMING;  in intel_dp_prepare()
2407 		intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe);  in intel_dp_prepare()
2411 		intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT;  in intel_dp_prepare()
2414 		if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))  in intel_dp_prepare()
2421 			intel_dp->DP |= DP_COLOR_RANGE_16_235;  in intel_dp_prepare()
2424 			intel_dp->DP |= DP_SYNC_HS_HIGH;  in intel_dp_prepare()
2426 			intel_dp->DP |= DP_SYNC_VS_HIGH;  in intel_dp_prepare()
2427 		intel_dp->DP |= DP_LINK_TRAIN_OFF;  in intel_dp_prepare()
2429 		if (drm_dp_enhanced_frame_cap(intel_dp->dpcd))  in intel_dp_prepare()
2430 			intel_dp->DP |= DP_ENHANCED_FRAMING;  in intel_dp_prepare()
2433 			intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe);  in intel_dp_prepare()
2435 			intel_dp->DP |= DP_PIPE_SEL(crtc->pipe);  in intel_dp_prepare()
2448 static void intel_pps_verify_state(struct intel_dp *intel_dp);
2450 static void wait_panel_status(struct intel_dp *intel_dp,  in wait_panel_status()  argument
2454 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in wait_panel_status()
2459 	intel_pps_verify_state(intel_dp);  in wait_panel_status()
2461 	pp_stat_reg = _pp_stat_reg(intel_dp);  in wait_panel_status()
2462 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in wait_panel_status()
2478 static void wait_panel_on(struct intel_dp *intel_dp)  in wait_panel_on()  argument
2481 	wait_panel_status(intel_dp, IDLE_ON_MASK, IDLE_ON_VALUE);  in wait_panel_on()
2484 static void wait_panel_off(struct intel_dp *intel_dp)  in wait_panel_off()  argument
2487 	wait_panel_status(intel_dp, IDLE_OFF_MASK, IDLE_OFF_VALUE);  in wait_panel_off()
2490 static void wait_panel_power_cycle(struct intel_dp *intel_dp)  in wait_panel_power_cycle()  argument
2500 	panel_power_off_duration = ktime_ms_delta(panel_power_on_time, intel_dp->panel_power_off_time);  in wait_panel_power_cycle()
2504 	if (panel_power_off_duration < (s64)intel_dp->panel_power_cycle_delay)  in wait_panel_power_cycle()
2506 				       intel_dp->panel_power_cycle_delay - panel_power_off_duration);  in wait_panel_power_cycle()
2508 	wait_panel_status(intel_dp, IDLE_CYCLE_MASK, IDLE_CYCLE_VALUE);  in wait_panel_power_cycle()
2511 static void wait_backlight_on(struct intel_dp *intel_dp)  in wait_backlight_on()  argument
2513 	wait_remaining_ms_from_jiffies(intel_dp->last_power_on,  in wait_backlight_on()
2514 				       intel_dp->backlight_on_delay);  in wait_backlight_on()
2517 static void edp_wait_backlight_off(struct intel_dp *intel_dp)  in edp_wait_backlight_off()  argument
2519 	wait_remaining_ms_from_jiffies(intel_dp->last_backlight_off,  in edp_wait_backlight_off()
2520 				       intel_dp->backlight_off_delay);  in edp_wait_backlight_off()
2527 static  u32 ironlake_get_pp_control(struct intel_dp *intel_dp)  in ironlake_get_pp_control()  argument
2529 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in ironlake_get_pp_control()
2534 	control = I915_READ(_pp_ctrl_reg(intel_dp));  in ironlake_get_pp_control()
2548 static bool edp_panel_vdd_on(struct intel_dp *intel_dp)  in edp_panel_vdd_on()  argument
2550 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in edp_panel_vdd_on()
2551 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in edp_panel_vdd_on()
2554 	bool need_to_disable = !intel_dp->want_panel_vdd;  in edp_panel_vdd_on()
2558 	if (!intel_dp_is_edp(intel_dp))  in edp_panel_vdd_on()
2561 	cancel_delayed_work(&intel_dp->panel_vdd_work);  in edp_panel_vdd_on()
2562 	intel_dp->want_panel_vdd = true;  in edp_panel_vdd_on()
2564 	if (edp_have_panel_vdd(intel_dp))  in edp_panel_vdd_on()
2573 	if (!edp_have_panel_power(intel_dp))  in edp_panel_vdd_on()
2574 		wait_panel_power_cycle(intel_dp);  in edp_panel_vdd_on()
2576 	pp = ironlake_get_pp_control(intel_dp);  in edp_panel_vdd_on()
2579 	pp_stat_reg = _pp_stat_reg(intel_dp);  in edp_panel_vdd_on()
2580 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in edp_panel_vdd_on()
2589 	if (!edp_have_panel_power(intel_dp)) {  in edp_panel_vdd_on()
2592 		msleep(intel_dp->panel_power_up_delay);  in edp_panel_vdd_on()
2605 void intel_edp_panel_vdd_on(struct intel_dp *intel_dp)  in intel_edp_panel_vdd_on()  argument
2610 	if (!intel_dp_is_edp(intel_dp))  in intel_edp_panel_vdd_on()
2614 	with_pps_lock(intel_dp, wakeref)  in intel_edp_panel_vdd_on()
2615 		vdd = edp_panel_vdd_on(intel_dp);  in intel_edp_panel_vdd_on()
2617 	     port_name(dp_to_dig_port(intel_dp)->base.port));  in intel_edp_panel_vdd_on()
2620 static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp)  in edp_panel_vdd_off_sync()  argument
2622 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in edp_panel_vdd_off_sync()
2624 		dp_to_dig_port(intel_dp);  in edp_panel_vdd_off_sync()
2630 	WARN_ON(intel_dp->want_panel_vdd);  in edp_panel_vdd_off_sync()
2632 	if (!edp_have_panel_vdd(intel_dp))  in edp_panel_vdd_off_sync()
2638 	pp = ironlake_get_pp_control(intel_dp);  in edp_panel_vdd_off_sync()
2641 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in edp_panel_vdd_off_sync()
2642 	pp_stat_reg = _pp_stat_reg(intel_dp);  in edp_panel_vdd_off_sync()
2652 		intel_dp->panel_power_off_time = ktime_get_boottime();  in edp_panel_vdd_off_sync()
2660 	struct intel_dp *intel_dp =  in edp_panel_vdd_work()  local
2662 			     struct intel_dp, panel_vdd_work);  in edp_panel_vdd_work()
2665 	with_pps_lock(intel_dp, wakeref) {  in edp_panel_vdd_work()
2666 		if (!intel_dp->want_panel_vdd)  in edp_panel_vdd_work()
2667 			edp_panel_vdd_off_sync(intel_dp);  in edp_panel_vdd_work()
2671 static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp)  in edp_panel_vdd_schedule_off()  argument
2680 	delay = msecs_to_jiffies(intel_dp->panel_power_cycle_delay * 5);  in edp_panel_vdd_schedule_off()
2681 	schedule_delayed_work(&intel_dp->panel_vdd_work, delay);  in edp_panel_vdd_schedule_off()
2689 static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync)  in edp_panel_vdd_off()  argument
2691 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in edp_panel_vdd_off()
2695 	if (!intel_dp_is_edp(intel_dp))  in edp_panel_vdd_off()
2698 	I915_STATE_WARN(!intel_dp->want_panel_vdd, "eDP port %c VDD not forced on",  in edp_panel_vdd_off()
2699 	     port_name(dp_to_dig_port(intel_dp)->base.port));  in edp_panel_vdd_off()
2701 	intel_dp->want_panel_vdd = false;  in edp_panel_vdd_off()
2704 		edp_panel_vdd_off_sync(intel_dp);  in edp_panel_vdd_off()
2706 		edp_panel_vdd_schedule_off(intel_dp);  in edp_panel_vdd_off()
2709 static void edp_panel_on(struct intel_dp *intel_dp)  in edp_panel_on()  argument
2711 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in edp_panel_on()
2717 	if (!intel_dp_is_edp(intel_dp))  in edp_panel_on()
2721 		      port_name(dp_to_dig_port(intel_dp)->base.port));  in edp_panel_on()
2723 	if (WARN(edp_have_panel_power(intel_dp),  in edp_panel_on()
2725 		 port_name(dp_to_dig_port(intel_dp)->base.port)))  in edp_panel_on()
2728 	wait_panel_power_cycle(intel_dp);  in edp_panel_on()
2730 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in edp_panel_on()
2731 	pp = ironlake_get_pp_control(intel_dp);  in edp_panel_on()
2746 	wait_panel_on(intel_dp);  in edp_panel_on()
2747 	intel_dp->last_power_on = jiffies;  in edp_panel_on()
2756 void intel_edp_panel_on(struct intel_dp *intel_dp)  in intel_edp_panel_on()  argument
2760 	if (!intel_dp_is_edp(intel_dp))  in intel_edp_panel_on()
2763 	with_pps_lock(intel_dp, wakeref)  in intel_edp_panel_on()
2764 		edp_panel_on(intel_dp);  in intel_edp_panel_on()
2768 static void edp_panel_off(struct intel_dp *intel_dp)  in edp_panel_off()  argument
2770 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in edp_panel_off()
2771 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in edp_panel_off()
2777 	if (!intel_dp_is_edp(intel_dp))  in edp_panel_off()
2783 	WARN(!intel_dp->want_panel_vdd, "Need eDP port %c VDD to turn off panel\n",  in edp_panel_off()
2786 	pp = ironlake_get_pp_control(intel_dp);  in edp_panel_off()
2792 	pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in edp_panel_off()
2794 	intel_dp->want_panel_vdd = false;  in edp_panel_off()
2799 	wait_panel_off(intel_dp);  in edp_panel_off()
2800 	intel_dp->panel_power_off_time = ktime_get_boottime();  in edp_panel_off()
2806 void intel_edp_panel_off(struct intel_dp *intel_dp)  in intel_edp_panel_off()  argument
2810 	if (!intel_dp_is_edp(intel_dp))  in intel_edp_panel_off()
2813 	with_pps_lock(intel_dp, wakeref)  in intel_edp_panel_off()
2814 		edp_panel_off(intel_dp);  in intel_edp_panel_off()
2818 static void _intel_edp_backlight_on(struct intel_dp *intel_dp)  in _intel_edp_backlight_on()  argument
2820 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in _intel_edp_backlight_on()
2829 	wait_backlight_on(intel_dp);  in _intel_edp_backlight_on()
2831 	with_pps_lock(intel_dp, wakeref) {  in _intel_edp_backlight_on()
2832 		i915_reg_t pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in _intel_edp_backlight_on()
2835 		pp = ironlake_get_pp_control(intel_dp);  in _intel_edp_backlight_on()
2847 	struct intel_dp *intel_dp = enc_to_intel_dp(conn_state->best_encoder);  in intel_edp_backlight_on()  local
2849 	if (!intel_dp_is_edp(intel_dp))  in intel_edp_backlight_on()
2855 	_intel_edp_backlight_on(intel_dp);  in intel_edp_backlight_on()
2859 static void _intel_edp_backlight_off(struct intel_dp *intel_dp)  in _intel_edp_backlight_off()  argument
2861 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in _intel_edp_backlight_off()
2864 	if (!intel_dp_is_edp(intel_dp))  in _intel_edp_backlight_off()
2867 	with_pps_lock(intel_dp, wakeref) {  in _intel_edp_backlight_off()
2868 		i915_reg_t pp_ctrl_reg = _pp_ctrl_reg(intel_dp);  in _intel_edp_backlight_off()
2871 		pp = ironlake_get_pp_control(intel_dp);  in _intel_edp_backlight_off()
2878 	intel_dp->last_backlight_off = jiffies;  in _intel_edp_backlight_off()
2879 	edp_wait_backlight_off(intel_dp);  in _intel_edp_backlight_off()
2885 	struct intel_dp *intel_dp = enc_to_intel_dp(old_conn_state->best_encoder);  in intel_edp_backlight_off()  local
2887 	if (!intel_dp_is_edp(intel_dp))  in intel_edp_backlight_off()
2892 	_intel_edp_backlight_off(intel_dp);  in intel_edp_backlight_off()
2903 	struct intel_dp *intel_dp = intel_attached_dp(&connector->base);  in intel_edp_backlight_power()  local
2908 	with_pps_lock(intel_dp, wakeref)  in intel_edp_backlight_power()
2909 		is_enabled = ironlake_get_pp_control(intel_dp) & EDP_BLC_ENABLE;  in intel_edp_backlight_power()
2917 		_intel_edp_backlight_on(intel_dp);  in intel_edp_backlight_power()
2919 		_intel_edp_backlight_off(intel_dp);  in intel_edp_backlight_power()
2922 static void assert_dp_port(struct intel_dp *intel_dp, bool state)  in assert_dp_port()  argument
2924 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in assert_dp_port()
2926 	bool cur_state = I915_READ(intel_dp->output_reg) & DP_PORT_EN;  in assert_dp_port()
2946 static void ironlake_edp_pll_on(struct intel_dp *intel_dp,  in ironlake_edp_pll_on()  argument
2953 	assert_dp_port_disabled(intel_dp);  in ironlake_edp_pll_on()
2959 	intel_dp->DP &= ~DP_PLL_FREQ_MASK;  in ironlake_edp_pll_on()
2962 		intel_dp->DP |= DP_PLL_FREQ_162MHZ;  in ironlake_edp_pll_on()
2964 		intel_dp->DP |= DP_PLL_FREQ_270MHZ;  in ironlake_edp_pll_on()
2966 	I915_WRITE(DP_A, intel_dp->DP);  in ironlake_edp_pll_on()
2979 	intel_dp->DP |= DP_PLL_ENABLE;  in ironlake_edp_pll_on()
2981 	I915_WRITE(DP_A, intel_dp->DP);  in ironlake_edp_pll_on()
2986 static void ironlake_edp_pll_off(struct intel_dp *intel_dp,  in ironlake_edp_pll_off()  argument
2993 	assert_dp_port_disabled(intel_dp);  in ironlake_edp_pll_off()
2998 	intel_dp->DP &= ~DP_PLL_ENABLE;  in ironlake_edp_pll_off()
3000 	I915_WRITE(DP_A, intel_dp->DP);  in ironlake_edp_pll_off()
3005 static bool downstream_hpd_needs_d0(struct intel_dp *intel_dp)  in downstream_hpd_needs_d0()  argument
3015 	return intel_dp->dpcd[DP_DPCD_REV] == 0x11 &&  in downstream_hpd_needs_d0()
3016 		intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] & DP_DWN_STRM_PORT_PRESENT &&  in downstream_hpd_needs_d0()
3017 		intel_dp->downstream_ports[0] & DP_DS_PORT_HPD;  in downstream_hpd_needs_d0()
3020 void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,  in intel_dp_sink_set_decompression_state()  argument
3029 	ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_DSC_ENABLE,  in intel_dp_sink_set_decompression_state()
3037 void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)  in intel_dp_sink_dpms()  argument
3042 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)  in intel_dp_sink_dpms()
3046 		if (downstream_hpd_needs_d0(intel_dp))  in intel_dp_sink_dpms()
3049 		ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,  in intel_dp_sink_dpms()
3052 		struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);  in intel_dp_sink_dpms()
3059 			ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER,  in intel_dp_sink_dpms()
3125 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_dp_get_hw_state()  local
3134 	ret = intel_dp_port_enabled(dev_priv, intel_dp->output_reg,  in intel_dp_get_hw_state()
3146 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_dp_get_config()  local
3156 	tmp = I915_READ(intel_dp->output_reg);  in intel_dp_get_config()
3205 	if (intel_dp_is_edp(intel_dp) && dev_priv->vbt.edp.bpp &&  in intel_dp_get_config()
3230 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_disable_dp()  local
3232 	intel_dp->link_trained = false;  in intel_disable_dp()
3240 	intel_edp_panel_vdd_on(intel_dp);  in intel_disable_dp()
3242 	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);  in intel_disable_dp()
3243 	intel_edp_panel_off(intel_dp);  in intel_disable_dp()
3264 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in g4x_post_disable_dp()  local
3277 		ironlake_edp_pll_off(intel_dp, old_crtc_state);  in g4x_post_disable_dp()
3304 _intel_dp_set_link_train(struct intel_dp *intel_dp,  in _intel_dp_set_link_train()  argument
3308 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in _intel_dp_set_link_train()
3309 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in _intel_dp_set_link_train()
3311 	u8 train_pat_mask = drm_dp_training_pattern_mask(intel_dp->dpcd);  in _intel_dp_set_link_train()
3387 static void intel_dp_enable_port(struct intel_dp *intel_dp,  in intel_dp_enable_port()  argument
3390 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_enable_port()
3394 	intel_dp_program_link_training_pattern(intel_dp, DP_TRAINING_PATTERN_1);  in intel_dp_enable_port()
3402 	intel_dp->DP |= DP_PORT_EN;  in intel_dp_enable_port()
3404 		intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE;  in intel_dp_enable_port()
3406 	I915_WRITE(intel_dp->output_reg, intel_dp->DP);  in intel_dp_enable_port()
3407 	POSTING_READ(intel_dp->output_reg);  in intel_dp_enable_port()
3415 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_enable_dp()  local
3417 	u32 dp_reg = I915_READ(intel_dp->output_reg);  in intel_enable_dp()
3424 	with_pps_lock(intel_dp, wakeref) {  in intel_enable_dp()
3428 		intel_dp_enable_port(intel_dp, pipe_config);  in intel_enable_dp()
3430 		edp_panel_vdd_on(intel_dp);  in intel_enable_dp()
3431 		edp_panel_on(intel_dp);  in intel_enable_dp()
3432 		edp_panel_vdd_off(intel_dp, true);  in intel_enable_dp()
3441 		vlv_wait_port_ready(dev_priv, dp_to_dig_port(intel_dp),  in intel_enable_dp()
3445 	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);  in intel_enable_dp()
3446 	intel_dp_start_link_train(intel_dp);  in intel_enable_dp()
3447 	intel_dp_stop_link_train(intel_dp);  in intel_enable_dp()
3475 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in g4x_pre_enable_dp()  local
3482 		ironlake_edp_pll_on(intel_dp, pipe_config);  in g4x_pre_enable_dp()
3485 static void vlv_detach_power_sequencer(struct intel_dp *intel_dp)  in vlv_detach_power_sequencer()  argument
3487 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in vlv_detach_power_sequencer()
3489 	enum pipe pipe = intel_dp->pps_pipe;  in vlv_detach_power_sequencer()
3492 	WARN_ON(intel_dp->active_pipe != INVALID_PIPE);  in vlv_detach_power_sequencer()
3497 	edp_panel_vdd_off_sync(intel_dp);  in vlv_detach_power_sequencer()
3513 	intel_dp->pps_pipe = INVALID_PIPE;  in vlv_detach_power_sequencer()
3524 		struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in vlv_steal_power_sequencer()  local
3527 		WARN(intel_dp->active_pipe == pipe,  in vlv_steal_power_sequencer()
3531 		if (intel_dp->pps_pipe != pipe)  in vlv_steal_power_sequencer()
3538 		vlv_detach_power_sequencer(intel_dp);  in vlv_steal_power_sequencer()
3546 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in vlv_init_panel_power_sequencer()  local
3551 	WARN_ON(intel_dp->active_pipe != INVALID_PIPE);  in vlv_init_panel_power_sequencer()
3553 	if (intel_dp->pps_pipe != INVALID_PIPE &&  in vlv_init_panel_power_sequencer()
3554 	    intel_dp->pps_pipe != crtc->pipe) {  in vlv_init_panel_power_sequencer()
3560 		vlv_detach_power_sequencer(intel_dp);  in vlv_init_panel_power_sequencer()
3569 	intel_dp->active_pipe = crtc->pipe;  in vlv_init_panel_power_sequencer()
3571 	if (!intel_dp_is_edp(intel_dp))  in vlv_init_panel_power_sequencer()
3575 	intel_dp->pps_pipe = crtc->pipe;  in vlv_init_panel_power_sequencer()
3578 		      pipe_name(intel_dp->pps_pipe), port_name(encoder->port));  in vlv_init_panel_power_sequencer()
3581 	intel_dp_init_panel_power_sequencer(intel_dp);  in vlv_init_panel_power_sequencer()
3582 	intel_dp_init_panel_power_sequencer_registers(intel_dp, true);  in vlv_init_panel_power_sequencer()
3636 intel_dp_get_link_status(struct intel_dp *intel_dp, u8 link_status[DP_LINK_STATUS_SIZE])  in intel_dp_get_link_status()  argument
3638 	return drm_dp_dpcd_read(&intel_dp->aux, DP_LANE0_1_STATUS, link_status,  in intel_dp_get_link_status()
3644 intel_dp_voltage_max(struct intel_dp *intel_dp)  in intel_dp_voltage_max()  argument
3646 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_voltage_max()
3647 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;  in intel_dp_voltage_max()
3663 intel_dp_pre_emphasis_max(struct intel_dp *intel_dp, u8 voltage_swing)  in intel_dp_pre_emphasis_max()  argument
3665 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_pre_emphasis_max()
3666 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;  in intel_dp_pre_emphasis_max()
3708 static u32 vlv_signal_levels(struct intel_dp *intel_dp)  in vlv_signal_levels()  argument
3710 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;  in vlv_signal_levels()
3713 	u8 train_set = intel_dp->train_set[0];  in vlv_signal_levels()
3794 static u32 chv_signal_levels(struct intel_dp *intel_dp)  in chv_signal_levels()  argument
3796 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;  in chv_signal_levels()
3799 	u8 train_set = intel_dp->train_set[0];  in chv_signal_levels()
3975 intel_dp_set_signal_levels(struct intel_dp *intel_dp)  in intel_dp_set_signal_levels()  argument
3977 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_set_signal_levels()
3978 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in intel_dp_set_signal_levels()
3981 	u8 train_set = intel_dp->train_set[0];  in intel_dp_set_signal_levels()
3984 		signal_levels = bxt_signal_levels(intel_dp);  in intel_dp_set_signal_levels()
3986 		signal_levels = ddi_signal_levels(intel_dp);  in intel_dp_set_signal_levels()
3989 		signal_levels = chv_signal_levels(intel_dp);  in intel_dp_set_signal_levels()
3991 		signal_levels = vlv_signal_levels(intel_dp);  in intel_dp_set_signal_levels()
4012 	intel_dp->DP = (intel_dp->DP & ~mask) | signal_levels;  in intel_dp_set_signal_levels()
4014 	I915_WRITE(intel_dp->output_reg, intel_dp->DP);  in intel_dp_set_signal_levels()
4015 	POSTING_READ(intel_dp->output_reg);  in intel_dp_set_signal_levels()
4019 intel_dp_program_link_training_pattern(struct intel_dp *intel_dp,  in intel_dp_program_link_training_pattern()  argument
4022 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in intel_dp_program_link_training_pattern()
4026 	_intel_dp_set_link_train(intel_dp, &intel_dp->DP, dp_train_pat);  in intel_dp_program_link_training_pattern()
4028 	I915_WRITE(intel_dp->output_reg, intel_dp->DP);  in intel_dp_program_link_training_pattern()
4029 	POSTING_READ(intel_dp->output_reg);  in intel_dp_program_link_training_pattern()
4032 void intel_dp_set_idle_link_train(struct intel_dp *intel_dp)  in intel_dp_set_idle_link_train()  argument
4034 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_set_idle_link_train()
4035 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in intel_dp_set_idle_link_train()
4067 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_dp_link_down()  local
4070 	u32 DP = intel_dp->DP;  in intel_dp_link_down()
4072 	if (WARN_ON((I915_READ(intel_dp->output_reg) & DP_PORT_EN) == 0))  in intel_dp_link_down()
4085 	I915_WRITE(intel_dp->output_reg, DP);  in intel_dp_link_down()
4086 	POSTING_READ(intel_dp->output_reg);  in intel_dp_link_down()
4089 	I915_WRITE(intel_dp->output_reg, DP);  in intel_dp_link_down()
4090 	POSTING_READ(intel_dp->output_reg);  in intel_dp_link_down()
4109 		I915_WRITE(intel_dp->output_reg, DP);  in intel_dp_link_down()
4110 		POSTING_READ(intel_dp->output_reg);  in intel_dp_link_down()
4113 		I915_WRITE(intel_dp->output_reg, DP);  in intel_dp_link_down()
4114 		POSTING_READ(intel_dp->output_reg);  in intel_dp_link_down()
4121 	msleep(intel_dp->panel_power_down_delay);  in intel_dp_link_down()
4123 	intel_dp->DP = DP;  in intel_dp_link_down()
4128 		with_pps_lock(intel_dp, wakeref)  in intel_dp_link_down()
4129 			intel_dp->active_pipe = INVALID_PIPE;  in intel_dp_link_down()
4134 intel_dp_extended_receiver_capabilities(struct intel_dp *intel_dp)  in intel_dp_extended_receiver_capabilities()  argument
4145 	if (!(intel_dp->dpcd[DP_TRAINING_AUX_RD_INTERVAL] &  in intel_dp_extended_receiver_capabilities()
4149 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_DP13_DPCD_REV,  in intel_dp_extended_receiver_capabilities()
4155 	if (intel_dp->dpcd[DP_DPCD_REV] > dpcd_ext[DP_DPCD_REV]) {  in intel_dp_extended_receiver_capabilities()
4160 	if (!memcmp(intel_dp->dpcd, dpcd_ext, sizeof(dpcd_ext)))  in intel_dp_extended_receiver_capabilities()
4164 		      (int)sizeof(intel_dp->dpcd), intel_dp->dpcd);  in intel_dp_extended_receiver_capabilities()
4166 	memcpy(intel_dp->dpcd, dpcd_ext, sizeof(dpcd_ext));  in intel_dp_extended_receiver_capabilities()
4170 intel_dp_read_dpcd(struct intel_dp *intel_dp)  in intel_dp_read_dpcd()  argument
4172 	if (drm_dp_dpcd_read(&intel_dp->aux, 0x000, intel_dp->dpcd,  in intel_dp_read_dpcd()
4173 			     sizeof(intel_dp->dpcd)) < 0)  in intel_dp_read_dpcd()
4176 	intel_dp_extended_receiver_capabilities(intel_dp);  in intel_dp_read_dpcd()
4178 	DRM_DEBUG_KMS("DPCD: %*ph\n", (int) sizeof(intel_dp->dpcd), intel_dp->dpcd);  in intel_dp_read_dpcd()
4180 	return intel_dp->dpcd[DP_DPCD_REV] != 0;  in intel_dp_read_dpcd()
4183 bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp)  in intel_dp_get_colorimetry_status()  argument
4187 	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_DPRX_FEATURE_ENUMERATION_LIST,  in intel_dp_get_colorimetry_status()
4193 static void intel_dp_get_dsc_sink_cap(struct intel_dp *intel_dp)  in intel_dp_get_dsc_sink_cap()  argument
4199 	memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));  in intel_dp_get_dsc_sink_cap()
4202 	intel_dp->fec_capable = 0;  in intel_dp_get_dsc_sink_cap()
4205 	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x14 ||  in intel_dp_get_dsc_sink_cap()
4206 	    intel_dp->edp_dpcd[0] >= DP_EDP_14) {  in intel_dp_get_dsc_sink_cap()
4207 		if (drm_dp_dpcd_read(&intel_dp->aux, DP_DSC_SUPPORT,  in intel_dp_get_dsc_sink_cap()
4208 				     intel_dp->dsc_dpcd,  in intel_dp_get_dsc_sink_cap()
4209 				     sizeof(intel_dp->dsc_dpcd)) < 0)  in intel_dp_get_dsc_sink_cap()
4214 			      (int)sizeof(intel_dp->dsc_dpcd),  in intel_dp_get_dsc_sink_cap()
4215 			      intel_dp->dsc_dpcd);  in intel_dp_get_dsc_sink_cap()
4218 		if (!intel_dp_is_edp(intel_dp) &&  in intel_dp_get_dsc_sink_cap()
4219 		    drm_dp_dpcd_readb(&intel_dp->aux, DP_FEC_CAPABILITY,  in intel_dp_get_dsc_sink_cap()
4220 				      &intel_dp->fec_capable) < 0)  in intel_dp_get_dsc_sink_cap()
4223 		DRM_DEBUG_KMS("FEC CAPABILITY: %x\n", intel_dp->fec_capable);  in intel_dp_get_dsc_sink_cap()
4228 intel_edp_init_dpcd(struct intel_dp *intel_dp)  in intel_edp_init_dpcd()  argument
4231 		to_i915(dp_to_dig_port(intel_dp)->base.base.dev);  in intel_edp_init_dpcd()
4234 	WARN_ON(intel_dp->dpcd[DP_DPCD_REV] != 0);  in intel_edp_init_dpcd()
4236 	if (!intel_dp_read_dpcd(intel_dp))  in intel_edp_init_dpcd()
4239 	drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc,  in intel_edp_init_dpcd()
4240 			 drm_dp_is_branch(intel_dp->dpcd));  in intel_edp_init_dpcd()
4251 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_EDP_DPCD_REV,  in intel_edp_init_dpcd()
4252 			     intel_dp->edp_dpcd, sizeof(intel_dp->edp_dpcd)) ==  in intel_edp_init_dpcd()
4253 			     sizeof(intel_dp->edp_dpcd))  in intel_edp_init_dpcd()
4254 		DRM_DEBUG_KMS("eDP DPCD: %*ph\n", (int) sizeof(intel_dp->edp_dpcd),  in intel_edp_init_dpcd()
4255 			      intel_dp->edp_dpcd);  in intel_edp_init_dpcd()
4261 	intel_psr_init_dpcd(intel_dp);  in intel_edp_init_dpcd()
4264 	if (intel_dp->edp_dpcd[0] >= DP_EDP_14) {  in intel_edp_init_dpcd()
4268 		drm_dp_dpcd_read(&intel_dp->aux, DP_SUPPORTED_LINK_RATES,  in intel_edp_init_dpcd()
4283 			intel_dp->sink_rates[i] = (val * 200) / 10;  in intel_edp_init_dpcd()
4285 		intel_dp->num_sink_rates = i;  in intel_edp_init_dpcd()
4292 	if (intel_dp->num_sink_rates)  in intel_edp_init_dpcd()
4293 		intel_dp->use_rate_select = true;  in intel_edp_init_dpcd()
4295 		intel_dp_set_sink_rates(intel_dp);  in intel_edp_init_dpcd()
4297 	intel_dp_set_common_rates(intel_dp);  in intel_edp_init_dpcd()
4301 		intel_dp_get_dsc_sink_cap(intel_dp);  in intel_edp_init_dpcd()
4308 intel_dp_get_dpcd(struct intel_dp *intel_dp)  in intel_dp_get_dpcd()  argument
4310 	if (!intel_dp_read_dpcd(intel_dp))  in intel_dp_get_dpcd()
4317 	if (!intel_dp_is_edp(intel_dp)) {  in intel_dp_get_dpcd()
4318 		drm_dp_read_desc(&intel_dp->aux, &intel_dp->desc,  in intel_dp_get_dpcd()
4319 				 drm_dp_is_branch(intel_dp->dpcd));  in intel_dp_get_dpcd()
4321 		intel_dp_set_sink_rates(intel_dp);  in intel_dp_get_dpcd()
4322 		intel_dp_set_common_rates(intel_dp);  in intel_dp_get_dpcd()
4329 	if (!intel_dp_is_edp(intel_dp) &&  in intel_dp_get_dpcd()
4330 	    !drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_SINK_COUNT)) {  in intel_dp_get_dpcd()
4334 		r = drm_dp_dpcd_readb(&intel_dp->aux, DP_SINK_COUNT, &count);  in intel_dp_get_dpcd()
4343 		intel_dp->sink_count = DP_GET_SINK_COUNT(count);  in intel_dp_get_dpcd()
4352 		if (!intel_dp->sink_count)  in intel_dp_get_dpcd()
4356 	if (!drm_dp_is_branch(intel_dp->dpcd))  in intel_dp_get_dpcd()
4359 	if (intel_dp->dpcd[DP_DPCD_REV] == 0x10)  in intel_dp_get_dpcd()
4362 	if (drm_dp_dpcd_read(&intel_dp->aux, DP_DOWNSTREAM_PORT_0,  in intel_dp_get_dpcd()
4363 			     intel_dp->downstream_ports,  in intel_dp_get_dpcd()
4371 intel_dp_sink_can_mst(struct intel_dp *intel_dp)  in intel_dp_sink_can_mst()  argument
4375 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x12)  in intel_dp_sink_can_mst()
4378 	if (drm_dp_dpcd_readb(&intel_dp->aux, DP_MSTM_CAP, &mstm_cap) != 1)  in intel_dp_sink_can_mst()
4385 intel_dp_can_mst(struct intel_dp *intel_dp)  in intel_dp_can_mst()  argument
4388 		intel_dp->can_mst &&  in intel_dp_can_mst()
4389 		intel_dp_sink_can_mst(intel_dp);  in intel_dp_can_mst()
4393 intel_dp_configure_mst(struct intel_dp *intel_dp)  in intel_dp_configure_mst()  argument
4396 		&dp_to_dig_port(intel_dp)->base;  in intel_dp_configure_mst()
4397 	bool sink_can_mst = intel_dp_sink_can_mst(intel_dp);  in intel_dp_configure_mst()
4400 		      port_name(encoder->port), yesno(intel_dp->can_mst),  in intel_dp_configure_mst()
4403 	if (!intel_dp->can_mst)  in intel_dp_configure_mst()
4406 	intel_dp->is_mst = sink_can_mst &&  in intel_dp_configure_mst()
4409 	drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,  in intel_dp_configure_mst()
4410 					intel_dp->is_mst);  in intel_dp_configure_mst()
4414 intel_dp_get_sink_irq_esi(struct intel_dp *intel_dp, u8 *sink_irq_vector)  in intel_dp_get_sink_irq_esi()  argument
4416 	return drm_dp_dpcd_read(&intel_dp->aux, DP_SINK_COUNT_ESI,  in intel_dp_get_sink_irq_esi()
4422 intel_pixel_encoding_setup_vsc(struct intel_dp *intel_dp,  in intel_pixel_encoding_setup_vsc()  argument
4425 	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);  in intel_pixel_encoding_setup_vsc()
4502 void intel_dp_ycbcr_420_enable(struct intel_dp *intel_dp,  in intel_dp_ycbcr_420_enable()  argument
4508 	intel_pixel_encoding_setup_vsc(intel_dp, crtc_state);  in intel_dp_ycbcr_420_enable()
4511 static u8 intel_dp_autotest_link_training(struct intel_dp *intel_dp)  in intel_dp_autotest_link_training()  argument
4520 	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LANE_COUNT,  in intel_dp_autotest_link_training()
4529 	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_LINK_RATE,  in intel_dp_autotest_link_training()
4538 	if (!intel_dp_link_params_valid(intel_dp, test_link_rate,  in intel_dp_autotest_link_training()
4542 	intel_dp->compliance.test_lane_count = test_lane_count;  in intel_dp_autotest_link_training()
4543 	intel_dp->compliance.test_link_rate = test_link_rate;  in intel_dp_autotest_link_training()
4548 static u8 intel_dp_autotest_video_pattern(struct intel_dp *intel_dp)  in intel_dp_autotest_video_pattern()  argument
4556 	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_PATTERN,  in intel_dp_autotest_video_pattern()
4565 	status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_H_WIDTH_HI,  in intel_dp_autotest_video_pattern()
4572 	status = drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_V_HEIGHT_HI,  in intel_dp_autotest_video_pattern()
4579 	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_MISC0,  in intel_dp_autotest_video_pattern()
4591 		intel_dp->compliance.test_data.bpc = 6;  in intel_dp_autotest_video_pattern()
4594 		intel_dp->compliance.test_data.bpc = 8;  in intel_dp_autotest_video_pattern()
4600 	intel_dp->compliance.test_data.video_pattern = test_pattern;  in intel_dp_autotest_video_pattern()
4601 	intel_dp->compliance.test_data.hdisplay = be16_to_cpu(h_width);  in intel_dp_autotest_video_pattern()
4602 	intel_dp->compliance.test_data.vdisplay = be16_to_cpu(v_height);  in intel_dp_autotest_video_pattern()
4604 	intel_dp->compliance.test_active = 1;  in intel_dp_autotest_video_pattern()
4609 static u8 intel_dp_autotest_edid(struct intel_dp *intel_dp)  in intel_dp_autotest_edid()  argument
4612 	struct intel_connector *intel_connector = intel_dp->attached_connector;  in intel_dp_autotest_edid()
4617 	    intel_dp->aux.i2c_defer_count > 6) {  in intel_dp_autotest_edid()
4625 		if (intel_dp->aux.i2c_nack_count > 0 ||  in intel_dp_autotest_edid()
4626 			intel_dp->aux.i2c_defer_count > 0)  in intel_dp_autotest_edid()
4628 				      intel_dp->aux.i2c_nack_count,  in intel_dp_autotest_edid()
4629 				      intel_dp->aux.i2c_defer_count);  in intel_dp_autotest_edid()
4630 		intel_dp->compliance.test_data.edid = INTEL_DP_RESOLUTION_FAILSAFE;  in intel_dp_autotest_edid()
4639 		if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_EDID_CHECKSUM,  in intel_dp_autotest_edid()
4644 		intel_dp->compliance.test_data.edid = INTEL_DP_RESOLUTION_PREFERRED;  in intel_dp_autotest_edid()
4648 	intel_dp->compliance.test_active = 1;  in intel_dp_autotest_edid()
4653 static u8 intel_dp_autotest_phy_pattern(struct intel_dp *intel_dp)  in intel_dp_autotest_phy_pattern()  argument
4659 static void intel_dp_handle_test_request(struct intel_dp *intel_dp)  in intel_dp_handle_test_request()  argument
4665 	status = drm_dp_dpcd_readb(&intel_dp->aux, DP_TEST_REQUEST, &request);  in intel_dp_handle_test_request()
4674 		response = intel_dp_autotest_link_training(intel_dp);  in intel_dp_handle_test_request()
4678 		response = intel_dp_autotest_video_pattern(intel_dp);  in intel_dp_handle_test_request()
4682 		response = intel_dp_autotest_edid(intel_dp);  in intel_dp_handle_test_request()
4686 		response = intel_dp_autotest_phy_pattern(intel_dp);  in intel_dp_handle_test_request()
4694 		intel_dp->compliance.test_type = request;  in intel_dp_handle_test_request()
4697 	status = drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE, response);  in intel_dp_handle_test_request()
4703 intel_dp_check_mst_status(struct intel_dp *intel_dp)  in intel_dp_check_mst_status()  argument
4707 	if (intel_dp->is_mst) {  in intel_dp_check_mst_status()
4713 		WARN_ON_ONCE(intel_dp->active_mst_links < 0);  in intel_dp_check_mst_status()
4714 		bret = intel_dp_get_sink_irq_esi(intel_dp, esi);  in intel_dp_check_mst_status()
4719 			if (intel_dp->active_mst_links > 0 &&  in intel_dp_check_mst_status()
4720 			    !drm_dp_channel_eq_ok(&esi[10], intel_dp->lane_count)) {  in intel_dp_check_mst_status()
4722 				intel_dp_start_link_train(intel_dp);  in intel_dp_check_mst_status()
4723 				intel_dp_stop_link_train(intel_dp);  in intel_dp_check_mst_status()
4727 			ret = drm_dp_mst_hpd_irq(&intel_dp->mst_mgr, esi, &handled);  in intel_dp_check_mst_status()
4732 					wret = drm_dp_dpcd_write(&intel_dp->aux,  in intel_dp_check_mst_status()
4740 				bret = intel_dp_get_sink_irq_esi(intel_dp, esi);  in intel_dp_check_mst_status()
4751 			intel_dp->is_mst = false;  in intel_dp_check_mst_status()
4752 			drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,  in intel_dp_check_mst_status()
4753 							intel_dp->is_mst);  in intel_dp_check_mst_status()
4760 intel_dp_needs_link_retrain(struct intel_dp *intel_dp)  in intel_dp_needs_link_retrain()  argument
4764 	if (!intel_dp->link_trained)  in intel_dp_needs_link_retrain()
4775 	if (intel_psr_enabled(intel_dp))  in intel_dp_needs_link_retrain()
4778 	if (!intel_dp_get_link_status(intel_dp, link_status))  in intel_dp_needs_link_retrain()
4785 	if (!intel_dp_link_params_valid(intel_dp, intel_dp->link_rate,  in intel_dp_needs_link_retrain()
4786 					intel_dp->lane_count))  in intel_dp_needs_link_retrain()
4790 	return !drm_dp_channel_eq_ok(link_status, intel_dp->lane_count);  in intel_dp_needs_link_retrain()
4797 	struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);  in intel_dp_retrain_link()  local
4798 	struct intel_connector *connector = intel_dp->attached_connector;  in intel_dp_retrain_link()
4835 	if (!intel_dp_needs_link_retrain(intel_dp))  in intel_dp_retrain_link()
4844 	intel_dp_start_link_train(intel_dp);  in intel_dp_retrain_link()
4845 	intel_dp_stop_link_train(intel_dp);  in intel_dp_retrain_link()
4908 static void intel_dp_check_service_irq(struct intel_dp *intel_dp)  in intel_dp_check_service_irq()  argument
4912 	if (intel_dp->dpcd[DP_DPCD_REV] < 0x11)  in intel_dp_check_service_irq()
4915 	if (drm_dp_dpcd_readb(&intel_dp->aux,  in intel_dp_check_service_irq()
4919 	drm_dp_dpcd_writeb(&intel_dp->aux, DP_DEVICE_SERVICE_IRQ_VECTOR, val);  in intel_dp_check_service_irq()
4922 		intel_dp_handle_test_request(intel_dp);  in intel_dp_check_service_irq()
4925 		intel_hdcp_handle_cp_irq(intel_dp->attached_connector);  in intel_dp_check_service_irq()
4945 intel_dp_short_pulse(struct intel_dp *intel_dp)  in intel_dp_short_pulse()  argument
4947 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_short_pulse()
4948 	u8 old_sink_count = intel_dp->sink_count;  in intel_dp_short_pulse()
4955 	memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance));  in intel_dp_short_pulse()
4963 	ret = intel_dp_get_dpcd(intel_dp);  in intel_dp_short_pulse()
4965 	if ((old_sink_count != intel_dp->sink_count) || !ret) {  in intel_dp_short_pulse()
4970 	intel_dp_check_service_irq(intel_dp);  in intel_dp_short_pulse()
4973 	drm_dp_cec_irq(&intel_dp->aux);  in intel_dp_short_pulse()
4976 	if (intel_dp_needs_link_retrain(intel_dp))  in intel_dp_short_pulse()
4979 	intel_psr_short_pulse(intel_dp);  in intel_dp_short_pulse()
4981 	if (intel_dp->compliance.test_type == DP_TEST_LINK_TRAINING) {  in intel_dp_short_pulse()
4992 intel_dp_detect_dpcd(struct intel_dp *intel_dp)  in intel_dp_detect_dpcd()  argument
4994 	struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);  in intel_dp_detect_dpcd()
4995 	u8 *dpcd = intel_dp->dpcd;  in intel_dp_detect_dpcd()
4998 	if (WARN_ON(intel_dp_is_edp(intel_dp)))  in intel_dp_detect_dpcd()
5004 	if (!intel_dp_get_dpcd(intel_dp))  in intel_dp_detect_dpcd()
5012 	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&  in intel_dp_detect_dpcd()
5013 	    intel_dp->downstream_ports[0] & DP_DS_PORT_HPD) {  in intel_dp_detect_dpcd()
5015 		return intel_dp->sink_count ?  in intel_dp_detect_dpcd()
5019 	if (intel_dp_can_mst(intel_dp))  in intel_dp_detect_dpcd()
5023 	if (drm_probe_ddc(&intel_dp->aux.ddc))  in intel_dp_detect_dpcd()
5027 	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11) {  in intel_dp_detect_dpcd()
5028 		type = intel_dp->downstream_ports[0] & DP_DS_PORT_TYPE_MASK;  in intel_dp_detect_dpcd()
5033 		type = intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &  in intel_dp_detect_dpcd()
5046 edp_detect(struct intel_dp *intel_dp)  in edp_detect()  argument
5303 intel_dp_get_edid(struct intel_dp *intel_dp)  in intel_dp_get_edid()  argument
5305 	struct intel_connector *intel_connector = intel_dp->attached_connector;  in intel_dp_get_edid()
5316 				    &intel_dp->aux.ddc);  in intel_dp_get_edid()
5320 intel_dp_set_edid(struct intel_dp *intel_dp)  in intel_dp_set_edid()  argument
5322 	struct intel_connector *intel_connector = intel_dp->attached_connector;  in intel_dp_set_edid()
5325 	intel_dp_unset_edid(intel_dp);  in intel_dp_set_edid()
5326 	edid = intel_dp_get_edid(intel_dp);  in intel_dp_set_edid()
5329 	intel_dp->has_audio = drm_detect_monitor_audio(edid);  in intel_dp_set_edid()
5330 	drm_dp_cec_set_edid(&intel_dp->aux, edid);  in intel_dp_set_edid()
5334 intel_dp_unset_edid(struct intel_dp *intel_dp)  in intel_dp_unset_edid()  argument
5336 	struct intel_connector *intel_connector = intel_dp->attached_connector;  in intel_dp_unset_edid()
5338 	drm_dp_cec_unset_edid(&intel_dp->aux);  in intel_dp_unset_edid()
5342 	intel_dp->has_audio = false;  in intel_dp_unset_edid()
5351 	struct intel_dp *intel_dp = intel_attached_dp(connector);  in intel_dp_detect()  local
5352 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in intel_dp_detect()
5361 	if (intel_dp_is_edp(intel_dp))  in intel_dp_detect()
5362 		status = edp_detect(intel_dp);  in intel_dp_detect()
5364 		status = intel_dp_detect_dpcd(intel_dp);  in intel_dp_detect()
5369 		memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance));  in intel_dp_detect()
5370 		memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));  in intel_dp_detect()
5372 		if (intel_dp->is_mst) {  in intel_dp_detect()
5374 				      intel_dp->is_mst,  in intel_dp_detect()
5375 				      intel_dp->mst_mgr.mst_state);  in intel_dp_detect()
5376 			intel_dp->is_mst = false;  in intel_dp_detect()
5377 			drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,  in intel_dp_detect()
5378 							intel_dp->is_mst);  in intel_dp_detect()
5384 	if (intel_dp->reset_link_params) {  in intel_dp_detect()
5386 		intel_dp->max_link_lane_count = intel_dp_max_common_lane_count(intel_dp);  in intel_dp_detect()
5389 		intel_dp->max_link_rate = intel_dp_max_common_rate(intel_dp);  in intel_dp_detect()
5391 		intel_dp->reset_link_params = false;  in intel_dp_detect()
5394 	intel_dp_print_rates(intel_dp);  in intel_dp_detect()
5398 		intel_dp_get_dsc_sink_cap(intel_dp);  in intel_dp_detect()
5400 	intel_dp_configure_mst(intel_dp);  in intel_dp_detect()
5402 	if (intel_dp->is_mst) {  in intel_dp_detect()
5416 	if (!intel_dp_is_edp(intel_dp)) {  in intel_dp_detect()
5429 	intel_dp->aux.i2c_nack_count = 0;  in intel_dp_detect()
5430 	intel_dp->aux.i2c_defer_count = 0;  in intel_dp_detect()
5432 	intel_dp_set_edid(intel_dp);  in intel_dp_detect()
5433 	if (intel_dp_is_edp(intel_dp) ||  in intel_dp_detect()
5437 	intel_dp_check_service_irq(intel_dp);  in intel_dp_detect()
5440 	if (status != connector_status_connected && !intel_dp->is_mst)  in intel_dp_detect()
5441 		intel_dp_unset_edid(intel_dp);  in intel_dp_detect()
5455 	struct intel_dp *intel_dp = intel_attached_dp(connector);  in intel_dp_force()  local
5456 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in intel_dp_force()
5465 	intel_dp_unset_edid(intel_dp);  in intel_dp_force()
5472 	intel_dp_set_edid(intel_dp);  in intel_dp_force()
5508 	struct intel_dp *intel_dp = intel_attached_dp(connector);  in intel_dp_connector_register()  local
5519 		      intel_dp->aux.name, connector->kdev->kobj.name);  in intel_dp_connector_register()
5521 	intel_dp->aux.dev = connector->kdev;  in intel_dp_connector_register()
5522 	ret = drm_dp_aux_register(&intel_dp->aux);  in intel_dp_connector_register()
5524 		drm_dp_cec_register_connector(&intel_dp->aux,  in intel_dp_connector_register()
5532 	struct intel_dp *intel_dp = intel_attached_dp(connector);  in intel_dp_connector_unregister()  local
5534 	drm_dp_cec_unregister_connector(&intel_dp->aux);  in intel_dp_connector_unregister()
5535 	drm_dp_aux_unregister(&intel_dp->aux);  in intel_dp_connector_unregister()
5542 	struct intel_dp *intel_dp = &intel_dig_port->dp;  in intel_dp_encoder_flush_work()  local
5545 	if (intel_dp_is_edp(intel_dp)) {  in intel_dp_encoder_flush_work()
5548 		cancel_delayed_work_sync(&intel_dp->panel_vdd_work);  in intel_dp_encoder_flush_work()
5553 		with_pps_lock(intel_dp, wakeref)  in intel_dp_encoder_flush_work()
5554 			edp_panel_vdd_off_sync(intel_dp);  in intel_dp_encoder_flush_work()
5556 		if (intel_dp->edp_notifier.notifier_call) {  in intel_dp_encoder_flush_work()
5557 			unregister_reboot_notifier(&intel_dp->edp_notifier);  in intel_dp_encoder_flush_work()
5558 			intel_dp->edp_notifier.notifier_call = NULL;  in intel_dp_encoder_flush_work()
5562 	intel_dp_aux_fini(intel_dp);  in intel_dp_encoder_flush_work()
5575 	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_encoder->base);  in intel_dp_encoder_suspend()  local
5578 	if (!intel_dp_is_edp(intel_dp))  in intel_dp_encoder_suspend()
5585 	cancel_delayed_work_sync(&intel_dp->panel_vdd_work);  in intel_dp_encoder_suspend()
5586 	with_pps_lock(intel_dp, wakeref)  in intel_dp_encoder_suspend()
5587 		edp_panel_vdd_off_sync(intel_dp);  in intel_dp_encoder_suspend()
5606 	struct intel_dp *intel_dp = enc_to_intel_dp(&intel_dig_port->base.base);  in intel_dp_hdcp_write_an_aksv()  local
5633 	ret = intel_dp_aux_xfer(intel_dp, txbuf, HEADER_SIZE + msg.size,  in intel_dp_hdcp_write_an_aksv()
5929 	struct intel_dp *dp = &intel_dig_port->dp;  in intel_dp_hdcp2_wait_for_msg()
5981 	struct intel_dp *dp = &intel_dig_port->dp;  in intel_dp_hdcp2_write_msg()
6178 static void intel_edp_panel_vdd_sanitize(struct intel_dp *intel_dp)  in intel_edp_panel_vdd_sanitize()  argument
6180 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_edp_panel_vdd_sanitize()
6181 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);  in intel_edp_panel_vdd_sanitize()
6185 	if (!edp_have_panel_vdd(intel_dp))  in intel_edp_panel_vdd_sanitize()
6197 	edp_panel_vdd_schedule_off(intel_dp);  in intel_edp_panel_vdd_sanitize()
6200 static enum pipe vlv_active_pipe(struct intel_dp *intel_dp)  in vlv_active_pipe()  argument
6202 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in vlv_active_pipe()
6203 	struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;  in vlv_active_pipe()
6206 	if (intel_dp_port_enabled(dev_priv, intel_dp->output_reg,  in vlv_active_pipe()
6216 	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);  in intel_dp_encoder_reset()  local
6217 	struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);  in intel_dp_encoder_reset()
6221 		intel_dp->DP = I915_READ(intel_dp->output_reg);  in intel_dp_encoder_reset()
6226 	intel_dp->reset_link_params = true;  in intel_dp_encoder_reset()
6229 	    !intel_dp_is_edp(intel_dp))  in intel_dp_encoder_reset()
6232 	with_pps_lock(intel_dp, wakeref) {  in intel_dp_encoder_reset()
6234 			intel_dp->active_pipe = vlv_active_pipe(intel_dp);  in intel_dp_encoder_reset()
6236 		if (intel_dp_is_edp(intel_dp)) {  in intel_dp_encoder_reset()
6241 			intel_dp_pps_init(intel_dp);  in intel_dp_encoder_reset()
6242 			intel_edp_panel_vdd_sanitize(intel_dp);  in intel_dp_encoder_reset()
6274 	struct intel_dp *intel_dp = &intel_dig_port->dp;  in intel_dp_hpd_pulse()  local
6293 		intel_dp->reset_link_params = true;  in intel_dp_hpd_pulse()
6297 	if (intel_dp->is_mst) {  in intel_dp_hpd_pulse()
6298 		if (intel_dp_check_mst_status(intel_dp) == -EINVAL) {  in intel_dp_hpd_pulse()
6304 				      intel_dp->is_mst, intel_dp->mst_mgr.mst_state);  in intel_dp_hpd_pulse()
6305 			intel_dp->is_mst = false;  in intel_dp_hpd_pulse()
6306 			drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,  in intel_dp_hpd_pulse()
6307 							intel_dp->is_mst);  in intel_dp_hpd_pulse()
6313 	if (!intel_dp->is_mst) {  in intel_dp_hpd_pulse()
6316 		handled = intel_dp_short_pulse(intel_dp);  in intel_dp_hpd_pulse()
6342 intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector)  in intel_dp_add_properties()  argument
6345 	enum port port = dp_to_dig_port(intel_dp)->base.port;  in intel_dp_add_properties()
6356 	if (intel_dp_is_edp(intel_dp)) {  in intel_dp_add_properties()
6370 static void intel_dp_init_panel_power_timestamps(struct intel_dp *intel_dp)  in intel_dp_init_panel_power_timestamps()  argument
6372 	intel_dp->panel_power_off_time = ktime_get_boottime();  in intel_dp_init_panel_power_timestamps()
6373 	intel_dp->last_power_on = jiffies;  in intel_dp_init_panel_power_timestamps()
6374 	intel_dp->last_backlight_off = jiffies;  in intel_dp_init_panel_power_timestamps()
6378 intel_pps_readout_hw_state(struct intel_dp *intel_dp, struct edp_power_seq *seq)  in intel_pps_readout_hw_state()  argument
6380 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_pps_readout_hw_state()
6384 	intel_pps_get_registers(intel_dp, &regs);  in intel_pps_readout_hw_state()
6386 	pp_ctl = ironlake_get_pp_control(intel_dp);  in intel_pps_readout_hw_state()
6421 intel_pps_verify_state(struct intel_dp *intel_dp)  in intel_pps_verify_state()  argument
6424 	struct edp_power_seq *sw = &intel_dp->pps_delays;  in intel_pps_verify_state()
6426 	intel_pps_readout_hw_state(intel_dp, &hw);  in intel_pps_verify_state()
6437 intel_dp_init_panel_power_sequencer(struct intel_dp *intel_dp)  in intel_dp_init_panel_power_sequencer()  argument
6439 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_init_panel_power_sequencer()
6441 		*final = &intel_dp->pps_delays;  in intel_dp_init_panel_power_sequencer()
6449 	intel_pps_readout_hw_state(intel_dp, &cur);  in intel_dp_init_panel_power_sequencer()
6497 	intel_dp->panel_power_up_delay = get_delay(t1_t3);  in intel_dp_init_panel_power_sequencer()
6498 	intel_dp->backlight_on_delay = get_delay(t8);  in intel_dp_init_panel_power_sequencer()
6499 	intel_dp->backlight_off_delay = get_delay(t9);  in intel_dp_init_panel_power_sequencer()
6500 	intel_dp->panel_power_down_delay = get_delay(t10);  in intel_dp_init_panel_power_sequencer()
6501 	intel_dp->panel_power_cycle_delay = get_delay(t11_t12);  in intel_dp_init_panel_power_sequencer()
6505 		      intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay,  in intel_dp_init_panel_power_sequencer()
6506 		      intel_dp->panel_power_cycle_delay);  in intel_dp_init_panel_power_sequencer()
6509 		      intel_dp->backlight_on_delay, intel_dp->backlight_off_delay);  in intel_dp_init_panel_power_sequencer()
6529 intel_dp_init_panel_power_sequencer_registers(struct intel_dp *intel_dp,  in intel_dp_init_panel_power_sequencer_registers()  argument
6532 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_init_panel_power_sequencer_registers()
6536 	enum port port = dp_to_dig_port(intel_dp)->base.port;  in intel_dp_init_panel_power_sequencer_registers()
6537 	const struct edp_power_seq *seq = &intel_dp->pps_delays;  in intel_dp_init_panel_power_sequencer_registers()
6541 	intel_pps_get_registers(intel_dp, &regs);  in intel_dp_init_panel_power_sequencer_registers()
6556 		u32 pp = ironlake_get_pp_control(intel_dp);  in intel_dp_init_panel_power_sequencer_registers()
6623 static void intel_dp_pps_init(struct intel_dp *intel_dp)  in intel_dp_pps_init()  argument
6625 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_dp_pps_init()
6628 		vlv_initial_power_sequencer_setup(intel_dp);  in intel_dp_pps_init()
6630 		intel_dp_init_panel_power_sequencer(intel_dp);  in intel_dp_pps_init()
6631 		intel_dp_init_panel_power_sequencer_registers(intel_dp, false);  in intel_dp_pps_init()
6652 	struct intel_dp *intel_dp = dev_priv->drrs.dp;  in intel_dp_set_drrs_state()  local
6661 	if (intel_dp == NULL) {  in intel_dp_set_drrs_state()
6676 	if (intel_dp->attached_connector->panel.downclock_mode->vrefresh ==  in intel_dp_set_drrs_state()
6734 void intel_edp_drrs_enable(struct intel_dp *intel_dp,  in intel_edp_drrs_enable()  argument
6737 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_edp_drrs_enable()
6757 	dev_priv->drrs.dp = intel_dp;  in intel_edp_drrs_enable()
6769 void intel_edp_drrs_disable(struct intel_dp *intel_dp,  in intel_edp_drrs_disable()  argument
6772 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_edp_drrs_disable()
6785 			intel_dp->attached_connector->panel.fixed_mode->vrefresh);  in intel_edp_drrs_disable()
6797 	struct intel_dp *intel_dp;  in intel_edp_drrs_downclock_work()  local
6801 	intel_dp = dev_priv->drrs.dp;  in intel_edp_drrs_downclock_work()
6803 	if (!intel_dp)  in intel_edp_drrs_downclock_work()
6815 		struct drm_crtc *crtc = dp_to_dig_port(intel_dp)->base.base.crtc;  in intel_edp_drrs_downclock_work()
6818 			intel_dp->attached_connector->panel.downclock_mode->vrefresh);  in intel_edp_drrs_downclock_work()
6999 static bool intel_edp_init_connector(struct intel_dp *intel_dp,  in intel_edp_init_connector()  argument
7002 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);  in intel_edp_init_connector()
7012 	if (!intel_dp_is_edp(intel_dp))  in intel_edp_init_connector()
7015 	INIT_DELAYED_WORK(&intel_dp->panel_vdd_work, edp_panel_vdd_work);  in intel_edp_init_connector()
7030 	with_pps_lock(intel_dp, wakeref) {  in intel_edp_init_connector()
7031 		intel_dp_init_panel_power_timestamps(intel_dp);  in intel_edp_init_connector()
7032 		intel_dp_pps_init(intel_dp);  in intel_edp_init_connector()
7033 		intel_edp_panel_vdd_sanitize(intel_dp);  in intel_edp_init_connector()
7037 	has_dpcd = intel_edp_init_dpcd(intel_dp);  in intel_edp_init_connector()
7046 	edid = drm_get_edid(connector, &intel_dp->aux.ddc);  in intel_edp_init_connector()
7070 		intel_dp->edp_notifier.notifier_call = edp_notify_handler;  in intel_edp_init_connector()
7071 		register_reboot_notifier(&intel_dp->edp_notifier);  in intel_edp_init_connector()
7078 		pipe = vlv_active_pipe(intel_dp);  in intel_edp_init_connector()
7081 			pipe = intel_dp->pps_pipe;  in intel_edp_init_connector()
7101 	cancel_delayed_work_sync(&intel_dp->panel_vdd_work);  in intel_edp_init_connector()
7106 	with_pps_lock(intel_dp, wakeref)  in intel_edp_init_connector()
7107 		edp_panel_vdd_off_sync(intel_dp);  in intel_edp_init_connector()
7140 	struct intel_dp *intel_dp = &intel_dig_port->dp;  in intel_dp_init_connector()  local
7157 	intel_dp_set_source_rates(intel_dp);  in intel_dp_init_connector()
7159 	intel_dp->reset_link_params = true;  in intel_dp_init_connector()
7160 	intel_dp->pps_pipe = INVALID_PIPE;  in intel_dp_init_connector()
7161 	intel_dp->active_pipe = INVALID_PIPE;  in intel_dp_init_connector()
7164 	intel_dp->DP = I915_READ(intel_dp->output_reg);  in intel_dp_init_connector()
7165 	intel_dp->attached_connector = intel_connector;  in intel_dp_init_connector()
7179 		intel_dp->active_pipe = vlv_active_pipe(intel_dp);  in intel_dp_init_connector()
7191 		    intel_dp_is_edp(intel_dp) &&  in intel_dp_init_connector()
7211 	intel_dp_aux_init(intel_dp);  in intel_dp_init_connector()
7221 	if (HAS_DP_MST(dev_priv) && !intel_dp_is_edp(intel_dp) &&  in intel_dp_init_connector()
7227 	if (!intel_edp_init_connector(intel_dp, intel_connector)) {  in intel_dp_init_connector()
7228 		intel_dp_aux_fini(intel_dp);  in intel_dp_init_connector()
7233 	intel_dp_add_properties(intel_dp, connector);  in intel_dp_init_connector()
7235 	if (is_hdcp_supported(dev_priv, port) && !intel_dp_is_edp(intel_dp)) {  in intel_dp_init_connector()
7350 		struct intel_dp *intel_dp;  in intel_dp_mst_suspend()  local
7355 		intel_dp = enc_to_intel_dp(&encoder->base);  in intel_dp_mst_suspend()
7357 		if (!intel_dp->can_mst)  in intel_dp_mst_suspend()
7360 		if (intel_dp->is_mst)  in intel_dp_mst_suspend()
7361 			drm_dp_mst_topology_mgr_suspend(&intel_dp->mst_mgr);  in intel_dp_mst_suspend()
7370 		struct intel_dp *intel_dp;  in intel_dp_mst_resume()  local
7376 		intel_dp = enc_to_intel_dp(&encoder->base);  in intel_dp_mst_resume()
7378 		if (!intel_dp->can_mst)  in intel_dp_mst_resume()
7381 		ret = drm_dp_mst_topology_mgr_resume(&intel_dp->mst_mgr);  in intel_dp_mst_resume()
7383 			intel_dp->is_mst = false;  in intel_dp_mst_resume()
7384 			drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,  in intel_dp_mst_resume()