799 	unsigned int pipes = (1 << PIPE_A) | (1 << PIPE_B);  in vlv_find_free_pps()
853 		pipe = PIPE_A;  in vlv_power_sequencer_pipe()
928 	for (pipe = PIPE_A; pipe <= PIPE_B; pipe++) {  in vlv_initial_pps_pipe()
3092 	*pipe = PIPE_A;  in cpt_dp_port_selected()
3494 	if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))  in vlv_detach_power_sequencer()
4102 		intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);  in intel_dp_link_down()
4103 		intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);  in intel_dp_link_down()
4107 		DP |= DP_PORT_EN | DP_PIPE_SEL(PIPE_A) |  in intel_dp_link_down()
4116 		intel_wait_for_vblank_if_active(dev_priv, PIPE_A);  in intel_dp_link_down()
4117 		intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);  in intel_dp_link_down()
4118 		intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);  in intel_dp_link_down()
7080 		if (pipe != PIPE_A && pipe != PIPE_B)  in intel_edp_init_connector()
7083 		if (pipe != PIPE_A && pipe != PIPE_B)  in intel_edp_init_connector()
7084 			pipe = PIPE_A;  in intel_edp_init_connector()