Lines Matching refs:DP

732 	u32 DP;  in vlv_power_sequencer_kick()  local
745 DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in vlv_power_sequencer_kick()
746 DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in vlv_power_sequencer_kick()
747 DP |= DP_PORT_WIDTH(1); in vlv_power_sequencer_kick()
748 DP |= DP_LINK_TRAIN_PAT_1; in vlv_power_sequencer_kick()
751 DP |= DP_PIPE_SEL_CHV(pipe); in vlv_power_sequencer_kick()
753 DP |= DP_PIPE_SEL(pipe); in vlv_power_sequencer_kick()
779 I915_WRITE(intel_dp->output_reg, DP); in vlv_power_sequencer_kick()
782 I915_WRITE(intel_dp->output_reg, DP | DP_PORT_EN); in vlv_power_sequencer_kick()
785 I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN); in vlv_power_sequencer_kick()
2389 intel_dp->DP = I915_READ(intel_dp->output_reg) & DP_DETECTED; in intel_dp_prepare()
2392 intel_dp->DP |= DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0; in intel_dp_prepare()
2393 intel_dp->DP |= DP_PORT_WIDTH(pipe_config->lane_count); in intel_dp_prepare()
2399 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
2401 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
2402 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
2405 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
2407 intel_dp->DP |= DP_PIPE_SEL_IVB(crtc->pipe); in intel_dp_prepare()
2411 intel_dp->DP |= DP_LINK_TRAIN_OFF_CPT; in intel_dp_prepare()
2421 intel_dp->DP |= DP_COLOR_RANGE_16_235; in intel_dp_prepare()
2424 intel_dp->DP |= DP_SYNC_HS_HIGH; in intel_dp_prepare()
2426 intel_dp->DP |= DP_SYNC_VS_HIGH; in intel_dp_prepare()
2427 intel_dp->DP |= DP_LINK_TRAIN_OFF; in intel_dp_prepare()
2430 intel_dp->DP |= DP_ENHANCED_FRAMING; in intel_dp_prepare()
2433 intel_dp->DP |= DP_PIPE_SEL_CHV(crtc->pipe); in intel_dp_prepare()
2435 intel_dp->DP |= DP_PIPE_SEL(crtc->pipe); in intel_dp_prepare()
2959 intel_dp->DP &= ~DP_PLL_FREQ_MASK; in ironlake_edp_pll_on()
2962 intel_dp->DP |= DP_PLL_FREQ_162MHZ; in ironlake_edp_pll_on()
2964 intel_dp->DP |= DP_PLL_FREQ_270MHZ; in ironlake_edp_pll_on()
2966 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_on()
2979 intel_dp->DP |= DP_PLL_ENABLE; in ironlake_edp_pll_on()
2981 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_on()
2998 intel_dp->DP &= ~DP_PLL_ENABLE; in ironlake_edp_pll_off()
3000 I915_WRITE(DP_A, intel_dp->DP); in ironlake_edp_pll_off()
3305 u32 *DP, in _intel_dp_set_link_train() argument
3348 *DP &= ~DP_LINK_TRAIN_MASK_CPT; in _intel_dp_set_link_train()
3352 *DP |= DP_LINK_TRAIN_OFF_CPT; in _intel_dp_set_link_train()
3355 *DP |= DP_LINK_TRAIN_PAT_1_CPT; in _intel_dp_set_link_train()
3358 *DP |= DP_LINK_TRAIN_PAT_2_CPT; in _intel_dp_set_link_train()
3362 *DP |= DP_LINK_TRAIN_PAT_2_CPT; in _intel_dp_set_link_train()
3367 *DP &= ~DP_LINK_TRAIN_MASK; in _intel_dp_set_link_train()
3371 *DP |= DP_LINK_TRAIN_OFF; in _intel_dp_set_link_train()
3374 *DP |= DP_LINK_TRAIN_PAT_1; in _intel_dp_set_link_train()
3377 *DP |= DP_LINK_TRAIN_PAT_2; in _intel_dp_set_link_train()
3381 *DP |= DP_LINK_TRAIN_PAT_2; in _intel_dp_set_link_train()
3402 intel_dp->DP |= DP_PORT_EN; in intel_dp_enable_port()
3404 intel_dp->DP |= DP_AUDIO_OUTPUT_ENABLE; in intel_dp_enable_port()
3406 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_enable_port()
4012 intel_dp->DP = (intel_dp->DP & ~mask) | signal_levels; in intel_dp_set_signal_levels()
4014 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_set_signal_levels()
4026 _intel_dp_set_link_train(intel_dp, &intel_dp->DP, dp_train_pat); in intel_dp_program_link_training_pattern()
4028 I915_WRITE(intel_dp->output_reg, intel_dp->DP); in intel_dp_program_link_training_pattern()
4070 u32 DP = intel_dp->DP; in intel_dp_link_down() local
4079 DP &= ~DP_LINK_TRAIN_MASK_CPT; in intel_dp_link_down()
4080 DP |= DP_LINK_TRAIN_PAT_IDLE_CPT; in intel_dp_link_down()
4082 DP &= ~DP_LINK_TRAIN_MASK; in intel_dp_link_down()
4083 DP |= DP_LINK_TRAIN_PAT_IDLE; in intel_dp_link_down()
4085 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
4088 DP &= ~(DP_PORT_EN | DP_AUDIO_OUTPUT_ENABLE); in intel_dp_link_down()
4089 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
4106 DP &= ~(DP_PIPE_SEL_MASK | DP_LINK_TRAIN_MASK); in intel_dp_link_down()
4107 DP |= DP_PORT_EN | DP_PIPE_SEL(PIPE_A) | in intel_dp_link_down()
4109 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
4112 DP &= ~DP_PORT_EN; in intel_dp_link_down()
4113 I915_WRITE(intel_dp->output_reg, DP); in intel_dp_link_down()
4123 intel_dp->DP = DP; in intel_dp_link_down()
6221 intel_dp->DP = I915_READ(intel_dp->output_reg); in intel_dp_encoder_reset()
7164 intel_dp->DP = I915_READ(intel_dp->output_reg); in intel_dp_init_connector()